fault
ExtFaults fault
XML_SetUserData(g_parser, &fault);
ExtFaults fault
XML_SetUserData(g_parser, &fault);
const ExtFaults *fault = faults;
for (; fault->parse_text != NULL; fault++) {
set_subtest("\"%s\"", fault->parse_text);
XML_SetUserData(g_parser, (void *)fault);
ExtFaults *fault;
for (fault = &faults[0]; fault->parse_text != NULL; fault++) {
set_subtest("%s", fault->parse_text);
XML_SetUserData(g_parser, fault);
ExtFaults *fault;
for (fault = &faults[0]; fault->parse_text != NULL; fault++) {
set_subtest("%s", fault->parse_text);
XML_SetUserData(g_parser, fault);
ExtFaults fault = {"<![IGNORE[<!ELEMENT \xffG (#PCDATA)*>]]>",
XML_SetUserData(g_parser, &fault);
ExtFaults *fault = (ExtFaults *)XML_GetUserData(parser);
if (fault->encoding != NULL) {
if (! XML_SetEncoding(ext_parser, fault->encoding))
if (_XML_Parse_SINGLE_BYTES(ext_parser, fault->parse_text,
(int)strlen(fault->parse_text), XML_TRUE)
fail(fault->fail_text);
if (XML_GetErrorCode(ext_parser) != fault->error)
ExtFaults *fault = (ExtFaults *)XML_GetUserData(parser);
int parse_len = (int)strlen(fault->parse_text);
memcpy(buffer, fault->parse_text, parse_len);
fail(fault->fail_text);
if (XML_GetErrorCode(ext_parser) != fault->error)
ExtFaults *fault = (ExtFaults *)XML_GetUserData(parser);
status = _XML_Parse_SINGLE_BYTES(ext_parser, fault->parse_text,
(int)strlen(fault->parse_text), XML_TRUE);
if (fault->error == XML_ERROR_NONE) {
fail(fault->fail_text);
if (error != fault->error
&& (fault->error != XML_ERROR_XML_DECL
fault("invalid pcb_nofault=%lx",
fault("attempt to execute user address %p "
fault("attempt to access user address %p "
fault("uvm_fault(%p, 0x%llx, 0, %d) -> %x",
fault("attempt to %s user address 0x%llx from EL1",
fault("FP exception in kernel");
fault("Branch target exception in kernel");
fault("Pointher authentication failure in kernel");
fault("Unknown kernel exception 0x%02x", exception);
double_reg_fixup(struct trapframe *frame, int fault)
switch (fault) {
&_DT_STATIC_P(uvm, fault),
DT_STATIC_PROBE3(uvm, fault, "vaddr_t", "vm_fault_t", "vm_prot_t");
uint8_t event_a, event_b, event_c, event_d, fault;
fault = dapmic_reg_read(sc, FAULT_LOG);
if (fault != 0) {
fault);
.fault = amdgpu_gem_fault,
struct amdgpu_gmc_fault *fault;
fault = &gmc->fault_ring[gmc->fault_hash[hash].idx];
while (fault->timestamp >= stamp) {
if (atomic64_read(&fault->key) == key) {
if (fault->timestamp_expiry != 0 &&
amdgpu_ih_ts_after(fault->timestamp_expiry,
tmp = fault->timestamp;
fault = &gmc->fault_ring[fault->next];
if (fault->timestamp >= tmp)
fault = &gmc->fault_ring[gmc->last_fault];
atomic64_set(&fault->key, key);
fault->timestamp = timestamp;
fault->next = gmc->fault_hash[hash].idx;
struct amdgpu_gmc_fault *fault;
fault = &gmc->fault_ring[gmc->fault_hash[hash].idx];
if (atomic64_read(&fault->key) == key) {
fault->timestamp_expiry = last_ts;
tmp = fault->timestamp;
fault = &gmc->fault_ring[fault->next];
} while (fault->timestamp < tmp);
for (handler = handlers; handler && handler->fault; handler++) {
if ((fault_errors & handler->fault) == 0)
{ .fault = MTL_PLANE_ATS_FAULT, .handle = handle_plane_ats_fault, },
{ .fault = MTL_PIPEDMC_ATS_FAULT, .handle = handle_pipedmc_ats_fault, },
{ .fault = GEN12_PIPEDMC_FAULT, .handle = handle_pipedmc_fault, },
{ .fault = GEN11_PIPE_PLANE5_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_5, },
{ .fault = GEN9_PIPE_PLANE4_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_4, },
{ .fault = GEN9_PIPE_PLANE3_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_3, },
{ .fault = GEN9_PIPE_PLANE2_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_2, },
{ .fault = GEN9_PIPE_PLANE1_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_1, },
{ .fault = GEN9_PIPE_CURSOR_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },
{ .fault = GEN12_PIPEDMC_FAULT, .handle = handle_pipedmc_fault, },
{ .fault = GEN11_PIPE_PLANE7_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_7, },
{ .fault = GEN11_PIPE_PLANE6_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_6, },
{ .fault = GEN11_PIPE_PLANE5_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_5, },
{ .fault = GEN9_PIPE_PLANE4_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_4, },
fault_errors &= ~handler->fault;
{ .fault = GEN9_PIPE_PLANE3_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_3, },
{ .fault = GEN9_PIPE_PLANE2_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_2, },
{ .fault = GEN9_PIPE_PLANE1_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_1, },
{ .fault = GEN9_PIPE_CURSOR_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },
{ .fault = GEN11_PIPE_PLANE7_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_7, },
{ .fault = GEN11_PIPE_PLANE6_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_6, },
{ .fault = GEN11_PIPE_PLANE5_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_5, },
{ .fault = GEN9_PIPE_PLANE4_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_4, },
{ .fault = GEN9_PIPE_PLANE3_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_3, },
{ .fault = GEN9_PIPE_PLANE2_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_2, },
{ .fault = GEN9_PIPE_PLANE1_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_1, },
{ .fault = GEN9_PIPE_CURSOR_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },
{ .fault = GEN9_PIPE_PLANE4_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_4, },
{ .fault = GEN9_PIPE_PLANE3_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_3, },
{ .fault = GEN9_PIPE_PLANE2_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_2, },
{ .fault = GEN9_PIPE_PLANE1_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_1, },
{ .fault = GEN9_PIPE_CURSOR_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },
{ .fault = GEN8_PIPE_SPRITE_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_SPRITE0, },
{ .fault = GEN8_PIPE_PRIMARY_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_PRIMARY, },
{ .fault = GEN8_PIPE_CURSOR_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },
{ .fault = SPRITEB_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id = PLANE_SPRITE1, },
{ .fault = SPRITEA_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id = PLANE_SPRITE0, },
{ .fault = PLANEA_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id = PLANE_PRIMARY, },
{ .fault = CURSORA_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },
{ .fault = SPRITED_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id = PLANE_SPRITE1, },
{ .fault = SPRITEC_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id = PLANE_SPRITE0, },
{ .fault = PLANEB_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id = PLANE_PRIMARY, },
{ .fault = CURSORB_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },
{ .fault = SPRITEF_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id = PLANE_SPRITE1, },
{ .fault = SPRITEE_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id = PLANE_SPRITE0, },
{ .fault = PLANEC_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id = PLANE_PRIMARY, },
{ .fault = CURSORC_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },
{ .fault = ERR_INT_SPRITE_A_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_SPRITE0, },
{ .fault = ERR_INT_PRIMARY_A_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_PRIMARY, },
{ .fault = ERR_INT_CURSOR_A_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },
{ .fault = ERR_INT_SPRITE_B_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_SPRITE0, },
{ .fault = ERR_INT_PRIMARY_B_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_PRIMARY, },
{ .fault = ERR_INT_CURSOR_B_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },
{ .fault = ERR_INT_SPRITE_C_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_SPRITE0, },
{ .fault = ERR_INT_PRIMARY_C_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_PRIMARY, },
{ .fault = ERR_INT_CURSOR_C_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },
u32 fault;
{ .fault = GTT_FAULT_SPRITE_A_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_SPRITE0, },
{ .fault = GTT_FAULT_SPRITE_B_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_SPRITE0, },
{ .fault = GTT_FAULT_PRIMARY_A_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_PRIMARY, },
{ .fault = GTT_FAULT_PRIMARY_B_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_PRIMARY, },
{ .fault = GTT_FAULT_CURSOR_A_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },
{ .fault = GTT_FAULT_CURSOR_B_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },
.fault = vm_fault_gtt,
.fault = vm_fault_cpu,
.fault = vm_fault_ttm,
u32 fault;
fault = GEN6_RING_FAULT_REG_READ(engine);
if (fault & RING_FAULT_VALID) {
fault & RING_FAULT_VADDR_MASK,
fault & RING_FAULT_GTTSEL_MASK ?
REG_FIELD_GET(RING_FAULT_SRCID_MASK, fault),
REG_FIELD_GET(RING_FAULT_FAULT_TYPE_MASK, fault));
static void gen8_report_fault(struct intel_gt *gt, u32 fault,
REG_FIELD_GET(RING_FAULT_ENGINE_ID_MASK, fault),
REG_FIELD_GET(RING_FAULT_SRCID_MASK, fault),
REG_FIELD_GET(RING_FAULT_FAULT_TYPE_MASK, fault));
u32 fault;
fault = intel_gt_mcr_read_any(gt, XEHP_RING_FAULT_REG);
if (fault & RING_FAULT_VALID)
gen8_report_fault(gt, fault,
u32 fault;
fault = intel_uncore_read(uncore, fault_reg);
if (fault & RING_FAULT_VALID)
gen8_report_fault(gt, fault,
.fault = radeon_gem_fault,
.fault = ttm_bo_vm_fault,
uint8_t fault;
uint8_t fault;
TRACEPOINT(uvm, fault, vaddr, fault_type, access_type, NULL);