sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

759

block_sequence[*num_steps].params.fams2_global_control_lock_fast_params.dc = dc;

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

760

block_sequence[*num_steps].params.fams2_global_control_lock_fast_params.lock = true;

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

761

block_sequence[*num_steps].params.fams2_global_control_lock_fast_params.is_required = dc_state_is_fams2_in_use(dc, context);

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

898

block_sequence[*num_steps].params.fams2_global_control_lock_fast_params.dc = dc;

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

899

block_sequence[*num_steps].params.fams2_global_control_lock_fast_params.lock = false;

sys/dev/pci/drm/amd/display/dc/core/dc_hw_sequencer.c

900

block_sequence[*num_steps].params.fams2_global_control_lock_fast_params.is_required = dc_state_is_fams2_in_use(dc, context);

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1497

struct dc *dc = params->fams2_global_control_lock_fast_params.dc;

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1498

bool lock = params->fams2_global_control_lock_fast_params.lock;

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1500

if (params->fams2_global_control_lock_fast_params.is_required) {

sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h

176

struct fams2_global_control_lock_fast_params fams2_global_control_lock_fast_params;