sys/dev/fdt/if_dwge.c

1221

mode = dwge_read(sc, GMAC_OP_MODE);

sys/dev/fdt/if_dwge.c

1233

dwge_write(sc, GMAC_MAC_CONF, dwge_read(sc, GMAC_MAC_CONF) |

sys/dev/fdt/if_dwge.c

1258

dwge_write(sc, GMAC_MAC_CONF, dwge_read(sc,

sys/dev/fdt/if_dwge.c

1261

dmactrl = dwge_read(sc, GMAC_OP_MODE);

sys/dev/fdt/if_dwge.c

1437

dwge_write(sc, GMAC_BUS_MODE, dwge_read(sc, GMAC_BUS_MODE) |

sys/dev/fdt/if_dwge.c

1441

if ((dwge_read(sc, GMAC_BUS_MODE) &

sys/dev/fdt/if_dwge.c

1456

dmactrl = dwge_read(sc, GMAC_OP_MODE);

sys/dev/fdt/if_dwge.c

1833

kstat_kv_u64(&kvs[i]) += dwge_read(sc, dwge_counters[i].c_reg);

sys/dev/fdt/if_dwge.c

330

uint32_t dwge_read(struct dwge_softc *, bus_addr_t);

sys/dev/fdt/if_dwge.c

437

version = dwge_read(sc, GMAC_VERSION);

sys/dev/fdt/if_dwge.c

441

feature = dwge_read(sc, GMAC_HW_FEATURE);

sys/dev/fdt/if_dwge.c

545

dwge_write(sc, GMAC_MAC_CONF, dwge_read(sc, GMAC_MAC_CONF) |

sys/dev/fdt/if_dwge.c

549

mode = dwge_read(sc, GMAC_BUS_MODE);

sys/dev/fdt/if_dwge.c

569

mode = dwge_read(sc, GMAC_AXI_BUS_MODE);

sys/dev/fdt/if_dwge.c

699

machi = dwge_read(sc, GMAC_MAC_ADDR0_HI);

sys/dev/fdt/if_dwge.c

700

maclo = dwge_read(sc, GMAC_MAC_ADDR0_LO);

sys/dev/fdt/if_dwge.c

871

if ((dwge_read(sc, GMAC_GMII_ADDR) & GMAC_GMII_ADDR_GB) == 0)

sys/dev/fdt/if_dwge.c

872

return dwge_read(sc, GMAC_GMII_DATA);

sys/dev/fdt/if_dwge.c

893

if ((dwge_read(sc, GMAC_GMII_ADDR) & GMAC_GMII_ADDR_GB) == 0)

sys/dev/fdt/if_dwge.c

908

conf = dwge_read(sc, GMAC_MAC_CONF);

sys/dev/fdt/if_dwge.c

969

mode = dwge_read(sc, GMAC_OP_MODE);

sys/dev/fdt/if_dwge.c

997

reg = dwge_read(sc, GMAC_STATUS);