sys/dev/pci/drm/amd/amdgpu/amdgpu_connectors.c

623

drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V);

sys/dev/pci/drm/amd/amdgpu/amdgpu_encoders.c

190

drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);

sys/dev/pci/drm/amd/amdgpu/atombios_encoders.c

2026

drm_mode_set_crtcinfo(&lvds->native_mode, CRTC_INTERLACE_HALVE_V);

sys/dev/pci/drm/amd/amdgpu/atombios_encoders.c

286

drm_mode_set_crtcinfo(adjusted_mode, 0);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

7276

drm_mode_set_crtcinfo(&saved_mode, 0);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8028

drm_mode_set_crtcinfo(test_mode, 0);

sys/dev/pci/drm/drm_modes.c

1327

drm_mode_set_crtcinfo(&adjusted, CRTC_STEREO_DOUBLE_ONLY);

sys/dev/pci/drm/drm_modes.c

1410

EXPORT_SYMBOL(drm_mode_set_crtcinfo);

sys/dev/pci/drm/drm_modes.c

2581

drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);

sys/dev/pci/drm/drm_modes.c

2707

drm_mode_set_crtcinfo(out, CRTC_INTERLACE_HALVE_V);

sys/dev/pci/drm/drm_probe_helper.c

705

drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);

sys/dev/pci/drm/i915/display/intel_display.c

4703

drm_mode_set_crtcinfo(&crtc_state->hw.adjusted_mode,

sys/dev/pci/drm/i915/display/intel_panel.c

245

drm_mode_set_crtcinfo(adjusted_mode, 0);

sys/dev/pci/drm/i915/display/intel_sdvo.c

922

drm_mode_set_crtcinfo(&mode, 0);

sys/dev/pci/drm/i915/display/intel_tv.c

1228

drm_mode_set_crtcinfo(adjusted_mode, 0);

sys/dev/pci/drm/i915/display/intel_tv.c

1345

drm_mode_set_crtcinfo(adjusted_mode, 0);

sys/dev/pci/drm/include/drm/drm_modes.h

535

void drm_mode_set_crtcinfo(struct drm_display_mode *p,

sys/dev/pci/drm/radeon/atombios_encoders.c

306

drm_mode_set_crtcinfo(adjusted_mode, 0);

sys/dev/pci/drm/radeon/radeon_atombios.c

1682

drm_mode_set_crtcinfo(&lvds->native_mode, CRTC_INTERLACE_HALVE_V);

sys/dev/pci/drm/radeon/radeon_combios.c

1273

drm_mode_set_crtcinfo(&lvds->native_mode, CRTC_INTERLACE_HALVE_V);

sys/dev/pci/drm/radeon/radeon_connectors.c

758

drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V);

sys/dev/pci/drm/radeon/radeon_encoders.c

350

drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);

sys/dev/pci/drm/radeon/radeon_legacy_encoders.c

264

drm_mode_set_crtcinfo(adjusted_mode, 0);