sys/dev/pci/drm/display/drm_dp_helper.c

4650

drm_dp_bw_channel_coding_efficiency(drm_dp_is_uhbr_rate(max_link_rate));

sys/dev/pci/drm/display/drm_dp_mst_topology.c

3606

drm_dp_bw_channel_coding_efficiency(drm_dp_is_uhbr_rate(link_rate));

sys/dev/pci/drm/i915/display/intel_dp.c

148

return drm_dp_is_uhbr_rate(crtc_state->port_clock);

sys/dev/pci/drm/i915/display/intel_dp.c

160

return drm_dp_is_uhbr_rate(rate) ? 32 : 10;

sys/dev/pci/drm/i915/display/intel_dp.c

2002

if (drm_dp_is_uhbr_rate(link_rate)) {

sys/dev/pci/drm/i915/display/intel_dp_link_training.c

1253

if (drm_dp_is_uhbr_rate(current_rate) != drm_dp_is_uhbr_rate(new_rate))

sys/dev/pci/drm/i915/display/intel_dp_link_training.c

717

link_config[1] = drm_dp_is_uhbr_rate(link_rate) ?

sys/dev/pci/drm/i915/display/intel_dp_mst.c

540

if (is_uhbr_sink && !drm_dp_is_uhbr_rate(limits->max_rate))