drm_WARN
drm_WARN(dev, !dev->registered, "Device has not been registered.\n");
drm_WARN(dev, dev->fb_helper, "fb_helper is already set!\n");
drm_WARN(to_group(group_state->base.obj)->mgr->dev,
drm_WARN(gpuvm->drm, !RB_EMPTY_ROOT(&gpuvm->rb.tree.rb_root),
drm_WARN(gpuvm->drm, !list_empty(&gpuvm->extobj.list),
drm_WARN(gpuvm->drm, !list_empty(&gpuvm->evict.list),
drm_WARN(gpuvm->drm, 1,
return drm_WARN(gpuvm->drm, drm_gpuvm_check_overflow(addr, range),
drm_WARN(dev, num_zpos && num_planes != num_zpos,
if (drm_WARN(dev, ret, "vblank not available on crtc %i, ret=%i\n",
drm_WARN(dev, ret == 0, "vblank wait timed out on crtc %i\n", pipe);
return !drm_WARN(display->drm, !is_hdmi_port_valid(display, port),
drm_WARN(display->drm, ret,
drm_WARN(display->drm, child->use_vbt_vswing,
drm_WARN(display->drm, min_size == 0,
drm_WARN(display->drm, 1,
drm_WARN(display->drm, 1, "cdclk %d not valid for refclk %u\n",
drm_WARN(display->drm, 1, "cdclk %d not valid for refclk %u\n",
if (drm_WARN(display->drm,
if (drm_WARN(display->drm, !display->funcs.cdclk,
if (drm_WARN(display->drm,
drm_WARN(display->drm, 1,
drm_WARN(display->drm, true,
return !drm_WARN(display->drm, !display->platform.alderlake_p &&
drm_WARN(drm, (val & CCK_FREQUENCY_STATUS) !=
drm_WARN(display->drm, (ultrajoiner_pipes & bigjoiner_pipes) != ultrajoiner_pipes,
drm_WARN(display->drm, secondary_ultrajoiner_pipes !=
drm_WARN(display->drm, (uncompressed_joiner_pipes & bigjoiner_pipes) != 0,
drm_WARN(display->drm, secondary_bigjoiner_pipes !=
drm_WARN(display->drm, secondary_uncompressed_joiner_pipes !=
drm_WARN(display->drm,
drm_WARN(display->drm,
drm_WARN(display->drm,
drm_WARN(display->drm, 1,
drm_WARN(display->drm, 1, "pipe_off wait timed out\n");
return !drm_WARN(display->drm, !(DISPLAY_RUNTIME_INFO(display)->port_mask & BIT(port)),
drm_WARN(state->base.dev, num_encoders != 1,
if (!drm_WARN((__display)->drm, (__display)->params.verbose_state_checks, format)) \
drm_WARN(display->drm, enable != state,
drm_WARN(display->drm, req_slices & ~slice_mask,
drm_WARN(display->drm,
drm_WARN(display->drm, !pci_dev_present(isp_ids) &&
drm_WARN(display->drm, !power_domains->domain_use_count[domain],
drm_WARN(display->drm,
drm_WARN(display->drm, 1,
drm_WARN(display->drm, !power_well->count,
drm_WARN(display->drm, actual != expected,
drm_WARN(display->drm, 1, "Power well PICA timeout when enabled");
drm_WARN(display->drm, 1, "Power well PICA timeout when disabled");
drm_WARN(display->drm,
drm_WARN(display->drm, 1, "Missing Wa number: %s\n", name);
drm_WARN(display->drm, found != expected,
drm_WARN(display->drm, found != expected,
if (drm_WARN(dev, dig_port->max_lanes < 1,
drm_WARN(display->drm, 1,
drm_WARN(display->drm, intel_dp->force_dsc_bpc,
drm_WARN(encoder->base.dev, ret,
drm_WARN(display->drm, 1,
drm_WARN(display->drm, 1, "PHY not found for PORT %c",
drm_WARN(display->drm, 1, "bad port clock sel\n");
drm_WARN(display->drm, 1, "bad spll freq\n");
if (drm_WARN(display->drm, !pll,
drm_WARN(display->drm, 1, "Unsupported link rate\n");
if (drm_WARN(display->drm, !(pll->active_mask & pipe_mask),
return !drm_WARN(display->drm, dsb->free_pos > dsb->size - 2,
drm_WARN(crtc->base.dev, (end - start + vtotal) % vtotal == vtotal - 1,
drm_WARN(display->drm, !plane_state->uapi.fb,
return !drm_WARN(display->drm,
drm_WARN(display->drm, 1, "Global state not read locked\n");
drm_WARN(display->drm, val & VIDEO_DIP_ENABLE,
drm_WARN(display->drm, val & VIDEO_DIP_ENABLE,
drm_WARN(display->drm, !(val & VIDEO_DIP_ENABLE),
drm_WARN(display->drm, 1, "Unknown port:%c\n", port_name(port));
drm_WARN(display->drm, !(val & VIDEO_DIP_ENABLE),
if (drm_WARN(dev, dig_port->max_lanes < 4,
drm_WARN(display->drm, !(val & VIDEO_DIP_ENABLE),
drm_WARN(display->drm, !(val & VIDEO_DIP_ENABLE),
drm_WARN(display->drm,
drm_WARN(display->drm,
drm_WARN(display->drm, !display->vbt.int_lvds_support,
drm_WARN(display->drm, abs(fdi_dotclock - dotclock) > 1,
if (drm_WARN(display->drm, with_fdi && !with_spread,
if (drm_WARN(display->drm, HAS_PCH_LPT_LP(display) &&
drm_WARN(display->drm, 1, "nonexisting DP port %c\n",
drm_WARN(display->drm, ret,
if (drm_WARN(display->drm,
drm_WARN(display->drm, !intel_dp->pps.want_panel_vdd,
drm_WARN(display->drm, intel_dp->pps.vlv_active_pipe == pipe,
drm_WARN(display->drm, pp & PANEL_POWER_ON,
drm_WARN(display->drm,
drm_WARN(display->drm, 1,
if (drm_WARN(display->drm, edp_have_panel_power(intel_dp),
drm_WARN(display->drm, 1,
drm_WARN(display->drm,
return !drm_WARN(display->drm, !is_sdvo_port_valid(display, port),
if (drm_WARN(display->drm, *scaler_id < 0,
if (drm_WARN(display->drm, display->sagv.block_time_us > U16_MAX,
drm_WARN(display->drm, val == 0xffffffff,
drm_WARN(&i915->drm, GRAPHICS_VER(i915) == 5,
if (drm_WARN(&i915->drm, errors,
drm_WARN(&(_gt)->i915->drm, _condition, "GT%u: " _fmt, (_gt)->info.id, ##__VA_ARGS__)
drm_WARN(&i915->drm, 1,
drm_WARN(&i915->drm, 1,
drm_WARN(&i915->drm, test_bit(INTEL_VGPU_STATUS_ACTIVE, vgpu->status),
drm_WARN(&uncore->i915->drm, 1,
drm_WARN(&i915->drm, ret < 0,
drm_WARN(&i915->drm, pm_runtime_get_sync(kdev) < 0,
drm_WARN(&i915->drm, count,
drm_WARN(&uncore->i915->drm, entry->domains & ~uncore->fw_domains,
if (drm_WARN(&uncore->i915->drm,
drm_WARN(&uncore->i915->drm, uncore->fw_domains_active,
drm_WARN(&uncore->i915->drm, fw_domains & ~uncore->fw_domains_active,
if (drm_WARN(&uncore->i915->drm, actual < expect,
drm_WARN((drm), (x), "%s", \