sys/dev/pci/drm/i915/display/i9xx_wm.c

102

DIV_ROUND_CLOSEST(dram_info->fsb_freq, 1000) == latency->fsb_freq &&

sys/dev/pci/drm/i915/display/i9xx_wm.c

103

DIV_ROUND_CLOSEST(dram_info->mem_freq, 1000) == latency->mem_freq)

sys/dev/pci/drm/i915/display/i9xx_wm.c

109

intel_dram_type_str(dram_info->type),

sys/dev/pci/drm/i915/display/i9xx_wm.c

110

dram_info->fsb_freq, dram_info->mem_freq);

sys/dev/pci/drm/i915/display/i9xx_wm.c

92

const struct dram_info *dram_info = intel_dram_info(display->drm);

sys/dev/pci/drm/i915/display/i9xx_wm.c

93

bool is_ddr3 = dram_info->type == INTEL_DRAM_DDR3;

sys/dev/pci/drm/i915/display/intel_bw.c

257

const struct dram_info *dram_info,

sys/dev/pci/drm/i915/display/intel_bw.c

263

qi->num_points = dram_info->num_qgv_points;

sys/dev/pci/drm/i915/display/intel_bw.c

264

qi->num_psf_points = dram_info->num_psf_gv_points;

sys/dev/pci/drm/i915/display/intel_bw.c

267

switch (dram_info->type) {

sys/dev/pci/drm/i915/display/intel_bw.c

292

MISSING_CASE(dram_info->type);

sys/dev/pci/drm/i915/display/intel_bw.c

296

switch (dram_info->type) {

sys/dev/pci/drm/i915/display/intel_bw.c

330

qi->t_bl = dram_info->type == INTEL_DRAM_DDR4 ? 4 : 8;

sys/dev/pci/drm/i915/display/intel_bw.c

464

const struct dram_info *dram_info,

sys/dev/pci/drm/i915/display/intel_bw.c

469

int num_channels = max_t(u8, 1, dram_info->num_channels);

sys/dev/pci/drm/i915/display/intel_bw.c

476

ret = icl_get_qgv_points(display, dram_info, &qi, is_y_tile);

sys/dev/pci/drm/i915/display/intel_bw.c

535

const struct dram_info *dram_info,

sys/dev/pci/drm/i915/display/intel_bw.c

540

int num_channels = max_t(u8, 1, dram_info->num_channels);

sys/dev/pci/drm/i915/display/intel_bw.c

548

ret = icl_get_qgv_points(display, dram_info, &qi, is_y_tile);

sys/dev/pci/drm/i915/display/intel_bw.c

556

(dram_info->type == INTEL_DRAM_LPDDR4 || dram_info->type == INTEL_DRAM_LPDDR5))

sys/dev/pci/drm/i915/display/intel_bw.c

678

const struct dram_info *dram_info,

sys/dev/pci/drm/i915/display/intel_bw.c

682

int num_channels = dram_info->num_channels;

sys/dev/pci/drm/i915/display/intel_bw.c

686

ret = icl_get_qgv_points(display, dram_info, &qi, true);

sys/dev/pci/drm/i915/display/intel_bw.c

809

const struct dram_info *dram_info = intel_dram_info(display->drm);

sys/dev/pci/drm/i915/display/intel_bw.c

815

tgl_get_bw_info(display, dram_info, &xe3lpd_3002_sa_info);

sys/dev/pci/drm/i915/display/intel_bw.c

817

tgl_get_bw_info(display, dram_info, &xe3lpd_sa_info);

sys/dev/pci/drm/i915/display/intel_bw.c

819

dram_info->type == INTEL_DRAM_GDDR_ECC)

sys/dev/pci/drm/i915/display/intel_bw.c

820

xe2_hpd_get_bw_info(display, dram_info, &xe2_hpd_ecc_sa_info);

sys/dev/pci/drm/i915/display/intel_bw.c

822

xe2_hpd_get_bw_info(display, dram_info, &xe2_hpd_sa_info);

sys/dev/pci/drm/i915/display/intel_bw.c

824

tgl_get_bw_info(display, dram_info, &mtl_sa_info);

sys/dev/pci/drm/i915/display/intel_bw.c

828

tgl_get_bw_info(display, dram_info, &adlp_sa_info);

sys/dev/pci/drm/i915/display/intel_bw.c

830

tgl_get_bw_info(display, dram_info, &adls_sa_info);

sys/dev/pci/drm/i915/display/intel_bw.c

832

tgl_get_bw_info(display, dram_info, &rkl_sa_info);

sys/dev/pci/drm/i915/display/intel_bw.c

834

tgl_get_bw_info(display, dram_info, &tgl_sa_info);

sys/dev/pci/drm/i915/display/intel_bw.c

836

icl_get_bw_info(display, dram_info, &icl_sa_info);

sys/dev/pci/drm/i915/display/intel_display_power.c

1620

const struct dram_info *dram_info = intel_dram_info(display->drm);

sys/dev/pci/drm/i915/display/intel_display_power.c

1637

if (table[config].num_channels == dram_info->num_channels &&

sys/dev/pci/drm/i915/display/intel_display_power.c

1638

table[config].type == dram_info->type)

sys/dev/pci/drm/i915/display/skl_watermark.c

3159

const struct dram_info *dram_info = intel_dram_info(display->drm);

sys/dev/pci/drm/i915/display/skl_watermark.c

3161

return dram_info->symmetric_memory;

sys/dev/pci/drm/i915/display/skl_watermark.c

3181

const struct dram_info *dram_info = intel_dram_info(display->drm);

sys/dev/pci/drm/i915/display/skl_watermark.c

3217

if (!display->platform.dg2 && dram_info->has_16gb_dimms)

sys/dev/pci/drm/i915/i915_drv.h

351

const struct dram_info *dram_info;

sys/dev/pci/drm/i915/i915_drv.h

78

struct dram_info;

sys/dev/pci/drm/i915/soc/intel_dram.c

247

static int i915_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)

sys/dev/pci/drm/i915/soc/intel_dram.c

249

dram_info->fsb_freq = intel_fsb_freq(i915);

sys/dev/pci/drm/i915/soc/intel_dram.c

250

if (dram_info->fsb_freq)

sys/dev/pci/drm/i915/soc/intel_dram.c

251

drm_dbg(&i915->drm, "FSB frequency: %d kHz\n", dram_info->fsb_freq);

sys/dev/pci/drm/i915/soc/intel_dram.c

253

dram_info->mem_freq = intel_mem_freq(i915);

sys/dev/pci/drm/i915/soc/intel_dram.c

254

if (dram_info->mem_freq)

sys/dev/pci/drm/i915/soc/intel_dram.c

255

drm_dbg(&i915->drm, "DDR speed: %d kHz\n", dram_info->mem_freq);

sys/dev/pci/drm/i915/soc/intel_dram.c

258

dram_info->type = pnv_dram_type(i915);

sys/dev/pci/drm/i915/soc/intel_dram.c

403

skl_dram_get_channels_info(struct drm_i915_private *i915, struct dram_info *dram_info)

sys/dev/pci/drm/i915/soc/intel_dram.c

410

dram_info->has_16gb_dimms = true;

sys/dev/pci/drm/i915/soc/intel_dram.c

416

dram_info->num_channels++;

sys/dev/pci/drm/i915/soc/intel_dram.c

422

dram_info->num_channels++;

sys/dev/pci/drm/i915/soc/intel_dram.c

424

if (dram_info->num_channels == 0) {

sys/dev/pci/drm/i915/soc/intel_dram.c

434

dram_info->has_16gb_dimms = ch0.is_16gb_dimm || ch1.is_16gb_dimm;

sys/dev/pci/drm/i915/soc/intel_dram.c

436

dram_info->symmetric_memory = intel_is_dram_symmetric(&ch0, &ch1);

sys/dev/pci/drm/i915/soc/intel_dram.c

439

str_yes_no(dram_info->symmetric_memory));

sys/dev/pci/drm/i915/soc/intel_dram.c

442

str_yes_no(dram_info->has_16gb_dimms));

sys/dev/pci/drm/i915/soc/intel_dram.c

471

skl_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)

sys/dev/pci/drm/i915/soc/intel_dram.c

475

dram_info->type = skl_get_dram_type(i915);

sys/dev/pci/drm/i915/soc/intel_dram.c

477

ret = skl_dram_get_channels_info(i915, dram_info);

sys/dev/pci/drm/i915/soc/intel_dram.c

562

static int bxt_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)

sys/dev/pci/drm/i915/soc/intel_dram.c

579

dram_info->num_channels++;

sys/dev/pci/drm/i915/soc/intel_dram.c

585

dram_info->type != INTEL_DRAM_UNKNOWN &&

sys/dev/pci/drm/i915/soc/intel_dram.c

586

dram_info->type != type);

sys/dev/pci/drm/i915/soc/intel_dram.c

597

dram_info->type = type;

sys/dev/pci/drm/i915/soc/intel_dram.c

600

if (dram_info->type == INTEL_DRAM_UNKNOWN || valid_ranks == 0) {

sys/dev/pci/drm/i915/soc/intel_dram.c

609

struct dram_info *dram_info)

sys/dev/pci/drm/i915/soc/intel_dram.c

622

dram_info->type = INTEL_DRAM_DDR4;

sys/dev/pci/drm/i915/soc/intel_dram.c

625

dram_info->type = INTEL_DRAM_DDR5;

sys/dev/pci/drm/i915/soc/intel_dram.c

628

dram_info->type = INTEL_DRAM_LPDDR5;

sys/dev/pci/drm/i915/soc/intel_dram.c

631

dram_info->type = INTEL_DRAM_LPDDR4;

sys/dev/pci/drm/i915/soc/intel_dram.c

634

dram_info->type = INTEL_DRAM_DDR3;

sys/dev/pci/drm/i915/soc/intel_dram.c

637

dram_info->type = INTEL_DRAM_LPDDR3;

sys/dev/pci/drm/i915/soc/intel_dram.c

646

dram_info->type = INTEL_DRAM_DDR4;

sys/dev/pci/drm/i915/soc/intel_dram.c

649

dram_info->type = INTEL_DRAM_DDR3;

sys/dev/pci/drm/i915/soc/intel_dram.c

652

dram_info->type = INTEL_DRAM_LPDDR3;

sys/dev/pci/drm/i915/soc/intel_dram.c

655

dram_info->type = INTEL_DRAM_LPDDR4;

sys/dev/pci/drm/i915/soc/intel_dram.c

663

dram_info->num_channels = (val & 0xf0) >> 4;

sys/dev/pci/drm/i915/soc/intel_dram.c

664

dram_info->num_qgv_points = (val & 0xf00) >> 8;

sys/dev/pci/drm/i915/soc/intel_dram.c

665

dram_info->num_psf_gv_points = (val & 0x3000) >> 12;

sys/dev/pci/drm/i915/soc/intel_dram.c

670

static int gen11_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)

sys/dev/pci/drm/i915/soc/intel_dram.c

674

ret = skl_dram_get_channels_info(i915, dram_info);

sys/dev/pci/drm/i915/soc/intel_dram.c

678

return icl_pcode_read_mem_global_info(i915, dram_info);

sys/dev/pci/drm/i915/soc/intel_dram.c

681

static int gen12_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)

sys/dev/pci/drm/i915/soc/intel_dram.c

683

return icl_pcode_read_mem_global_info(i915, dram_info);

sys/dev/pci/drm/i915/soc/intel_dram.c

686

static int xelpdp_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)

sys/dev/pci/drm/i915/soc/intel_dram.c

692

dram_info->type = INTEL_DRAM_DDR4;

sys/dev/pci/drm/i915/soc/intel_dram.c

695

dram_info->type = INTEL_DRAM_DDR5;

sys/dev/pci/drm/i915/soc/intel_dram.c

698

dram_info->type = INTEL_DRAM_LPDDR5;

sys/dev/pci/drm/i915/soc/intel_dram.c

701

dram_info->type = INTEL_DRAM_LPDDR4;

sys/dev/pci/drm/i915/soc/intel_dram.c

704

dram_info->type = INTEL_DRAM_DDR3;

sys/dev/pci/drm/i915/soc/intel_dram.c

707

dram_info->type = INTEL_DRAM_LPDDR3;

sys/dev/pci/drm/i915/soc/intel_dram.c

711

dram_info->type = INTEL_DRAM_GDDR;

sys/dev/pci/drm/i915/soc/intel_dram.c

715

dram_info->type = INTEL_DRAM_GDDR_ECC;

sys/dev/pci/drm/i915/soc/intel_dram.c

722

dram_info->num_channels = REG_FIELD_GET(MTL_N_OF_POPULATED_CH_MASK, val);

sys/dev/pci/drm/i915/soc/intel_dram.c

723

dram_info->num_qgv_points = REG_FIELD_GET(MTL_N_OF_ENABLED_QGV_POINTS_MASK, val);

sys/dev/pci/drm/i915/soc/intel_dram.c

732

struct dram_info *dram_info;

sys/dev/pci/drm/i915/soc/intel_dram.c

738

dram_info = drmm_kzalloc(&i915->drm, sizeof(*dram_info), GFP_KERNEL);

sys/dev/pci/drm/i915/soc/intel_dram.c

739

if (!dram_info)

sys/dev/pci/drm/i915/soc/intel_dram.c

742

i915->dram_info = dram_info;

sys/dev/pci/drm/i915/soc/intel_dram.c

745

ret = xelpdp_get_dram_info(i915, dram_info);

sys/dev/pci/drm/i915/soc/intel_dram.c

747

ret = gen12_get_dram_info(i915, dram_info);

sys/dev/pci/drm/i915/soc/intel_dram.c

749

ret = gen11_get_dram_info(i915, dram_info);

sys/dev/pci/drm/i915/soc/intel_dram.c

751

ret = bxt_get_dram_info(i915, dram_info);

sys/dev/pci/drm/i915/soc/intel_dram.c

753

ret = skl_get_dram_info(i915, dram_info);

sys/dev/pci/drm/i915/soc/intel_dram.c

755

ret = i915_get_dram_info(i915, dram_info);

sys/dev/pci/drm/i915/soc/intel_dram.c

758

intel_dram_type_str(dram_info->type));

sys/dev/pci/drm/i915/soc/intel_dram.c

760

drm_dbg_kms(&i915->drm, "DRAM channels: %u\n", dram_info->num_channels);

sys/dev/pci/drm/i915/soc/intel_dram.c

762

drm_dbg_kms(&i915->drm, "Num QGV points %u\n", dram_info->num_qgv_points);

sys/dev/pci/drm/i915/soc/intel_dram.c

763

drm_dbg_kms(&i915->drm, "Num PSF GV points %u\n", dram_info->num_psf_gv_points);

sys/dev/pci/drm/i915/soc/intel_dram.c

777

const struct dram_info *intel_dram_info(struct drm_device *drm)

sys/dev/pci/drm/i915/soc/intel_dram.c

781

return i915->dram_info;

sys/dev/pci/drm/i915/soc/intel_dram.h

41

const struct dram_info *intel_dram_info(struct drm_device *drm);

sys/dev/pci/if_iwxreg.h

6729

struct iwx_dram_sec_info dram_info;

sys/dev/pci/if_iwxreg.h

6751

struct iwx_dram_sec_info dram_info;