drm_dp_dpcd_write
error = drm_dp_dpcd_write(&sc->sc_dpaux, DP_LINK_BW_SET,
drm_dp_dpcd_write(&sc->sc_dpaux, DP_TRAINING_LANE0_SET, training,
drm_dp_dpcd_write(&sc->sc_dpaux, DP_TRAINING_LANE0_SET, training,
drm_dp_dpcd_write(&sc->sc_dpaux, DP_TRAINING_LANE0_SET, training,
drm_dp_dpcd_write(dp_info->aux, DP_TRAINING_LANE0_SET,
ret = drm_dp_dpcd_write(mgr->aux, DP_GUID, buf, sizeof(buf));
return drm_dp_dpcd_write(&aconnector->dm_dp_aux.aux,
ret = drm_dp_dpcd_write(aux, SYNAPTICS_RC_DATA, rc_data, sizeof(rc_data));
ret = drm_dp_dpcd_write(aux, SYNAPTICS_RC_OFFSET, rc_offset, sizeof(rc_offset));
ret = drm_dp_dpcd_write(aux, SYNAPTICS_RC_LENGTH, rc_length, sizeof(rc_length));
ret = drm_dp_dpcd_write(aux, SYNAPTICS_RC_COMMAND, &rc_cmd, sizeof(rc_cmd));
ret = drm_dp_dpcd_write(aux, DP_DSC_ENABLE, &enable, 1);
ret = drm_dp_dpcd_write(aux, DP_DSC_ENABLE, &enable, 1);
ret = drm_dp_dpcd_write(port->passthrough_aux,
ret = drm_dp_dpcd_write(aconnector->dsc_aux,
ret = drm_dp_dpcd_write(aconnector->dsc_aux,
ret = drm_dp_dpcd_write(port->passthrough_aux,
res = drm_dp_dpcd_write(aux_dev->aux, pos, buf, todo);
EXPORT_SYMBOL(drm_dp_dpcd_write);
if (drm_dp_dpcd_write(&intel_dp->aux, DP_SOURCE_OUI, oui, sizeof(oui)) < 0) {
if (drm_dp_dpcd_write(&intel_dp->aux, DP_SINK_COUNT_ESI + 1,
if (drm_dp_dpcd_write(&intel_dp->aux, INTEL_EDP_BRIGHTNESS_NITS_LSB, buf,
ret = drm_dp_dpcd_write(&intel_dp->aux,
ret = drm_dp_dpcd_write(&intel_dp->aux,
ret = drm_dp_dpcd_write(aux,
dpcd_ret = drm_dp_dpcd_write(&dig_port->dp.aux, DP_AUX_HDCP_AN,
dpcd_ret = drm_dp_dpcd_write(&dig_port->dp.aux, DP_AUX_HDCP_AKSV,
return drm_dp_dpcd_write(&intel_dp->aux, reg, &val, 1) == 1;
return drm_dp_dpcd_write(&intel_dp->aux, reg, buf, len) == len;
ret = drm_dp_dpcd_write(&intel_dp->aux, reg,
drm_dp_dpcd_write(&intel_dp->aux, DP_DOWNSPREAD_CTRL, link_config, 2);
drm_dp_dpcd_write(&intel_dp->aux, DP_LINK_BW_SET, link_config,
drm_dp_dpcd_write(&intel_dp->aux, DP_TRAINING_LANE0_SET,
ret = drm_dp_dpcd_write(aux, reg, data, 8);
ret = drm_dp_dpcd_write(aux, reg, &avi_if_ctrl, 1);
ret = drm_dp_dpcd_write(aux, reg, (void *)data, 1);
ret = drm_dp_dpcd_write(aux, reg, &val, 1);
ssize_t drm_dp_dpcd_write(struct drm_dp_aux *aux, unsigned int offset,
ret = drm_dp_dpcd_write(aux, offset, buffer, size);
return drm_dp_dpcd_write(aux, offset, &value, 1);
drm_dp_dpcd_write(dp_info->aux, DP_TRAINING_LANE0_SET,