drm_dp_dpcd_read
ret = drm_dp_dpcd_read(&sc->sc_aux, DP_EDP_DPCD_REV, edp_dpcd,
if (DP_RECEIVER_CAP_SIZE != drm_dp_dpcd_read(&sc->sc_dpaux,
if (drm_dp_dpcd_read(&amdgpu_connector->ddc_bus->aux, DP_SINK_OUI, buf, 3) == 3)
if (drm_dp_dpcd_read(&amdgpu_connector->ddc_bus->aux, DP_BRANCH_OUI, buf, 3) == 3)
ret = drm_dp_dpcd_read(&amdgpu_connector->ddc_bus->aux,
ret = drm_dp_dpcd_read(&amdgpu_connector->ddc_bus->aux, DP_DPCD_REV,
ret = drm_dp_dpcd_read(mgr->aux, DP_GUID, buf, sizeof(buf));
return drm_dp_dpcd_read(&aconnector->dm_dp_aux.aux, address, data,
drm_dp_dpcd_read(aux, SYNAPTICS_RC_COMMAND, &rc_cmd, sizeof(rc_cmd));
drm_dp_dpcd_read(aux, SYNAPTICS_RC_RESULT, &rc_result, sizeof(rc_result));
drm_dp_dpcd_read(aux, SYNAPTICS_RC_DATA, data, length);
if (drm_dp_dpcd_read(aux, DP_LINK_BW_SET, data, 16) != 16)
if (drm_dp_dpcd_read(port->mgr->aux, DP_BRANCH_VENDOR_SPECIFIC_START, &branch_vendor_data, 4) == 4) {
if (drm_dp_dpcd_read(aconnector->dsc_aux, DP_DSC_SUPPORT, dsc_caps, 16) < 0)
if (drm_dp_dpcd_read(aconnector->dsc_aux,
if (drm_dp_dpcd_read(aconnector->dsc_aux, DP_DOWNSTREAMPORT_PRESENT, &ds_port_present, 1) < 0) {
dret = drm_dp_dpcd_read(
res = drm_dp_dpcd_read(aux_dev->aux, pos, buf, todo);
EXPORT_SYMBOL(drm_dp_dpcd_read);
if (drm_dp_dpcd_read(&intel_dp->aux, DP_SOURCE_OUI, buf, sizeof(buf)) < 0)
if (drm_dp_dpcd_read(&intel_dp->aux, DP_PCON_DSC_ENCODER,
if (drm_dp_dpcd_read(aux, DP_DSC_SUPPORT, dsc_dpcd,
drm_dp_dpcd_read(&intel_dp->aux, DP_SUPPORTED_LINK_RATES,
if (drm_dp_dpcd_read(&intel_dp->aux, DP_EDP_DPCD_REV,
if (drm_dp_dpcd_read(&intel_dp->aux, DP_SINK_COUNT_ESI, esi, 3) != 3)
return drm_dp_dpcd_read(&intel_dp->aux, DP_SINK_COUNT_ESI, esi, 4) == 4;
if (drm_dp_dpcd_read(&intel_dp->aux, DP_LANE0_1_STATUS_ESI, link_status,
ret = drm_dp_dpcd_read(aux, INTEL_EDP_HDR_TCON_CAP0, tcon_cap, sizeof(tcon_cap));
if (drm_dp_dpcd_read(&intel_dp->aux, INTEL_EDP_BRIGHTNESS_NITS_LSB, buf,
ret = drm_dp_dpcd_read(&intel_dp->aux, DP_EDP_PANEL_TARGET_LUMINANCE_VALUE, buf,
ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_AUX_HDCP_BINFO,
ret = drm_dp_dpcd_read(aux, DP_AUX_HDCP_BCAPS,
ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_AUX_HDCP_RI_PRIME,
ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_AUX_HDCP_BSTATUS,
ret = drm_dp_dpcd_read(&dig_port->dp.aux,
ret = drm_dp_dpcd_read(&dig_port->dp.aux,
ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_AUX_HDCP_BSTATUS,
ret = drm_dp_dpcd_read(aux,
ret = drm_dp_dpcd_read(aux,
ret = drm_dp_dpcd_read(aux, offset,
ret = drm_dp_dpcd_read(aux,
ret = drm_dp_dpcd_read(&dig_port->dp.aux, DP_AUX_HDCP_BKSV, bksv,
drm_dp_dpcd_read(&intel_dp->aux, DP_SUPPORTED_LINK_RATES,
status = drm_dp_dpcd_read(&intel_dp->aux, DP_TEST_H_WIDTH_HI,
status = drm_dp_dpcd_read(&intel_dp->aux, DP_TEST_V_HEIGHT_HI,
ret = drm_dp_dpcd_read(&intel_dp->aux, get_hdr_status_reg(lspcon),
ret = drm_dp_dpcd_read(aux, LSPCON_PARADE_AVI_IF_CTRL,
ret = drm_dp_dpcd_read(aux, reg, &val, 1);
ret = drm_dp_dpcd_read(aux, reg, &val, 1);
ret = drm_dp_dpcd_read(aux, reg, &val, 1);
ret = drm_dp_dpcd_read(aux, reg, &val, 1);
r = drm_dp_dpcd_read(&intel_dp->aux,
r = drm_dp_dpcd_read(&intel_dp->aux,
ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset,
ret = drm_dp_dpcd_read(aux, offset, buffer, size);
return drm_dp_dpcd_read(aux, offset, valuep, 1);
if (drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, DP_SINK_OUI, buf, 3) == 3)
if (drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, DP_BRANCH_OUI, buf, 3) == 3)
ret = drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, DP_DPCD_REV, msg,