sys/dev/pci/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c

534

.dpp_reset = dpp_reset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.h

1457

void dpp_reset(struct dpp *dpp_base);

sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp.c

376

.dpp_reset = dpp_reset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn201/dcn201_dpp.c

267

.dpp_reset = dpp_reset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1468

.dpp_reset = dpp_reset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn32/dcn32_dpp.c

110

.dpp_reset = dpp_reset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.c

98

.dpp_reset = dpp_reset,

sys/dev/pci/drm/amd/display/dc/dpp/dcn401/dcn401_dpp.c

225

.dpp_reset = dpp_reset,

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1505

dpp->funcs->dpp_reset(dpp);

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

1667

dpp->funcs->dpp_reset(dpp);

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

3180

dpp->funcs->dpp_reset(dpp);

sys/dev/pci/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

290

dpp->funcs->dpp_reset(dpp);

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

719

dpp->funcs->dpp_reset(dpp);

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

886

dpp->funcs->dpp_reset(dpp);

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

2672

dpp->funcs->dpp_reset(dpp);

sys/dev/pci/drm/amd/display/dc/inc/hw/dpp.h

228

void (*dpp_reset)(struct dpp *dpp);