sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

419

static const struct dcn3_dpp_registers dpp_regs[] = {

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

420

dpp_regs(0),

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

421

dpp_regs(1),

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

422

dpp_regs(2),

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

423

dpp_regs(3),

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

424

dpp_regs(4),

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

425

dpp_regs(5),

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

759

&dpp_regs[inst], &tf_shift, &tf_mask))

sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

408

static const struct dcn3_dpp_registers dpp_regs[] = {

sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

409

dpp_regs(0),

sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

410

dpp_regs(1),

sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

411

dpp_regs(2),

sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

412

dpp_regs(3),

sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

723

&dpp_regs[inst], &tf_shift, &tf_mask))

sys/dev/pci/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

522

static const struct dcn3_dpp_registers dpp_regs[] = {

sys/dev/pci/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

523

dpp_regs(0),

sys/dev/pci/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

524

dpp_regs(1),

sys/dev/pci/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

525

dpp_regs(2),

sys/dev/pci/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

526

dpp_regs(3),

sys/dev/pci/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

527

dpp_regs(4)

sys/dev/pci/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

545

if (dpp3_construct(dpp, ctx, inst, &dpp_regs[inst], &tf_shift, &tf_mask))

sys/dev/pci/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

503

static const struct dcn3_dpp_registers dpp_regs[] = {

sys/dev/pci/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

504

dpp_regs(0),

sys/dev/pci/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

505

dpp_regs(1)

sys/dev/pci/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

523

if (dpp3_construct(dpp, ctx, inst, &dpp_regs[inst], &tf_shift, &tf_mask))

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

481

static const struct dcn3_dpp_registers dpp_regs[] = {

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

482

dpp_regs(0),

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

483

dpp_regs(1),

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

484

dpp_regs(2),

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

485

dpp_regs(3)

sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

925

&dpp_regs[inst], &tf_shift, &tf_mask))

sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

487

static const struct dcn3_dpp_registers dpp_regs[] = {

sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

488

dpp_regs(0),

sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

489

dpp_regs(1),

sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

490

dpp_regs(2),

sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

491

dpp_regs(3)

sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

961

&dpp_regs[inst], &tf_shift, &tf_mask))

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

484

static const struct dcn3_dpp_registers dpp_regs[] = {

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

485

dpp_regs(0),

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

486

dpp_regs(1),

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

487

dpp_regs(2),

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

488

dpp_regs(3)

sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

923

&dpp_regs[inst], &tf_shift, &tf_mask))

sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

475

static const struct dcn3_dpp_registers dpp_regs[] = {

sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

476

dpp_regs(0),

sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

477

dpp_regs(1),

sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

478

dpp_regs(2),

sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

479

dpp_regs(3)

sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

917

&dpp_regs[inst], &tf_shift, &tf_mask))

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

369

static struct dcn3_dpp_registers dpp_regs[4];

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

931

#define REG_STRUCT dpp_regs

sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

938

&dpp_regs[inst], &tf_shift, &tf_mask))

sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

368

static struct dcn3_dpp_registers dpp_regs[4];

sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

925

#define REG_STRUCT dpp_regs

sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

932

&dpp_regs[inst], &tf_shift, &tf_mask))

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

388

static struct dcn3_dpp_registers dpp_regs[4];

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

817

#define REG_STRUCT dpp_regs

sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

823

success = dpp35_construct(dpp, ctx, inst, &dpp_regs[inst], &tf_shift,

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

368

static struct dcn3_dpp_registers dpp_regs[4];

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

797

#define REG_STRUCT dpp_regs

sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

803

success = dpp35_construct(dpp, ctx, inst, &dpp_regs[inst], &tf_shift,

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

369

static struct dcn3_dpp_registers dpp_regs[4];

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

798

#define REG_STRUCT dpp_regs

sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

804

success = dpp35_construct(dpp, ctx, inst, &dpp_regs[inst], &tf_shift,

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

349

static struct dcn401_dpp_registers dpp_regs[4];

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

924

#define REG_STRUCT dpp_regs

sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

931

&dpp_regs[inst], &tf_shift, &tf_mask))