Symbol: dpcd_caps
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
13072
amdgpu_dm_connector->dc_link->dpcd_caps.allow_invalid_MSA_timing_param) {
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
181
switch (link->dpcd_caps.dongle_type) {
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
5606
link->dpcd_caps.psr_info.psr_version,
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
5607
link->dpcd_caps.psr_info.psr_dpcd_caps.raw,
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
5608
link->dpcd_caps.psr_info.psr2_su_y_granularity_cap);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7017
if (sink->link->dpcd_caps.dongle_type == DISPLAY_DONGLE_NONE ||
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7018
sink->link->dpcd_caps.dongle_type == DISPLAY_DONGLE_DP_HDMI_CONVERTER)
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7020
aconnector->dc_link->dpcd_caps.dsc_caps.dsc_basic_caps.raw,
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7021
aconnector->dc_link->dpcd_caps.dsc_caps.dsc_branch_decoder_caps.raw,
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7119
if (sink->link->dpcd_caps.dongle_type == DISPLAY_DONGLE_NONE) {
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7131
} else if (sink->link->dpcd_caps.dongle_type == DISPLAY_DONGLE_DP_HDMI_CONVERTER) {
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7337
stream->use_vsc_sdp_for_colorimetry = stream->link->dpcd_caps.dpcd_rev.raw >= 0x14 &&
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7338
stream->link->dpcd_caps.dprx_feature.bits.VSC_SDP_COLORIMETRY_SUPPORTED &&
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7911
aconnector->dc_link->dpcd_caps.dongle_type == DISPLAY_DONGLE_DP_HDMI_CONVERTER))
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
1070
seq_printf(m, "Sink support: %s", str_yes_no(link->dpcd_caps.psr_info.psr_version != 0));
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
1071
if (link->dpcd_caps.psr_info.psr_version)
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
1072
seq_printf(m, " [0x%02x]", link->dpcd_caps.psr_info.psr_version);
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
1372
struct dpcd_caps dpcd_caps;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
1392
dpcd_caps = aconnector->dc_link->dpcd_caps;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
1404
is_fec_supported = dpcd_caps.fec_cap.raw & 0x1;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
1405
is_dsc_supported = dpcd_caps.dsc_caps.dsc_basic_caps.raw[0] & 0x1;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
3403
dpcd_rev = link->dpcd_caps.dpcd_rev.raw;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
3475
if (param[1] >= link->dpcd_caps.edp_supported_link_rates_count)
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
3495
prefer_link_settings.link_rate = link->dpcd_caps.edp_supported_link_rates[param[1]];
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
578
struct dc_lttpr_caps caps = aconnector->dc_link->dpcd_caps.lttpr_caps;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c
569
link->dp.rev = aconnector->dc_link->dpcd_caps.dpcd_rev.raw;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
1391
struct dpcd_caps *dpcd_caps = &link->dpcd_caps;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
1394
switch (dpcd_caps->dongle_type) {
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
1396
if (dpcd_caps->adaptive_sync_caps.dp_adap_sync_caps.bits.ADAPTIVE_SYNC_SDP_SUPPORT == true &&
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
1397
dpcd_caps->allow_invalid_MSA_timing_param == true &&
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
1398
dm_is_freesync_pcon_whitelist(dpcd_caps->branch_dev_id))
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
805
memcmp(stream->link->dpcd_caps.branch_dev_name,
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
893
if (stream->sink->link->dpcd_caps.dongle_type == DISPLAY_DONGLE_NONE) {
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
898
} else if (stream->sink->link->dpcd_caps.dongle_type == DISPLAY_DONGLE_DP_HDMI_CONVERTER) {
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
1369
(!(dc_link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT ||
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
1370
dc_link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_PASSTHROUGH_SUPPORT)))
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
1624
&dc_link->dpcd_caps.dsc_caps.dsc_basic_caps;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
244
if (link->dpcd_caps.branch_dev_id == DP_BRANCH_DEVICE_ID_90CC24 &&
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
245
(link->dpcd_caps.dpcd_rev.raw == DPCD_REV_14 || link->dpcd_caps.dpcd_rev.raw == DPCD_REV_12) &&
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
246
link->dpcd_caps.sink_count.bits.SINK_COUNT >= 2)
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
258
if (link->dpcd_caps.branch_dev_id == DP_BRANCH_DEVICE_ID_90CC24 &&
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
259
IS_SYNAPTICS_CASCADED_PANAMERA(link->dpcd_caps.branch_dev_name, branch_vendor_data)) {
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
732
if (link_status->dpcd_caps->dpcd_rev.raw < 0x12) {
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c
46
if (!link->dpcd_caps.alpm_caps.bits.AUX_WAKE_ALPM_CAP ||
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c
47
!link->dpcd_caps.psr_info.psr_dpcd_caps.bits.Y_COORDINATE_REQUIRED)
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c
50
if (link->dpcd_caps.psr_info.psr_dpcd_caps.bits.SU_GRANULARITY_REQUIRED &&
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c
51
!link->dpcd_caps.psr_info.psr2_su_y_granularity_cap)
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c
78
if (link->dpcd_caps.psr_info.psr_version == 0) {
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_replay.c
45
struct dpcd_caps *dpcd_caps = &link->dpcd_caps;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_replay.c
46
struct adaptive_sync_caps *as_caps = &link->dpcd_caps.adaptive_sync_caps;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_replay.c
55
if (dpcd_caps->edp_rev < EDP_REVISION_13)
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_replay.c
58
if (!dpcd_caps->alpm_caps.bits.AUX_WAKE_ALPM_CAP)
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_replay.c
66
if (dpcd_caps->pr_info.pixel_deviation_per_line == 0 ||
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_replay.c
67
dpcd_caps->pr_info.max_deviation_line == 0)
sys/dev/pci/drm/amd/display/dc/core/dc.c
1968
if (link->dpcd_caps.dprx_feature.bits.VSC_SDP_COLORIMETRY_SUPPORTED) {
sys/dev/pci/drm/amd/display/dc/core/dc.c
1973
if (link->dpcd_caps.channel_coding_cap.bits.DP_128b_132b_SUPPORTED) {
sys/dev/pci/drm/amd/display/dc/core/dc.c
307
link->link_status.dpcd_caps = &link->dpcd_caps;
sys/dev/pci/drm/amd/display/dc/core/dc_link_exports.c
338
if (link->dpcd_caps.dongle_type >= DISPLAY_DONGLE_DP_DVI_DONGLE &&
sys/dev/pci/drm/amd/display/dc/core/dc_link_exports.c
339
link->dpcd_caps.dongle_type <= DISPLAY_DONGLE_DP_HDMI_MISMATCHED_DONGLE)
sys/dev/pci/drm/amd/display/dc/dc.h
1645
struct dpcd_caps dpcd_caps;
sys/dev/pci/drm/amd/display/dc/dc.h
2542
struct hblank_expansion_dpcd_caps dpcd_caps;
sys/dev/pci/drm/amd/display/dc/dc_types.h
985
struct dpcd_caps *dpcd_caps;
sys/dev/pci/drm/amd/display/dc/dce/dmub_psr.c
389
link->dpcd_caps.sink_dev_id == DP_DEVICE_ID_38EC11 &&
sys/dev/pci/drm/amd/display/dc/dce/dmub_psr.c
390
!memcmp(link->dpcd_caps.sink_dev_id_str, DP_SINK_DEVICE_STR_ID_1,
sys/dev/pci/drm/amd/display/dc/dce/dmub_psr.c
396
if (((link->dpcd_caps.fec_cap.bits.FEC_CAPABLE &&
sys/dev/pci/drm/amd/display/dc/dce/dmub_psr.c
398
(link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT &&
sys/dev/pci/drm/amd/display/dc/dce/dmub_psr.c
401
link->dpcd_caps.sink_dev_id == DP_DEVICE_ID_38EC11 &&
sys/dev/pci/drm/amd/display/dc/dce/dmub_psr.c
402
(!memcmp(link->dpcd_caps.sink_dev_id_str, DP_SINK_DEVICE_STR_ID_1,
sys/dev/pci/drm/amd/display/dc/dce/dmub_psr.c
404
!memcmp(link->dpcd_caps.sink_dev_id_str, DP_SINK_DEVICE_STR_ID_2,
sys/dev/pci/drm/amd/display/dc/dce/dmub_psr.c
411
link->dpcd_caps.sink_dev_id == DP_DEVICE_ID_0022B9 &&
sys/dev/pci/drm/amd/display/dc/dce/dmub_psr.c
412
!memcmp(link->dpcd_caps.sink_dev_id_str, DP_SINK_DEVICE_STR_ID_3,
sys/dev/pci/drm/amd/display/dc/dce/dmub_psr.c
419
if (link->dpcd_caps.sink_dev_id == DP_BRANCH_DEVICE_ID_001CF8)
sys/dev/pci/drm/amd/display/dc/dce/dmub_replay.c
168
copy_settings_data->pixel_deviation_per_line = link->dpcd_caps.pr_info.pixel_deviation_per_line;
sys/dev/pci/drm/amd/display/dc/dce/dmub_replay.c
169
copy_settings_data->max_deviation_line = link->dpcd_caps.pr_info.max_deviation_line;
sys/dev/pci/drm/amd/display/dc/dce/dmub_replay.c
180
if (((link->dpcd_caps.fec_cap.bits.FEC_CAPABLE &&
sys/dev/pci/drm/amd/display/dc/dce/dmub_replay.c
182
(link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT &&
sys/dev/pci/drm/amd/display/dc/dce/dmub_replay.c
185
link->dpcd_caps.sink_dev_id == DP_DEVICE_ID_38EC11 &&
sys/dev/pci/drm/amd/display/dc/dce/dmub_replay.c
186
(!memcmp(link->dpcd_caps.sink_dev_id_str, DP_SINK_DEVICE_STR_ID_1,
sys/dev/pci/drm/amd/display/dc/dce/dmub_replay.c
188
!memcmp(link->dpcd_caps.sink_dev_id_str, DP_SINK_DEVICE_STR_ID_2,
sys/dev/pci/drm/amd/display/dc/hdcp/hdcp_msg.c
351
(link->dpcd_caps.dongle_type == DISPLAY_DONGLE_DP_VGA_CONVERTER ||
sys/dev/pci/drm/amd/display/dc/hdcp/hdcp_msg.c
352
link->dpcd_caps.dongle_caps.dongle_type == DISPLAY_DONGLE_DP_VGA_CONVERTER)) {
sys/dev/pci/drm/amd/display/dc/link/accessories/link_dp_cts.c
815
if (link->dpcd_caps.dpcd_rev.raw >= DPCD_REV_12) {
sys/dev/pci/drm/amd/display/dc/link/accessories/link_dp_cts.c
835
} else if (link->dpcd_caps.dpcd_rev.raw >= DPCD_REV_10 ||
sys/dev/pci/drm/amd/display/dc/link/accessories/link_dp_cts.c
836
link->dpcd_caps.dpcd_rev.raw == 0) {
sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_dio.c
130
link->dpcd_caps.dprx_feature.bits.SST_SPLIT_SDP_CAP);
sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_dio_fixed_vs_pe_retimer.c
83
if (!link->dpcd_caps.lttpr_caps.main_link_channel_coding.bits.DP_128b_132b_SUPPORTED)
sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_hpo_fixed_vs_pe_retimer_dp.c
129
if (!link->dpcd_caps.lttpr_caps.main_link_channel_coding.bits.DP_128b_132b_SUPPORTED)
sys/dev/pci/drm/amd/display/dc/link/link_detection.c
1005
(link->dpcd_caps.dongle_type !=
sys/dev/pci/drm/amd/display/dc/link/link_detection.c
1014
if (link->dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dp_tunneling
sys/dev/pci/drm/amd/display/dc/link/link_detection.c
1015
&& link->dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dpia_bw_alloc
sys/dev/pci/drm/amd/display/dc/link/link_detection.c
1016
&& link->dpcd_caps.usb4_dp_tun_info.driver_bw_cap.bits.driver_bw_alloc_support) {
sys/dev/pci/drm/amd/display/dc/link/link_detection.c
1018
link->dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dpia_bw_alloc = false;
sys/dev/pci/drm/amd/display/dc/link/link_detection.c
1031
if (link->dpcd_caps.sink_count.bits.SINK_COUNT)
sys/dev/pci/drm/amd/display/dc/link/link_detection.c
1033
link->dpcd_caps.sink_count.bits.SINK_COUNT;
sys/dev/pci/drm/amd/display/dc/link/link_detection.c
1089
link->dpcd_caps.dongle_type ==
sys/dev/pci/drm/amd/display/dc/link/link_detection.c
1311
link->dpcd_caps.is_mst_capable)
sys/dev/pci/drm/amd/display/dc/link/link_detection.c
564
if (link_rate_set < link->dpcd_caps.edp_supported_link_rates_count) {
sys/dev/pci/drm/amd/display/dc/link/link_detection.c
566
link->dpcd_caps.edp_supported_link_rates[link_rate_set];
sys/dev/pci/drm/amd/display/dc/link/link_detection.c
614
link->dpcd_caps.dongle_type = sink_caps->dongle_type;
sys/dev/pci/drm/amd/display/dc/link/link_detection.c
615
link->dpcd_caps.is_dongle_type_one = sink_caps->is_dongle_type_one;
sys/dev/pci/drm/amd/display/dc/link/link_detection.c
616
link->dpcd_caps.dpcd_rev.raw = 0;
sys/dev/pci/drm/amd/display/dc/link/link_detection.c
617
link->dpcd_caps.usb4_dp_tun_info.dp_tun_cap.raw = 0;
sys/dev/pci/drm/amd/display/dc/link/link_detection.c
697
link->dpcd_caps.branch_dev_id == DP_BRANCH_DEVICE_ID_90CC24 &&
sys/dev/pci/drm/amd/display/dc/link/link_detection.c
698
link->dpcd_caps.branch_hw_revision == DP_BRANCH_HW_REV_20 &&
sys/dev/pci/drm/amd/display/dc/link/link_detection.c
699
link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT &&
sys/dev/pci/drm/amd/display/dc/link/link_detection.c
705
link->dpcd_caps.branch_dev_id == DP_BRANCH_DEVICE_ID_90CC24 &&
sys/dev/pci/drm/amd/display/dc/link/link_detection.c
706
link->dpcd_caps.branch_vendor_specific_data[2] == MST_HUB_ID_0x5A &&
sys/dev/pci/drm/amd/display/dc/link/link_detection.c
707
link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT &&
sys/dev/pci/drm/amd/display/dc/link/link_detection.c
844
if (link->dpcd_caps.is_mst_capable ||
sys/dev/pci/drm/amd/display/dc/link/link_detection.c
884
struct dpcd_caps prev_dpcd_caps;
sys/dev/pci/drm/amd/display/dc/link/link_detection.c
916
memcpy(&prev_dpcd_caps, &link->dpcd_caps, sizeof(struct dpcd_caps));
sys/dev/pci/drm/amd/display/dc/link/link_detection.c
961
link->dpcd_caps.sink_dev_id == DP_BRANCH_DEVICE_ID_0022B9 &&
sys/dev/pci/drm/amd/display/dc/link/link_detection.c
962
memcmp(&link->dpcd_caps.branch_dev_name, DP_SINK_BRANCH_DEV_NAME_7580,
sys/dev/pci/drm/amd/display/dc/link/link_detection.c
963
sizeof(link->dpcd_caps.branch_dev_name)) == 0) {
sys/dev/pci/drm/amd/display/dc/link/link_detection.c
966
if (!link->dpcd_caps.set_power_state_capable_edp)
sys/dev/pci/drm/amd/display/dc/link/link_detection.c
995
link->dpcd_caps.sink_count.bits.SINK_COUNT == 0) {
sys/dev/pci/drm/amd/display/dc/link/link_dpms.c
2082
} else if (link->dpcd_caps.is_mst_capable &&
sys/dev/pci/drm/amd/display/dc/link/link_factory.c
471
link->link_status.dpcd_caps = &link->dpcd_caps;
sys/dev/pci/drm/amd/display/dc/link/link_factory.c
771
link->link_status.dpcd_caps = &link->dpcd_caps;
sys/dev/pci/drm/amd/display/dc/link/link_validation.c
148
if (dpcd_caps->channel_coding_cap.bits.DP_128b_132b_SUPPORTED == 0 &&
sys/dev/pci/drm/amd/display/dc/link/link_validation.c
149
dpcd_caps->dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_PASSTHROUGH_SUPPORT == 0 &&
sys/dev/pci/drm/amd/display/dc/link/link_validation.c
285
!link->dpcd_caps.dprx_feature.bits.VSC_SDP_COLORIMETRY_SUPPORTED &&
sys/dev/pci/drm/amd/display/dc/link/link_validation.c
306
bool is_max_uncompressed_pixel_rate_exceeded = link->dpcd_caps.max_uncompressed_pixel_rate_cap.bits.valid &&
sys/dev/pci/drm/amd/display/dc/link/link_validation.c
307
timing->pix_clk_100hz > link->dpcd_caps.max_uncompressed_pixel_rate_cap.bits.max_uncompressed_pixel_rate_cap * 10000;
sys/dev/pci/drm/amd/display/dc/link/link_validation.c
338
struct dpcd_caps *dpcd_caps = &link->dpcd_caps;
sys/dev/pci/drm/amd/display/dc/link/link_validation.c
351
if (!dp_active_dongle_validate_timing(timing, dpcd_caps))
sys/dev/pci/drm/amd/display/dc/link/link_validation.c
58
const struct dpcd_caps *dpcd_caps)
sys/dev/pci/drm/amd/display/dc/link/link_validation.c
60
const struct dc_dongle_caps *dongle_caps = &dpcd_caps->dongle_caps;
sys/dev/pci/drm/amd/display/dc/link/link_validation.c
62
switch (dpcd_caps->dongle_type) {
sys/dev/pci/drm/amd/display/dc/link/link_validation.c
74
if (dpcd_caps->dongle_type == DISPLAY_DONGLE_DP_HDMI_CONVERTER &&
sys/dev/pci/drm/amd/display/dc/link/protocols/link_ddc.c
217
if (link->dpcd_caps.dongle_type == DISPLAY_DONGLE_DP_VGA_CONVERTER &&
sys/dev/pci/drm/amd/display/dc/link/protocols/link_ddc.c
218
link->dpcd_caps.branch_dev_id == DP_BRANCH_DEVICE_ID_0080E1 &&
sys/dev/pci/drm/amd/display/dc/link/protocols/link_ddc.c
219
(link->dpcd_caps.branch_fw_revision[0] < 0x01 ||
sys/dev/pci/drm/amd/display/dc/link/protocols/link_ddc.c
220
(link->dpcd_caps.branch_fw_revision[0] == 0x01 &&
sys/dev/pci/drm/amd/display/dc/link/protocols/link_ddc.c
221
link->dpcd_caps.branch_fw_revision[1] < 0x40)) &&
sys/dev/pci/drm/amd/display/dc/link/protocols/link_ddc.c
222
!memcmp(link->dpcd_caps.branch_dev_name,
sys/dev/pci/drm/amd/display/dc/link/protocols/link_ddc.c
224
sizeof(link->dpcd_caps.branch_dev_name)))
sys/dev/pci/drm/amd/display/dc/link/protocols/link_ddc.c
229
if (link->dpcd_caps.branch_dev_id == DP_BRANCH_DEVICE_ID_0080E1 &&
sys/dev/pci/drm/amd/display/dc/link/protocols/link_ddc.c
230
!memcmp(link->dpcd_caps.branch_dev_name,
sys/dev/pci/drm/amd/display/dc/link/protocols/link_ddc.c
232
sizeof(link->dpcd_caps.branch_dev_name)))
sys/dev/pci/drm/amd/display/dc/link/protocols/link_ddc.c
235
if (link->dpcd_caps.branch_dev_id == DP_BRANCH_DEVICE_ID_006037 &&
sys/dev/pci/drm/amd/display/dc/link/protocols/link_ddc.c
236
!memcmp(link->dpcd_caps.branch_dev_name,
sys/dev/pci/drm/amd/display/dc/link/protocols/link_ddc.c
238
sizeof(link->dpcd_caps.branch_dev_name)))
sys/dev/pci/drm/amd/display/dc/link/protocols/link_ddc.c
418
switch (link->dpcd_caps.lttpr_caps.phy_repeater_cnt) {
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1041
link->dpcd_caps.branch_dev_id =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1047
link->dpcd_caps.branch_dev_name,
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
109
return (link->dpcd_caps.dongle_type >= DISPLAY_DONGLE_DP_VGA_CONVERTER) &&
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
110
(link->dpcd_caps.dongle_type <= DISPLAY_DONGLE_DP_HDMI_CONVERTER);
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1105
link->dpcd_caps.dongle_caps.dp_hdmi_regulated_autonomous_mode_support =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1108
if (link->dpcd_caps.dongle_caps.dp_hdmi_regulated_autonomous_mode_support) {
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1119
if (link->dpcd_caps.dongle_caps.dp_hdmi_regulated_autonomous_mode_support &&
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1128
link->dpcd_caps.dongle_caps.dp_hdmi_frl_max_link_bw_in_kbps = intersect_frl_link_bw_support(
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1129
link->dpcd_caps.dongle_caps.dp_hdmi_frl_max_link_bw_in_kbps,
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1132
link->dpcd_caps.dongle_caps.dp_hdmi_frl_max_link_bw_in_kbps);
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1140
memset(&link->dpcd_caps.dongle_caps, 0, sizeof(link->dpcd_caps.dongle_caps));
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1144
link->dpcd_caps.dongle_type = DISPLAY_DONGLE_NONE;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1146
link->dpcd_caps.dongle_type);
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1147
link->dpcd_caps.is_branch_dev = false;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
115
return link->dpcd_caps.is_branch_dev;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1152
link->dpcd_caps.is_branch_dev = ds_port.fields.PORT_PRESENT;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1156
link->dpcd_caps.dongle_type = DISPLAY_DONGLE_DP_VGA_CONVERTER;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1161
link->dpcd_caps.dongle_type = DISPLAY_DONGLE_DP_DVI_CONVERTER;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1164
link->dpcd_caps.dongle_type = DISPLAY_DONGLE_NONE;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1168
if (link->dpcd_caps.dpcd_rev.raw >= DPCD_REV_11) {
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1178
link->dpcd_caps.dongle_type = DISPLAY_DONGLE_NONE;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1181
link->dpcd_caps.dongle_type =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1185
link->dpcd_caps.dongle_type =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1191
link->dpcd_caps.dongle_type =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1194
link->dpcd_caps.dongle_caps.dongle_type = link->dpcd_caps.dongle_type;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1201
link->dpcd_caps.dongle_caps.dp_hdmi_max_pixel_clk_in_khz =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1204
link->dpcd_caps.dongle_caps.is_dp_hdmi_s3d_converter =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1209
link->dpcd_caps.dongle_caps.is_dp_hdmi_ycbcr422_pass_through =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1211
link->dpcd_caps.dongle_caps.is_dp_hdmi_ycbcr420_pass_through =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1213
link->dpcd_caps.dongle_caps.is_dp_hdmi_ycbcr422_converter =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1215
link->dpcd_caps.dongle_caps.is_dp_hdmi_ycbcr420_converter =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1219
link->dpcd_caps.dongle_caps.dp_hdmi_max_bpc =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1225
link->dpcd_caps.dongle_caps.dp_hdmi_frl_max_link_bw_in_kbps =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1231
if (link->dpcd_caps.dongle_caps.dp_hdmi_frl_max_link_bw_in_kbps > 0)
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1232
link->dpcd_caps.dongle_caps.extendedCapValid = true;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1235
if (link->dpcd_caps.dongle_caps.dp_hdmi_max_pixel_clk_in_khz != 0)
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1236
link->dpcd_caps.dongle_caps.extendedCapValid = true;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1244
set_dongle_type(link->ddc, link->dpcd_caps.dongle_type);
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1255
link->dpcd_caps.branch_hw_revision =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1259
link->dpcd_caps.branch_fw_revision,
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1267
(uint8_t *)link->dpcd_caps.branch_vendor_specific_data,
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1268
sizeof(link->dpcd_caps.branch_vendor_specific_data));
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1270
if (link->dpcd_caps.dpcd_rev.raw >= DPCD_REV_14 &&
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1271
link->dpcd_caps.dongle_type != DISPLAY_DONGLE_NONE) {
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1279
link->dpcd_caps.dongle_caps.dfp_cap_ext.supported = dfp_cap_ext.fields.supported;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1280
link->dpcd_caps.dongle_caps.dfp_cap_ext.max_pixel_rate_in_mps =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1283
link->dpcd_caps.dongle_caps.dfp_cap_ext.max_video_h_active_width =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1286
link->dpcd_caps.dongle_caps.dfp_cap_ext.max_video_v_active_height =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1289
link->dpcd_caps.dongle_caps.dfp_cap_ext.encoding_format_caps =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1291
link->dpcd_caps.dongle_caps.dfp_cap_ext.rgb_color_depth_caps =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1293
link->dpcd_caps.dongle_caps.dfp_cap_ext.ycbcr444_color_depth_caps =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1295
link->dpcd_caps.dongle_caps.dfp_cap_ext.ycbcr422_color_depth_caps =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1297
link->dpcd_caps.dongle_caps.dfp_cap_ext.ycbcr420_color_depth_caps =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1300
DC_LOG_DP2("\tdfp_cap_ext.supported = %s", link->dpcd_caps.dongle_caps.dfp_cap_ext.supported ? "true" : "false");
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1301
DC_LOG_DP2("\tdfp_cap_ext.max_pixel_rate_in_mps = %d", link->dpcd_caps.dongle_caps.dfp_cap_ext.max_pixel_rate_in_mps);
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1302
DC_LOG_DP2("\tdfp_cap_ext.max_video_h_active_width = %d", link->dpcd_caps.dongle_caps.dfp_cap_ext.max_video_h_active_width);
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1303
DC_LOG_DP2("\tdfp_cap_ext.max_video_v_active_height = %d", link->dpcd_caps.dongle_caps.dfp_cap_ext.max_video_v_active_height);
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1343
link->dpcd_caps.dpcd_rev.raw =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1357
link->dpcd_caps.allow_invalid_MSA_timing_param =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1360
link->dpcd_caps.max_ln_count.raw = dpcd_data[
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1363
link->dpcd_caps.max_down_spread.raw = dpcd_data[
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1367
link->dpcd_caps.max_ln_count.bits.MAX_LANE_COUNT;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1371
link->dpcd_caps.max_down_spread.bits.MAX_DOWN_SPREAD ?
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1376
link->dpcd_caps.panel_mode_edp =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1378
link->dpcd_caps.dpcd_display_control_capable =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1453
link->dpcd_caps.branch_dev_id,
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1454
link->dpcd_caps.branch_dev_name[0],
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1455
link->dpcd_caps.branch_dev_name[1],
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1456
link->dpcd_caps.branch_dev_name[2],
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1457
link->dpcd_caps.branch_dev_name[3],
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1458
link->dpcd_caps.branch_dev_name[4],
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1459
link->dpcd_caps.branch_dev_name[5]);
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1469
if (!link->dpcd_caps.channel_coding_cap.bits.DP_128b_132b_SUPPORTED ||
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1470
link->dpcd_caps.cable_id.raw == 0 ||
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1475
&link->dpcd_caps.cable_id.raw,
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1476
sizeof(link->dpcd_caps.cable_id.raw));
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1507
link->dpcd_caps.cable_id.raw = 0;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1509
&link->dpcd_caps.cable_id.raw, sizeof(uint8_t));
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1512
link->dpcd_caps.cable_id = intersect_cable_id(
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1513
&link->dpcd_caps.cable_id, &usbc_cable_id);
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1569
link->dpcd_caps.panel_luminance_control = (edp_general_cap2 & DP_EDP_PANEL_LUMINANCE_CONTROL_CAPABLE) != 0;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1597
link->dpcd_caps.lttpr_caps.revision.raw =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1601
link->dpcd_caps.lttpr_caps.max_link_rate =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1605
link->dpcd_caps.lttpr_caps.phy_repeater_cnt =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1609
link->dpcd_caps.lttpr_caps.max_lane_count =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1613
link->dpcd_caps.lttpr_caps.mode =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1617
link->dpcd_caps.lttpr_caps.max_ext_timeout =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1620
link->dpcd_caps.lttpr_caps.main_link_channel_coding.raw =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1624
link->dpcd_caps.lttpr_caps.supported_128b_132b_rates.raw =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1628
link->dpcd_caps.lttpr_caps.alpm.raw =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1632
lttpr_count = dp_parse_lttpr_repeater_count(link->dpcd_caps.lttpr_caps.phy_repeater_cnt);
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1642
link->dpcd_caps.lttpr_caps.phy_repeater_cnt);
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1643
link->dpcd_caps.lttpr_caps.phy_repeater_cnt = 0x80;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1645
DC_LOG_DC("lttpr_caps forced phy_repeater_cnt = %d\n", link->dpcd_caps.lttpr_caps.phy_repeater_cnt);
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1659
link->dpcd_caps.lttpr_caps.lttpr_ieee_oui, sizeof(link->dpcd_caps.lttpr_caps.lttpr_ieee_oui));
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1661
link->dpcd_caps.lttpr_caps.lttpr_device_id, sizeof(link->dpcd_caps.lttpr_caps.lttpr_device_id));
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1664
CONN_DATA_DETECT(link, link->dpcd_caps.lttpr_caps.lttpr_ieee_oui, sizeof(link->dpcd_caps.lttpr_caps.lttpr_ieee_oui),
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1666
CONN_DATA_DETECT(link, link->dpcd_caps.lttpr_caps.lttpr_device_id, sizeof(link->dpcd_caps.lttpr_caps.lttpr_device_id),
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1669
CONN_DATA_DETECT(link, link->dpcd_caps.lttpr_caps.lttpr_ieee_oui, sizeof(link->dpcd_caps.lttpr_caps.lttpr_ieee_oui),
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1671
CONN_DATA_DETECT(link, link->dpcd_caps.lttpr_caps.lttpr_device_id, sizeof(link->dpcd_caps.lttpr_caps.lttpr_device_id),
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1732
&link->dpcd_caps.lttpr_caps.phy_repeater_cnt,
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1733
sizeof(link->dpcd_caps.lttpr_caps.phy_repeater_cnt));
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1769
link->dpcd_caps.ext_receiver_cap_field_present =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1792
link->dpcd_caps.dpcd_rev.raw =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1795
if (link->dpcd_caps.ext_receiver_cap_field_present) {
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1806
link->dpcd_caps.dprx_feature.raw = dpcd_dprx_data;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1821
link->dpcd_caps.adaptive_sync_caps.dp_adap_sync_caps.raw = dpcd_dprx_data;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1828
link->dpcd_caps.dprx_feature.raw = 0;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1846
link->dpcd_caps.is_mst_capable = read_is_mst_supported(link);
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1847
DC_LOG_DC("%s: MST_Support: %s\n", __func__, str_yes_no(link->dpcd_caps.is_mst_capable));
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1856
link->dpcd_caps.allow_invalid_MSA_timing_param =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1859
link->dpcd_caps.max_ln_count.raw = dpcd_data[
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1862
link->dpcd_caps.max_down_spread.raw = dpcd_data[
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1866
link->dpcd_caps.max_ln_count.bits.MAX_LANE_COUNT;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1870
link->dpcd_caps.max_down_spread.bits.MAX_DOWN_SPREAD ?
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1875
link->dpcd_caps.panel_mode_edp =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1877
link->dpcd_caps.dpcd_display_control_capable =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1879
link->dpcd_caps.channel_coding_cap.raw =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1884
link->dpcd_caps.receive_port0_cap.raw[0] =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1886
link->dpcd_caps.receive_port0_cap.raw[1] =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1892
&link->dpcd_caps.sink_count.raw,
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1893
sizeof(link->dpcd_caps.sink_count.raw));
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1901
link->dpcd_caps.sink_dev_id =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1907
link->dpcd_caps.sink_dev_id_str,
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1917
link->dpcd_caps.sink_hw_revision =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1921
link->dpcd_caps.sink_fw_revision,
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1934
if ((link->dpcd_caps.sink_dev_id == 0x0010fa) &&
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1935
!memcmp(link->dpcd_caps.sink_dev_id_str, str_mbp_2018,
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1937
(!memcmp(link->dpcd_caps.sink_fw_revision, fwrev_mbp_2018,
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1939
!memcmp(link->dpcd_caps.sink_fw_revision, fwrev_mbp_2018_vega,
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1945
memset(&link->dpcd_caps.dsc_caps, '\0',
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1946
sizeof(link->dpcd_caps.dsc_caps));
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1947
memset(&link->dpcd_caps.fec_cap, '\0', sizeof(link->dpcd_caps.fec_cap));
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1949
if (link->dpcd_caps.dpcd_rev.raw >= DPCD_REV_14) {
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1953
&link->dpcd_caps.fec_cap.raw,
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1954
sizeof(link->dpcd_caps.fec_cap.raw));
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1961
link->dpcd_caps.dsc_caps.dsc_basic_caps.raw,
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1962
sizeof(link->dpcd_caps.dsc_caps.dsc_basic_caps.raw));
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1964
is_fec_supported = link->dpcd_caps.fec_cap.bits.FEC_CAPABLE;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1965
is_dsc_basic_supported = link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1966
is_dsc_passthrough_supported = link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_PASSTHROUGH_SUPPORT;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1974
if (link->dpcd_caps.dongle_type != DISPLAY_DONGLE_NONE) {
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1978
link->dpcd_caps.dsc_caps.dsc_branch_decoder_caps.raw,
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1979
sizeof(link->dpcd_caps.dsc_caps.dsc_branch_decoder_caps.raw));
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1985
link->dpcd_caps.dsc_caps.dsc_branch_decoder_caps.fields.BRANCH_OVERALL_THROUGHPUT_0);
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1987
link->dpcd_caps.dsc_caps.dsc_branch_decoder_caps.fields.BRANCH_OVERALL_THROUGHPUT_1);
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1989
link->dpcd_caps.dsc_caps.dsc_branch_decoder_caps.fields.BRANCH_MAX_LINE_WIDTH);
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1997
link->dpcd_caps.is_branch_dev &&
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1998
link->dpcd_caps.branch_dev_id == DP_BRANCH_DEVICE_ID_90CC24 &&
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1999
link->dpcd_caps.branch_hw_revision == DP_BRANCH_HW_REV_10 &&
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2000
(link->dpcd_caps.fec_cap.bits.FEC_CAPABLE ||
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2001
link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT)) {
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2006
memset(&link->dpcd_caps.dsc_caps, '\0', sizeof(link->dpcd_caps.dsc_caps));
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2007
memset(&link->dpcd_caps.fec_cap, '\0', sizeof(link->dpcd_caps.fec_cap));
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2016
if (link->dpcd_caps.channel_coding_cap.bits.DP_128b_132b_SUPPORTED) {
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2022
&link->dpcd_caps.dp_128b_132b_supported_link_rates.raw,
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2023
sizeof(link->dpcd_caps.dp_128b_132b_supported_link_rates.raw));
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2024
if (link->dpcd_caps.dp_128b_132b_supported_link_rates.bits.UHBR20)
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2026
else if (link->dpcd_caps.dp_128b_132b_supported_link_rates.bits.UHBR13_5)
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2028
else if (link->dpcd_caps.dp_128b_132b_supported_link_rates.bits.UHBR10)
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2039
&link->dpcd_caps.fallback_formats.raw,
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2040
sizeof(link->dpcd_caps.fallback_formats.raw));
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2042
if (link->dpcd_caps.fallback_formats.bits.dp_1920x1080_60Hz_24bpp_support)
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2044
if (link->dpcd_caps.fallback_formats.bits.dp_1280x720_60Hz_24bpp_support)
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2046
if (link->dpcd_caps.fallback_formats.bits.dp_1024x768_60Hz_24bpp_support)
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2048
if (link->dpcd_caps.fallback_formats.raw == 0) {
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2050
link->dpcd_caps.fallback_formats.bits.dp_1920x1080_60Hz_24bpp_support = 1;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2055
&link->dpcd_caps.fec_cap1.raw,
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2056
sizeof(link->dpcd_caps.fec_cap1.raw));
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2058
if (link->dpcd_caps.fec_cap1.bits.AGGREGATED_ERROR_COUNTERS_CAPABLE)
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2064
link->dpcd_caps.max_uncompressed_pixel_rate_cap.raw,
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2065
sizeof(link->dpcd_caps.max_uncompressed_pixel_rate_cap.raw));
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2096
link->dpcd_caps.edp_supported_link_rates_count = 0;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2103
if (link->dpcd_caps.dpcd_rev.raw >= DPCD_REV_13) {
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2119
link->dpcd_caps.edp_supported_link_rates[link->dpcd_caps.edp_supported_link_rates_count] = link_rate;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2120
link->dpcd_caps.edp_supported_link_rates_count++;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2128
link->dpcd_caps.dynamic_backlight_capable_edp =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2134
link->dpcd_caps.set_power_state_capable_edp =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2140
&link->dpcd_caps.edp_rev,
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2141
sizeof(link->dpcd_caps.edp_rev));
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2145
if (link->dpcd_caps.edp_rev >= DP_EDP_13) {
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2147
&link->dpcd_caps.psr_info.psr_version,
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2148
sizeof(link->dpcd_caps.psr_info.psr_version));
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2149
if (link->dpcd_caps.sink_dev_id == DP_BRANCH_DEVICE_ID_001CF8)
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2151
&link->dpcd_caps.psr_info.force_psrsu_cap,
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2152
sizeof(link->dpcd_caps.psr_info.force_psrsu_cap));
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2154
&link->dpcd_caps.psr_info.psr_dpcd_caps.raw,
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2155
sizeof(link->dpcd_caps.psr_info.psr_dpcd_caps.raw));
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2156
if (link->dpcd_caps.psr_info.psr_dpcd_caps.bits.Y_COORDINATE_REQUIRED) {
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2158
&link->dpcd_caps.psr_info.psr2_su_y_granularity_cap,
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2159
sizeof(link->dpcd_caps.psr_info.psr2_su_y_granularity_cap));
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2166
if (link->dpcd_caps.dpcd_rev.raw >= DP_EDP_14)
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2168
&link->dpcd_caps.alpm_caps.raw,
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2169
sizeof(link->dpcd_caps.alpm_caps.raw));
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2175
&link->dpcd_caps.pr_info.pixel_deviation_per_line,
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2176
sizeof(link->dpcd_caps.pr_info.pixel_deviation_per_line));
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2178
&link->dpcd_caps.pr_info.max_deviation_line,
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2179
sizeof(link->dpcd_caps.pr_info.max_deviation_line));
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2186
(uint8_t *)&link->dpcd_caps.edp_oled_emission_rate,
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2187
sizeof(link->dpcd_caps.edp_oled_emission_rate));
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2193
if (link->dpcd_caps.dpcd_rev.raw >= DP_EDP_14)
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2197
(uint8_t *)&link->dpcd_caps.mso_cap_sst_links_supported,
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2198
sizeof(link->dpcd_caps.mso_cap_sst_links_supported));
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2203
(uint8_t *)&link->dpcd_caps.dp_edp_general_cap_2,
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2204
sizeof(link->dpcd_caps.dp_edp_general_cap_2));
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2272
if (!link->dpcd_caps.dp_128b_132b_supported_link_rates.bits.UHBR13_5)
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2297
if (!link->dpcd_caps.cable_id.bits.UHBR13_5_CAPABILITY &&
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2298
link->dpcd_caps.cable_id.bits.CABLE_TYPE >= 2)
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2308
if (link->dpcd_caps.lttpr_caps.revision.raw >= DPCD_REV_14) {
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2309
if (link->dpcd_caps.lttpr_caps.max_lane_count < max_link_cap.lane_count)
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2310
max_link_cap.lane_count = link->dpcd_caps.lttpr_caps.max_lane_count;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2316
if (!link->dpcd_caps.lttpr_caps.supported_128b_132b_rates.bits.UHBR13_5)
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2355
if (dp_is_lttpr_present(link) && link->dpcd_caps.lttpr_caps.max_ext_timeout > 0) {
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2356
uint8_t grant = link->dpcd_caps.lttpr_caps.max_ext_timeout & 0x80;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2520
return dp_parse_lttpr_repeater_count(link->dpcd_caps.lttpr_caps.phy_repeater_cnt);
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2540
if (link->dpcd_caps.alpm_caps.bits.AUX_LESS_ALPM_CAP) {
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2542
if (link->dpcd_caps.lttpr_caps.alpm.bits.AUX_LESS_ALPM_SUPPORTED)
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
2548
if (link->dpcd_caps.alpm_caps.bits.AUX_WAKE_ALPM_CAP) {
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
305
if (!link->dpcd_caps.dpcd_rev.raw) {
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
310
link->dpcd_caps.dpcd_rev.raw = dpcd_data[
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
313
} while (retry++ < 4 && !link->dpcd_caps.dpcd_rev.raw);
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
316
if (link->dpcd_caps.dongle_type == DISPLAY_DONGLE_DP_VGA_CONVERTER) {
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
317
switch (link->dpcd_caps.branch_dev_id) {
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
353
link->dpcd_caps.fec_cap.bits.FEC_CAPABLE);
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
367
&& (link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
388
uint32_t lttpr_count = dp_parse_lttpr_repeater_count(link->dpcd_caps.lttpr_caps.phy_repeater_cnt);
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
390
link->dpcd_caps.lttpr_caps.max_lane_count > 0 &&
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
391
link->dpcd_caps.lttpr_caps.max_lane_count <= 4);
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
432
switch (link->dpcd_caps.lttpr_caps.max_link_rate) {
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
437
lttpr_max_link_rate = link->dpcd_caps.lttpr_caps.max_link_rate;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
441
if (link->dpcd_caps.lttpr_caps.supported_128b_132b_rates.bits.UHBR20)
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
443
else if (link->dpcd_caps.lttpr_caps.supported_128b_132b_rates.bits.UHBR13_5)
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
445
else if (link->dpcd_caps.lttpr_caps.supported_128b_132b_rates.bits.UHBR10)
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
455
if (link->dpcd_caps.cable_id.bits.UHBR10_20_CAPABILITY & DP_UHBR20) {
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
457
} else if (link->dpcd_caps.cable_id.bits.UHBR13_5_CAPABILITY) {
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
459
} else if (link->dpcd_caps.cable_id.bits.UHBR10_20_CAPABILITY & DP_UHBR10) {
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
461
if (link->dpcd_caps.cable_id.bits.CABLE_TYPE < 2) {
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
562
return link->dpcd_caps.dp_128b_132b_supported_link_rates.bits.UHBR13_5 ?
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
575
if (current_link_setting->link_rate_set < link->dpcd_caps.edp_supported_link_rates_count) {
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
578
link->dpcd_caps.edp_supported_link_rates[current_link_setting->link_rate_set];
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
616
link->dpcd_caps.dp_128b_132b_supported_link_rates.bits.UHBR13_5 == 0)
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
780
initial_link_setting.link_rate = link->dpcd_caps.edp_supported_link_rates[0];
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
889
initial_link_setting.link_rate = link->dpcd_caps.edp_supported_link_rates[0];
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
920
link->dpcd_caps.edp_supported_link_rates[current_link_setting.link_rate_set];
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_dpia.c
108
link->dpcd_caps.usb4_dp_tun_info.usb4_topology_id[i] = dpcd_topology_data[i];
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_dpia.c
158
link->dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dp_tunneling;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_dpia.c
160
if (link->dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dpia_bw_alloc
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_dpia.c
161
&& link->dpcd_caps.usb4_dp_tun_info.driver_bw_cap.bits.driver_bw_alloc_support) {
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_dpia.c
163
dp_tunnel_setting->cm_id = link->dpcd_caps.usb4_dp_tun_info.usb4_driver_id & 0x0F;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_dpia.c
164
dp_tunnel_setting->group_id = link->dpcd_caps.usb4_dp_tun_info.dpia_tunnel_info.bits.group_id;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_dpia.c
65
link->dpcd_caps.usb4_dp_tun_info.dp_tun_cap.raw =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_dpia.c
68
if (link->dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dp_tunneling == false)
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_dpia.c
71
link->dpcd_caps.usb4_dp_tun_info.dpia_info.raw =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_dpia.c
73
link->dpcd_caps.usb4_dp_tun_info.usb4_driver_id =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_dpia.c
76
if (link->dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dpia_bw_alloc) {
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_dpia.c
83
link->dpcd_caps.usb4_dp_tun_info.driver_bw_cap.raw =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_dpia.c
85
link->dpcd_caps.usb4_dp_tun_info.dpia_tunnel_info.raw =
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_dpia.c
93
link->dpcd_caps.usb4_dp_tun_info.usb4_driver_id,
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_dpia.c
94
link->dpcd_caps.usb4_dp_tun_info.dpia_info.bits.dpia_num,
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_dpia.c
95
link->dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dpia_bw_alloc,
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_dpia.c
96
link->dpcd_caps.usb4_dp_tun_info.driver_bw_cap.bits.driver_bw_alloc_support);
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c
302
if (link && link->dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dp_tunneling
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c
335
!link->dpcd_caps.channel_coding_cap.bits.DP_128b_132b_SUPPORTED) {
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c
51
return (link && link->dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dp_tunneling
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c
52
&& link->dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dpia_bw_alloc
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c
53
&& link->dpcd_caps.usb4_dp_tun_info.driver_bw_cap.bits.driver_bw_alloc_support);
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
348
if (link->dpcd_caps.dpcd_rev.raw < DPCD_REV_14) {
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
355
if (link->dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dp_tunneling) {
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
524
if (link->dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dp_tunneling) {
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_phy.c
93
return (dp_parse_lttpr_repeater_count(link->dpcd_caps.lttpr_caps.phy_repeater_cnt) ==
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c
1022
uint8_t lttpr_count = dp_parse_lttpr_repeater_count(link->dpcd_caps.lttpr_caps.phy_repeater_cnt);
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c
1116
link->dpcd_caps.max_ln_count.bits.POST_LT_ADJ_REQ_SUPPORTED;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c
1129
if (link->dpcd_caps.dpcd_rev.raw >= DPCD_REV_13 &&
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c
1524
if (link->dpcd_caps.max_ln_count.bits.POST_LT_ADJ_REQ_SUPPORTED != 1 ||
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c
542
link->dpcd_caps.lttpr_caps.aux_rd_interval[offset - 1]);
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c
808
struct dpcd_caps *rx_caps = &link->dpcd_caps;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c
939
link->dpcd_caps.lttpr_caps.mode = repeater_mode;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c
953
link->dpcd_caps.lttpr_caps.mode = repeater_mode;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c
957
repeater_cnt = dp_parse_lttpr_repeater_count(link->dpcd_caps.lttpr_caps.phy_repeater_cnt);
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c
963
link->dpcd_caps.lttpr_caps.aux_rd_interval[--repeater_cnt] = 0;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c
971
(uint8_t *)&link->dpcd_caps.lttpr_caps.aux_rd_interval[repeater_id - 1],
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c
972
sizeof(link->dpcd_caps.lttpr_caps.aux_rd_interval[repeater_id - 1]));
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c
973
link->dpcd_caps.lttpr_caps.aux_rd_interval[repeater_id - 1] &= 0x7F;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_128b_132b.c
250
link->dpcd_caps.lttpr_caps.phy_repeater_cnt) + 1) * 20000;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c
430
uint8_t repeater_cnt = dp_parse_lttpr_repeater_count(link->dpcd_caps.lttpr_caps.phy_repeater_cnt);
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c
58
if (link->dpcd_caps.dpcd_rev.raw >= DPCD_REV_12)
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c
91
if (link->dpcd_caps.dpcd_rev.raw >= DPCD_REV_12)
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c
1009
repeater_cnt = dp_parse_lttpr_repeater_count(link->dpcd_caps.lttpr_caps.phy_repeater_cnt);
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c
306
repeater_cnt = dp_parse_lttpr_repeater_count(link->dpcd_caps.lttpr_caps.phy_repeater_cnt);
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c
609
repeater_cnt = dp_parse_lttpr_repeater_count(link->dpcd_caps.lttpr_caps.phy_repeater_cnt);
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c
870
repeater_cnt = dp_parse_lttpr_repeater_count(link->dpcd_caps.lttpr_caps.phy_repeater_cnt);
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c
931
link->dpcd_caps.lttpr_caps.aux_rd_interval[hop - 1]);
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c
982
repeater_cnt = dp_parse_lttpr_repeater_count(link->dpcd_caps.lttpr_caps.phy_repeater_cnt);
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c
147
repeater_cnt = dp_parse_lttpr_repeater_count(link->dpcd_caps.lttpr_caps.phy_repeater_cnt);
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c
196
link->dpcd_caps.lttpr_caps.phy_repeater_cnt);
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c
262
link->dpcd_caps.max_ln_count.bits.POST_LT_ADJ_REQ_SUPPORTED;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c
274
if (memcmp("\x00\x00\x00", &link->dpcd_caps.lttpr_caps.lttpr_ieee_oui[0], 3) == 0) {
sys/dev/pci/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
109
switch (link->dpcd_caps.branch_dev_id) {
sys/dev/pci/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
118
link->dpcd_caps.branch_dev_name,
sys/dev/pci/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
121
link->dpcd_caps.
sys/dev/pci/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
132
if (strncmp(link->dpcd_caps.branch_dev_name,
sys/dev/pci/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
135
link->dpcd_caps.
sys/dev/pci/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
145
if (link->dpcd_caps.panel_mode_edp &&
sys/dev/pci/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
164
if (link->is_dds && !link->dpcd_caps.panel_luminance_control)
sys/dev/pci/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
294
if (!link->dpcd_caps.panel_luminance_control) {
sys/dev/pci/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
331
if (link->dpcd_caps.edp_supported_link_rates_count == 0 || !link->panel_config.ilr.optimize_edp_link_rate)
sys/dev/pci/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
341
for (int i = 0; i < link->dpcd_caps.edp_supported_link_rates_count; i++) {
sys/dev/pci/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
342
if (max_ilr_rate < link->dpcd_caps.edp_supported_link_rates[i])
sys/dev/pci/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
343
max_ilr_rate = link->dpcd_caps.edp_supported_link_rates[i];
sys/dev/pci/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
388
if (link->dpcd_caps.edp_supported_link_rates[link_rate_set] != link_setting.link_rate ||
sys/dev/pci/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
716
&link->dpcd_caps.psr_info.psr_version,
sys/dev/pci/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
717
sizeof(link->dpcd_caps.psr_info.psr_version));
sys/dev/pci/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
97
link->dpcd_caps.panel_mode_edp,
sys/dev/pci/drm/amd/display/modules/power/power_helpers.c
1010
max_deviation_line = link->dpcd_caps.pr_info.max_deviation_line;
sys/dev/pci/drm/amd/display/modules/power/power_helpers.c
1011
pixel_deviation_per_line = link->dpcd_caps.pr_info.pixel_deviation_per_line;
sys/dev/pci/drm/amd/display/modules/power/power_helpers.c
821
struct dpcd_caps *dpcd_caps = &link->dpcd_caps;
sys/dev/pci/drm/amd/display/modules/power/power_helpers.c
823
if (dpcd_caps->edp_rev >= DP_EDP_14) {
sys/dev/pci/drm/amd/display/modules/power/power_helpers.c
824
if (dpcd_caps->psr_info.psr_version >= DP_PSR2_WITH_Y_COORD_ET_SUPPORTED)
sys/dev/pci/drm/amd/display/modules/power/power_helpers.c
831
if (dpcd_caps->sink_dev_id == DP_BRANCH_DEVICE_ID_001CF8) {
sys/dev/pci/drm/amd/display/modules/power/power_helpers.c
836
if (dpcd_caps->psr_info.psr_version < DP_PSR2_WITH_Y_COORD_IS_SUPPORTED)
sys/dev/pci/drm/amd/display/modules/power/power_helpers.c
838
else if (dpcd_caps->dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT &&
sys/dev/pci/drm/amd/display/modules/power/power_helpers.c
839
((dpcd_caps->sink_dev_id_str[1] == 0x08 && dpcd_caps->sink_dev_id_str[0] == 0x08) ||
sys/dev/pci/drm/amd/display/modules/power/power_helpers.c
840
(dpcd_caps->sink_dev_id_str[1] == 0x08 && dpcd_caps->sink_dev_id_str[0] == 0x07)))
sys/dev/pci/drm/amd/display/modules/power/power_helpers.c
842
else if (dpcd_caps->sink_dev_id_str[1] == 0x08 && dpcd_caps->sink_dev_id_str[0] == 0x03)
sys/dev/pci/drm/amd/display/modules/power/power_helpers.c
844
else if (dpcd_caps->sink_dev_id_str[1] == 0x08 && dpcd_caps->sink_dev_id_str[0] == 0x01)
sys/dev/pci/drm/amd/display/modules/power/power_helpers.c
846
else if (dpcd_caps->psr_info.force_psrsu_cap == 0x1)
sys/dev/pci/drm/amd/display/modules/power/power_helpers.c
885
struct dpcd_caps *dpcd_caps = &link->dpcd_caps;
sys/dev/pci/drm/amd/display/modules/power/power_helpers.c
911
(6 - dpcd_caps->psr_info.psr_dpcd_caps.bits.PSR_SETUP_TIME) * psr_setup_time_step_in_us;
sys/dev/pci/drm/amd/display/modules/power/power_helpers.c
926
psr_config->su_y_granularity = dpcd_caps->psr_info.psr2_su_y_granularity_cap;
sys/dev/pci/drm/amd/display/modules/power/power_helpers.c
927
psr_config->su_granularity_required = dpcd_caps->psr_info.psr_dpcd_caps.bits.SU_GRANULARITY_REQUIRED;
sys/dev/pci/drm/amd/display/modules/power/power_helpers.c
930
!link->dpcd_caps.psr_info.psr_dpcd_caps.bits.LINK_TRAINING_ON_EXIT_NOT_REQUIRED;
sys/dev/pci/drm/amd/display/modules/power/power_helpers.c
954
!link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT ||
sys/dev/pci/drm/i915/display/intel_dp_mst.c
1660
u8 dpcd_caps[DP_RECEIVER_CAP_SIZE];
sys/dev/pci/drm/i915/display/intel_dp_mst.c
1665
if (drm_dp_read_dpcd_caps(connector->dp.dsc_decompression_aux, dpcd_caps) < 0)
sys/dev/pci/drm/i915/display/intel_dp_mst.c
1668
intel_dp_get_dsc_sink_cap(dpcd_caps[DP_DPCD_REV], connector);