Symbol: dml_round_to_multiple
sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
226
detile_buf_plane1_addr = dml_round_to_multiple((unsigned int) ((2.0 * detile_buf_size_in_bytes) / 3.0),
sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
255
full_swath_bytes_packed_l = dml_round_to_multiple(rq_param->misc.rq_l.full_swath_bytes * 2 / 3,
sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
258
full_swath_bytes_packed_c = dml_round_to_multiple(rq_param->misc.rq_c.full_swath_bytes * 2 / 3,
sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
461
rq_dlg_param->swath_width_ub = dml_round_to_multiple(vp_width - 1, blk256_width, 1)
sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
465
rq_dlg_param->swath_width_ub = dml_round_to_multiple(vp_height - 1, blk256_height, 1)
sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
497
meta_row_width_ub = dml_round_to_multiple(vp_width - 1, meta_req_width, 1)
sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
502
meta_row_width_ub = dml_round_to_multiple(vp_height - 1, meta_req_height, 1)
sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
528
* (dml_round_to_multiple(vp_height - 1, meta_blk_height, 1) + meta_blk_height)
sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
531
meta_pte_req_per_frame_ub = (dml_round_to_multiple(meta_surface_bytes - vmpg_bytes,
sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
619
dpte_row_width_ub = dml_round_to_multiple(data_pitch * dpte_row_height - 1,
sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
628
dpte_row_width_ub = dml_round_to_multiple(vp_width - 1, dpte_req_width, 1)
sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
635
dpte_row_width_ub = dml_round_to_multiple(vp_height - 1, dpte_req_height, 1)
sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
226
detile_buf_plane1_addr = dml_round_to_multiple((unsigned int) ((2.0 * detile_buf_size_in_bytes) / 3.0),
sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
255
full_swath_bytes_packed_l = dml_round_to_multiple(rq_param->misc.rq_l.full_swath_bytes * 2 / 3,
sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
258
full_swath_bytes_packed_c = dml_round_to_multiple(rq_param->misc.rq_c.full_swath_bytes * 2 / 3,
sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
461
rq_dlg_param->swath_width_ub = dml_round_to_multiple(vp_width - 1, blk256_width, 1)
sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
465
rq_dlg_param->swath_width_ub = dml_round_to_multiple(vp_height - 1, blk256_height, 1)
sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
497
meta_row_width_ub = dml_round_to_multiple(vp_width - 1, meta_req_width, 1)
sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
502
meta_row_width_ub = dml_round_to_multiple(vp_height - 1, meta_req_height, 1)
sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
528
* (dml_round_to_multiple(vp_height - 1, meta_blk_height, 1) + meta_blk_height)
sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
531
meta_pte_req_per_frame_ub = (dml_round_to_multiple(meta_surface_bytes - vmpg_bytes,
sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
619
dpte_row_width_ub = dml_round_to_multiple(data_pitch * dpte_row_height - 1,
sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
628
dpte_row_width_ub = dml_round_to_multiple(vp_width - 1, dpte_req_width, 1)
sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
635
dpte_row_width_ub = dml_round_to_multiple(vp_height - 1, dpte_req_height, 1)
sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
206
detile_buf_plane1_addr = dml_round_to_multiple(
sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
237
full_swath_bytes_packed_l = dml_round_to_multiple(
sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
241
full_swath_bytes_packed_c = dml_round_to_multiple(
sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
453
rq_dlg_param->swath_width_ub = dml_round_to_multiple(vp_width - 1, blk256_width, 1)
sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
457
rq_dlg_param->swath_width_ub = dml_round_to_multiple(
sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
491
meta_row_width_ub = dml_round_to_multiple(vp_width - 1, meta_req_width, 1)
sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
496
meta_row_width_ub = dml_round_to_multiple(vp_height - 1, meta_req_height, 1)
sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
522
* (dml_round_to_multiple(vp_height - 1, meta_blk_height, 1)
sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
525
meta_pte_req_per_frame_ub = (dml_round_to_multiple(
sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
620
dpte_row_width_ub = dml_round_to_multiple(
sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
630
dpte_row_width_ub = dml_round_to_multiple(vp_width - 1, dpte_req_width, 1)
sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
637
dpte_row_width_ub = dml_round_to_multiple(vp_height - 1, dpte_req_height, 1)
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
152
detile_buf_plane1_addr = dml_round_to_multiple((unsigned int)((2.0 * detile_buf_size_in_bytes) / 3.0),
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
181
full_swath_bytes_packed_l = dml_round_to_multiple(rq_param->misc.rq_l.full_swath_bytes * 2.0 / 3.0,
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
184
full_swath_bytes_packed_c = dml_round_to_multiple(rq_param->misc.rq_c.full_swath_bytes * 2.0 / 3.0,
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
414
temp = dml_round_to_multiple(vp_width - 1, blk256_width, 1) + blk256_width;
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
430
temp = dml_round_to_multiple(vp_height - 1, blk256_height, 1) + blk256_height;
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
472
meta_row_width_ub = dml_round_to_multiple(vp_width - 1, meta_req_width, 1)
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
477
meta_row_width_ub = dml_round_to_multiple(vp_height - 1, meta_req_height, 1)
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
503
* (dml_round_to_multiple(vp_height - 1, meta_blk_height, 1) + meta_blk_height)
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
506
meta_pte_req_per_frame_ub = (dml_round_to_multiple(meta_surface_bytes - vmpg_bytes,
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
592
dpte_row_width_ub = dml_round_to_multiple(data_pitch * dpte_row_height - 1,
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
601
dpte_row_width_ub = dml_round_to_multiple(vp_width - 1, dpte_req_width, 1)
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
608
dpte_row_width_ub = dml_round_to_multiple(vp_height - 1, dpte_req_height, 1)
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
148
detile_buf_plane1_addr = dml_round_to_multiple((unsigned int) ((2.0 * detile_buf_size_in_bytes) / 3.0), 1024, 0) / 1024.0; // 2/3 to luma
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
191
full_swath_bytes_packed_l = dml_round_to_multiple(rq_param->misc.rq_l.full_swath_bytes * 2.0 / 3.0, 256, 1) + 256;
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
192
full_swath_bytes_packed_c = dml_round_to_multiple(rq_param->misc.rq_c.full_swath_bytes * 2.0 / 3.0, 256, 1) + 256;
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
432
temp = dml_round_to_multiple(vp_width - 1, blk256_width, 1) + blk256_width;
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
448
temp = dml_round_to_multiple(vp_height - 1, blk256_height, 1) + blk256_height;
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
487
meta_row_width_ub = dml_round_to_multiple(vp_width - 1, meta_req_width, 1) + meta_req_width;
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
491
meta_row_width_ub = dml_round_to_multiple(vp_height - 1, meta_req_height, 1) + meta_req_height;
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
510
meta_surface_bytes = meta_pitch * (dml_round_to_multiple(vp_height - 1, meta_blk_height, 1) + meta_blk_height) * bytes_per_element / 256;
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
512
meta_pte_req_per_frame_ub = (dml_round_to_multiple(meta_surface_bytes - vmpg_bytes, 8 * vmpg_bytes, 1) + 8 * vmpg_bytes) / (8 * vmpg_bytes);
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
591
dpte_row_width_ub = dml_round_to_multiple(data_pitch * dpte_row_height - 1, dpte_req_width, 1) + dpte_req_width;
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
598
dpte_row_width_ub = dml_round_to_multiple(vp_width - 1, dpte_req_width, 1) + dpte_req_width;
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
602
dpte_row_width_ub = dml_round_to_multiple(vp_height - 1, dpte_req_height, 1) + dpte_req_height;
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c
236
detile_buf_plane1_addr = dml_round_to_multiple((unsigned int) ((2.0 * detile_buf_size_in_bytes) / 3.0), 1024, 0) / 1024.0; // 2/3 to luma
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c
279
full_swath_bytes_packed_l = dml_round_to_multiple(rq_param->misc.rq_l.full_swath_bytes * 2.0 / 3.0, 256, 1) + 256;
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c
280
full_swath_bytes_packed_c = dml_round_to_multiple(rq_param->misc.rq_c.full_swath_bytes * 2.0 / 3.0, 256, 1) + 256;
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c
520
temp = dml_round_to_multiple(vp_width - 1, blk256_width, 1) + blk256_width;
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c
536
temp = dml_round_to_multiple(vp_height - 1, blk256_height, 1) + blk256_height;
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c
575
meta_row_width_ub = dml_round_to_multiple(vp_width - 1, meta_req_width, 1) + meta_req_width;
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c
579
meta_row_width_ub = dml_round_to_multiple(vp_height - 1, meta_req_height, 1) + meta_req_height;
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c
598
meta_surface_bytes = meta_pitch * (dml_round_to_multiple(vp_height - 1, meta_blk_height, 1) + meta_blk_height) * bytes_per_element / 256;
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c
600
meta_pte_req_per_frame_ub = (dml_round_to_multiple(meta_surface_bytes - vmpg_bytes, 8 * vmpg_bytes, 1) + 8 * vmpg_bytes) / (8 * vmpg_bytes);
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c
679
dpte_row_width_ub = dml_round_to_multiple(data_pitch * dpte_row_height - 1, dpte_req_width, 1) + dpte_req_width;
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c
686
dpte_row_width_ub = dml_round_to_multiple(vp_width - 1, dpte_req_width, 1) + dpte_req_width;
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c
690
dpte_row_width_ub = dml_round_to_multiple(vp_height - 1, dpte_req_height, 1) + dpte_req_height;
sys/dev/pci/drm/amd/display/dc/dml/dcn32/display_rq_dlg_calc_32.c
181
dml_round_to_multiple(
sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
263
detile_buf_plane1_addr = dml_round_to_multiple(
sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
294
full_swath_bytes_packed_l = dml_round_to_multiple(
sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
298
full_swath_bytes_packed_c = dml_round_to_multiple(
sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
693
rq_dlg_param->swath_width_ub = dml_round_to_multiple(vp_width - 1, blk256_width, 1)
sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
697
rq_dlg_param->swath_width_ub = dml_round_to_multiple(
sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
735
meta_row_width_ub = dml_round_to_multiple(vp_width - 1, meta_req_width, 1)
sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
740
meta_row_width_ub = dml_round_to_multiple(vp_height - 1, meta_req_height, 1)
sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
764
* (dml_round_to_multiple(vp_height - 1, meta_blk_height, 1)
sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
767
meta_pte_req_per_frame_ub = (dml_round_to_multiple(
sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
863
dpte_row_width_ub = dml_round_to_multiple(
sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
872
dpte_row_width_ub = dml_round_to_multiple(vp_width - 1, dpte_req_width, 1)
sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
879
dpte_row_width_ub = dml_round_to_multiple(vp_height - 1, dpte_req_height, 1)
sys/dev/pci/drm/amd/display/dc/dml2/display_mode_util.h
51
__DML_DLL_EXPORT__ dml_uint_t dml_round_to_multiple(dml_uint_t num, dml_uint_t multiple, dml_bool_t up);
sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
12331
detile_buf_plane1_addr = (unsigned int)(dml_round_to_multiple((unsigned int)((2.0 * detile_buf_size_in_bytes) / 3.0), 1024, 0) / 1024.0); // 2/3 to luma
sys/dev/pci/drm/amd/display/dc/dml2/dml_display_rq_dlg_calc.c
172
detile_buf_plane1_addr = (dml_uint_t)(dml_round_to_multiple((dml_uint_t)((2.0 * detile_buf_size_in_bytes) / 3.0), 1024, 0) / 1024.0); // 2/3 to luma