Symbol: dml_round
sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
1346
dml_round(
sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
329
initalXmitDelay = dml_round(rcModelSize / 2.0 / bpp / pixelsPerClock);
sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
4003
if (dml_min(locals->SwathWidthYSingleDPP[k], dml_round(mode_lib->vba.HActive[k] / 2.0 * mode_lib->vba.HRatio[k]))
sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
4301
locals->SwathWidthYPerState[i][j][k] = dml_min(locals->SwathWidthYSingleDPP[k], dml_round(locals->HActive[k] / 2 * locals->HRatio[k]));
sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
1406
dml_round(
sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
353
initalXmitDelay = dml_round(rcModelSize / 2.0 / bpp / pixelsPerClock);
sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
4117
if (dml_min(locals->SwathWidthYSingleDPP[k], dml_round(mode_lib->vba.HActive[k] / 2.0 * mode_lib->vba.HRatio[k]))
sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
4422
locals->SwathWidthYPerState[i][j][k] = dml_min(locals->SwathWidthYSingleDPP[k], dml_round(locals->HActive[k] / 2 * locals->HRatio[k]));
sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c
1699
dml_round(
sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c
4211
if (dml_min(locals->SwathWidthYSingleDPP[k], dml_round(mode_lib->vba.HActive[k] / 2.0 * mode_lib->vba.HRatio[k]))
sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c
4538
dml_min(locals->SwathWidthYSingleDPP[k], dml_round(mode_lib->vba.HActive[k] / 2.0 * mode_lib->vba.HRatio[k]));
sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c
524
initalXmitDelay = dml_round(rcModelSize / 2.0 / bpp / pixelsPerClock);
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
6222
SwathWidthY[k] = dml_min(SwathWidthSingleDPPY[k], dml_round(HActive[k] / 4.0 * HRatio[k]));
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
6224
SwathWidthY[k] = dml_min(SwathWidthSingleDPPY[k], dml_round(HActive[k] / 2.0 * HRatio[k]));
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
674
initalXmitDelay = dml_round(rcModelSize / 2.0 / BPP / pixelsPerClock);
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
6853
SwathWidthY[k] = dml_min(SwathWidthSingleDPPY[k], dml_round(HActive[k] / 4.0 * HRatio[k]));
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
6855
SwathWidthY[k] = dml_min(SwathWidthSingleDPPY[k], dml_round(HActive[k] / 2.0 * HRatio[k]));
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
703
initalXmitDelay = dml_round(rcModelSize / 2.0 / BPP / pixelsPerClock);
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
6944
SwathWidthY[k] = dml_min(SwathWidthSingleDPPY[k], dml_round(HActive[k] / 4.0 * HRatio[k]));
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
6946
SwathWidthY[k] = dml_min(SwathWidthSingleDPPY[k], dml_round(HActive[k] / 2.0 * HRatio[k]));
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
721
initalXmitDelay = dml_round(rcModelSize / 2.0 / BPP / pixelsPerClock);
sys/dev/pci/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
1108
dml_round((double) DETBufferSizePoolInKByte *
sys/dev/pci/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
65
initalXmitDelay = dml_round(rcModelSize / 2.0 / BPP / pixelsPerClock);
sys/dev/pci/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
754
dml_round(HActive[k] / 4.0 * HRatio[k]));
sys/dev/pci/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
757
dml_round(HActive[k] / 2.0 * HRatio[k]));
sys/dev/pci/drm/amd/display/dc/dml2/display_mode_core.c
1122
*p->DSTXAfterScaler = (dml_uint_t) dml_round(s->DPPCycles * p->myPipe->PixelClock / p->myPipe->Dppclk + s->DISPCLKCycles * p->myPipe->PixelClock / p->myPipe->Dispclk + p->DSCDelay, 1.0);
sys/dev/pci/drm/amd/display/dc/dml2/display_mode_core.c
1123
*p->DSTXAfterScaler = (dml_uint_t) dml_round(*p->DSTXAfterScaler + (p->myPipe->ODMMode != dml_odm_mode_bypass ? 18 : 0) + (p->myPipe->DPPPerSurface - 1) * p->DPP_RECOUT_WIDTH +
sys/dev/pci/drm/amd/display/dc/dml2/display_mode_core.c
4369
SwathWidthY[k] = (dml_uint_t)(dml_min(SwathWidthSingleDPPY[k], dml_round(HActive[k] / 4.0 * HRatio[k], true)));
sys/dev/pci/drm/amd/display/dc/dml2/display_mode_core.c
4371
SwathWidthY[k] = (dml_uint_t)(dml_min(SwathWidthSingleDPPY[k], dml_round(HActive[k] / 2.0 * HRatio[k], true)));
sys/dev/pci/drm/amd/display/dc/dml2/display_mode_core.c
4979
dml_round((dml_float_t) DETBufferSizePoolInKByte * (ReadBandwidthLuma[NextSurfaceToAssignDETPiece] + ReadBandwidthChroma[NextSurfaceToAssignDETPiece]) / BandwidthOfSurfacesNotAssignedDETPiece /
sys/dev/pci/drm/amd/display/dc/dml2/display_mode_core.c
873
initalXmitDelay = (dml_uint_t)(dml_round(rcModelSize / 2.0 / BPP / pixelsPerClock, 1));
sys/dev/pci/drm/amd/display/dc/dml2/display_mode_util.h
49
__DML_DLL_EXPORT__ dml_float_t dml_round(dml_float_t val, dml_bool_t bankers_rounding);