sys/dev/pci/drm/amd/display/dc/dml2/display_mode_core.c

5544

ODMUse = dml_odm_use_policy_combine_4to1;

sys/dev/pci/drm/amd/display/dc/dml2/display_mode_core.c

5545

else if (HActive > DML2_MAX_FMT_420_BUFFER_WIDTH && ODMUse != dml_odm_use_policy_combine_4to1)

sys/dev/pci/drm/amd/display/dc/dml2/display_mode_core.c

5549

if ((Output == dml_hdmi || Output == dml_dp || Output == dml_edp) && ODMUse == dml_odm_use_policy_combine_4to1)

sys/dev/pci/drm/amd/display/dc/dml2/display_mode_core.c

5557

else if (ODMUse == dml_odm_use_policy_combine_4to1)

sys/dev/pci/drm/amd/display/dc/dml2/display_mode_core.c

5569

if (!(Output == dml_hdmi || Output == dml_dp || Output == dml_edp) && (ODMUse == dml_odm_use_policy_combine_4to1 || (ODMUse == dml_odm_use_policy_combine_as_needed &&

sys/dev/pci/drm/amd/display/dc/dml2/dml2_translation_helper.c

1344

dml2->v20.dml_core_ctx.policy.ODMUse[disp_cfg_stream_location] = dml_odm_use_policy_combine_4to1;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_translation_helper.c

1405

dml2->v20.dml_core_ctx.policy.ODMUse[disp_cfg_plane_location] = dml_odm_use_policy_combine_4to1;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.c

146

p->new_policy->ODMUse[0] = dml_odm_use_policy_combine_4to1;