Symbol: dml2_odm_mode_combine_3to1
sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c
268
stream_desc->overrides.odm_mode = dml2_odm_mode_combine_3to1;
sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4.c
483
case dml2_odm_mode_combine_3to1:
sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
10408
mode_lib->mp.ODMMode[k] = dml2_odm_mode_combine_3to1;
sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
12415
} else if (l->odm_mode == dml2_odm_mode_combine_2to1 || l->odm_mode == dml2_odm_mode_combine_3to1 || l->odm_mode == dml2_odm_mode_combine_4to1) {
sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
12422
if (l->odm_mode == dml2_odm_mode_combine_3to1)
sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
1248
} else if (ODMMode == dml2_odm_mode_combine_3to1) {
sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
3967
(SurfaceRequiredDISPCLKWithODMCombineThreeToOne <= MaxDispclk) ? dml2_odm_mode_combine_3to1 : dml2_odm_mode_combine_4to1;
sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
3975
(HActive <= 3 * MaximumPixelsPerLinePerDSCUnit) ? dml2_odm_mode_combine_3to1 : dml2_odm_mode_combine_4to1;
sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
3984
(HActive <= 3 * DML2_MAX_FMT_420_BUFFER_WIDTH) ? dml2_odm_mode_combine_3to1 : dml2_odm_mode_combine_4to1;
sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
3993
ODMMode = dml2_odm_mode_combine_3to1;
sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
3994
if (ODMMode == dml2_odm_mode_combine_3to1 && NumberOfDSCSlices != 12)
sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
4020
case dml2_odm_mode_combine_3to1:
sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
4057
bool are_odm_segments_symmetrical = (ODMMode == dml2_odm_mode_combine_3to1) ? UseDSC : true;
sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
4058
bool is_max_dsc_slice_required = (ODMMode == dml2_odm_mode_combine_3to1);
sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
4061
(ODMMode == dml2_odm_mode_combine_4to1 || ODMMode == dml2_odm_mode_combine_3to1) ? 4 :
sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
4138
SurfaceRequiredDISPCLKWithODMCombineThreeToOne = CalculateRequiredDispclk(dml2_odm_mode_combine_3to1, PixelClock, isTMDS420);
sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
4505
else if (ODMMode == dml2_odm_mode_combine_3to1)
sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
8484
else if (mode_lib->ms.ODMMode[k] == dml2_odm_mode_combine_3to1)
sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
8499
else if (mode_lib->ms.ODMMode[k] == dml2_odm_mode_combine_3to1)
sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
8523
} else if (mode_lib->ms.ODMMode[k] == dml2_odm_mode_combine_3to1) {
sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
872
else if (MainSurfaceODMMode == dml2_odm_mode_combine_3to1)
sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
8753
else if (mode_lib->ms.ODMMode[k] == dml2_odm_mode_combine_3to1)
sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
877
if (MainSurfaceODMMode == dml2_odm_mode_combine_4to1 || MainSurfaceODMMode == dml2_odm_mode_combine_3to1 || MainSurfaceODMMode == dml2_odm_mode_combine_2to1) {
sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
8785
else if (mode_lib->ms.ODMMode[k] == dml2_odm_mode_combine_3to1)
sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_utils.c
781
case dml2_odm_mode_combine_3to1:
sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_dcn3.c
158
*odm_mode = dml2_odm_mode_combine_3to1;
sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_dcn3.c
173
*odm_mode = dml2_odm_mode_combine_3to1;
sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_dcn3.c
174
} else if (*odm_mode == dml2_odm_mode_combine_3to1) {
sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_dcn3.c
404
case dml2_odm_mode_combine_3to1:
sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c
195
*odm_mode = dml2_odm_mode_combine_3to1;
sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c
210
*odm_mode = dml2_odm_mode_combine_3to1;
sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c
211
} else if (*odm_mode == dml2_odm_mode_combine_3to1) {
sys/dev/pci/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c
869
case dml2_odm_mode_combine_3to1: