Symbol: dm_vert
sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c
357
input->src.source_scan = dm_vert;
sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c
1604
|| pln->rotation == ROTATION_ANGLE_270 ? dm_vert : dm_horz;
sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
246
bool surf_vert = (pipe_src_param->source_scan == dm_vert);
sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
346
bool surf_vert = (source_scan == dm_vert);
sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
965
access_dir = (src->source_scan == dm_vert); // vp access direction: horizontal or vertical accessed
sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
246
bool surf_vert = (pipe_src_param->source_scan == dm_vert);
sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
346
bool surf_vert = (source_scan == dm_vert);
sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
966
access_dir = (src->source_scan == dm_vert); // vp access direction: horizontal or vertical accessed
sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c
1132
if (ScanOrientation == dm_vert || SwathHeight == 16) {
sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c
1138
if ((ScanOrientation == dm_vert && SwathHeight == 16) || (ScanOrientation != dm_vert && SwathHeight == 8)) {
sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c
1140
} else if (ScanOrientation == dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c
1148
} else if (ScanOrientation == dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c
1161
if ((ScanOrientation == dm_vert && SwathHeight == 8)
sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c
1162
|| (ScanOrientation != dm_vert
sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c
1165
} else if (ScanOrientation != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c
1171
if (ScanOrientation != dm_vert || SwathHeight == 8) {
sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
1017
access_dir = (src->source_scan == dm_vert); // vp access direction: horizontal or vertical accessed
sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
228
bool surf_vert = (pipe_src_param->source_scan == dm_vert);
sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
334
bool surf_vert = (source_scan == dm_vert);
sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
717
access_dir = (pipe_param->src.source_scan == dm_vert); // vp access direction: horizontal or vertical accessed
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
1481
} else if (ScanOrientation != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
1662
if (ScanDirection != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
1699
if (ScanDirection != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
1744
} else if (ScanDirection != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
1775
if (SurfaceTiling != dm_sw_linear && PixelPTEReqHeightPTEs == 1 && ScanDirection == dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
2122
if ((v->SourcePixelFormat[k] == dm_420_10 || v->SourcePixelFormat[k] == dm_420_12) && v->SourceScan[k] != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
3518
if ((v->SurfaceTiling[k] == dm_sw_linear && (!(v->SourceScan[k] != dm_vert) || v->DCCEnable[k] == true))
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
3540
if (v->SourceScan[k] != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
3702
} else if (v->SourceScan[k] == dm_vert && v->BytePerPixelC[k] > 0) {
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
4271
if ((v->SourcePixelFormat[k] == dm_420_10 || v->SourcePixelFormat[k] == dm_420_12) && v->SourceScan[k] != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
5498
if (SourceScan[k] != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
5509
if (SourceScan[k] != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
5630
if (SourceScan[k] != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
5652
if (SourceScan[k] != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
5678
if (SourceScan[k] != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
5692
if (SourceScan[k] != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
5911
if ((SourceScan[k] == dm_vert && BlockWidth256BytesY[k] > SwathHeightY[k])
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
5912
|| (SourceScan[k] != dm_vert
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
5922
if ((SourceScan[k] == dm_vert && BlockWidth256BytesC[k] > SwathHeightC[k])
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
5923
|| (SourceScan[k] != dm_vert && BlockHeight256BytesC[k] > SwathHeightC[k])
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
6072
&& SourceScan[k] != dm_vert)) {
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
6074
} else if (SourcePixelFormat[k] == dm_444_8 && SourceScan[k] == dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
6085
&& SourceScan[k] == dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
6091
} else if (SourcePixelFormat[k] == dm_420_8 && SourceScan[k] == dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
6208
if (SourceScan[k] != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c
6247
if (SourceScan[k] != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
1082
access_dir = (src->source_scan == dm_vert); // vp access direction: horizontal or vertical accessed
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
172
bool surf_vert = (pipe_src_param->source_scan == dm_vert);
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
296
bool surf_vert = (source_scan == dm_vert);
sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
688
access_dir = (pipe_param->src.source_scan == dm_vert); // vp access direction: horizontal or vertical accessed
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
1660
} else if (ScanOrientation != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
1849
if (ScanDirection != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
1883
if (ScanDirection != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
1943
} else if (ScanDirection != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
1975
if (SurfaceTiling != dm_sw_linear && PixelPTEReqHeightPTEs == 1 && ScanDirection == dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
2306
if ((v->SourcePixelFormat[k] == dm_420_10 || v->SourcePixelFormat[k] == dm_420_12) && v->SourceScan[k] != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
3839
if ((v->SurfaceTiling[k] == dm_sw_linear && (!(v->SourceScan[k] != dm_vert) || v->DCCEnable[k] == true))
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
3861
if (v->SourceScan[k] != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
3993
} else if (v->SourceScan[k] == dm_vert && v->BytePerPixelC[k] > 0) {
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
4753
&& v->SourceScan[k] != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
5960
if (SourceScan[k] != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
5971
if (SourceScan[k] != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
6111
if (SourceScan[k] != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
6133
if (SourceScan[k] != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
6159
if (SourceScan[k] != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
6173
if (SourceScan[k] != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
6389
if ((SourceScan[k] == dm_vert && BlockWidth256BytesY[k] > SwathHeightY[k]) || (SourceScan[k] != dm_vert && BlockHeight256BytesY[k] > SwathHeightY[k])
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
6400
if ((SourceScan[k] == dm_vert && BlockWidth256BytesC[k] > SwathHeightC[k])
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
6401
|| (SourceScan[k] != dm_vert && BlockHeight256BytesC[k] > SwathHeightC[k]) || DCCCMaxUncompressedBlock[k] < 256) {
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
6708
&& SourceScan[k] != dm_vert)) {
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
6710
} else if (SourcePixelFormat[k] == dm_444_8 && SourceScan[k] == dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
6720
} else if (SourcePixelFormat[k] == dm_rgbe_alpha && SourceScan[k] == dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
6726
} else if (SourcePixelFormat[k] == dm_420_8 && SourceScan[k] == dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
6834
if (SourceScan[k] != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
6887
if (SourceScan[k] != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
1001
access_dir = (src->source_scan == dm_vert); // vp access direction: horizontal or vertical accessed
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
177
bool surf_vert = (pipe_src_param->source_scan == dm_vert);
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
317
bool surf_vert = (source_scan == dm_vert);
sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_rq_dlg_calc_31.c
682
access_dir = (pipe_param->src.source_scan == dm_vert); // vp access direction: horizontal or vertical accessed
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
1677
} else if (ScanOrientation != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
1866
if (ScanDirection != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
1900
if (ScanDirection != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
1960
} else if (ScanDirection != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
1992
if (SurfaceTiling != dm_sw_linear && PixelPTEReqHeightPTEs == 1 && ScanDirection == dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
2325
if ((v->SourcePixelFormat[k] == dm_420_10 || v->SourcePixelFormat[k] == dm_420_12) && v->SourceScan[k] != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
3932
if (v->SurfaceTiling[k] == dm_sw_linear && (!(v->SourceScan[k] != dm_vert) || v->DCCEnable[k] == true)) {
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
3952
if (v->SourceScan[k] != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
4084
} else if (v->SourceScan[k] == dm_vert && v->BytePerPixelC[k] > 0) {
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
4839
&& v->SourceScan[k] != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
6054
if (SourceScan[k] != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
6065
if (SourceScan[k] != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
6206
if (SourceScan[k] != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
6228
if (SourceScan[k] != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
6254
if (SourceScan[k] != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
6268
if (SourceScan[k] != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
6484
if ((SourceScan[k] == dm_vert && BlockWidth256BytesY[k] > SwathHeightY[k]) || (SourceScan[k] != dm_vert && BlockHeight256BytesY[k] > SwathHeightY[k])
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
6495
if ((SourceScan[k] == dm_vert && BlockWidth256BytesC[k] > SwathHeightC[k])
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
6496
|| (SourceScan[k] != dm_vert && BlockHeight256BytesC[k] > SwathHeightC[k]) || DCCCMaxUncompressedBlock[k] < 256) {
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
6798
&& SourceScan[k] != dm_vert)) {
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
6800
} else if (SourcePixelFormat[k] == dm_444_8 && SourceScan[k] == dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
6810
} else if (SourcePixelFormat[k] == dm_rgbe_alpha && SourceScan[k] == dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
6816
} else if (SourcePixelFormat[k] == dm_420_8 && SourceScan[k] == dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
6925
if (SourceScan[k] != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
6977
if (SourceScan[k] != dm_vert) {
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c
1088
access_dir = (src->source_scan == dm_vert); // vp access direction: horizontal or vertical accessed
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c
265
bool surf_vert = (pipe_src_param->source_scan == dm_vert);
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c
405
bool surf_vert = (source_scan == dm_vert);
sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_rq_dlg_calc_314.c
770
access_dir = (pipe_param->src.source_scan == dm_vert); // vp access direction: horizontal or vertical accessed
sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
1203
access_dir = (e2e_pipe_param->pipe.src.source_scan == dm_vert); /* vp access direction: horizontal or vertical accessed */
sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
285
bool surf_vert = (pipe_src_param->source_scan == dm_vert);
sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
395
bool surf_vert = (source_scan == dm_vert);
sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
648
surf_vert = (pipe_src_param->source_scan == dm_vert);