sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1270

*sw_mode = dm_sw_4kb_d_x;

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c

3334

|| mode_lib->vba.SurfaceTiling[k] == dm_sw_4kb_d_x

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c

942

|| SurfaceTiling == dm_sw_4kb_d || SurfaceTiling == dm_sw_4kb_d_x) {

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c

1002

|| SurfaceTiling == dm_sw_4kb_d || SurfaceTiling == dm_sw_4kb_d_x) {

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c

3441

|| mode_lib->vba.SurfaceTiling[k] == dm_sw_4kb_d_x

sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c

1113

== dm_sw_4kb_d_x

sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c

1154

if (TilingFormat == dm_sw_4kb_d || TilingFormat == dm_sw_4kb_d_x

sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c

1348

|| SurfaceTiling == dm_sw_4kb_d || SurfaceTiling == dm_sw_4kb_d_x) {

sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c

3568

|| mode_lib->vba.SurfaceTiling[k] == dm_sw_4kb_d_x