sys/dev/pci/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1285

*sw_mode = dm_sw_64kb_d_x;

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c

3337

|| mode_lib->vba.SurfaceTiling[k] == dm_sw_64kb_d_x

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c

947

|| SurfaceTiling == dm_sw_64kb_d_t || SurfaceTiling == dm_sw_64kb_d_x

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c

1007

|| SurfaceTiling == dm_sw_64kb_d_t || SurfaceTiling == dm_sw_64kb_d_x

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c

3444

|| mode_lib->vba.SurfaceTiling[k] == dm_sw_64kb_d_x

sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c

1121

== dm_sw_64kb_d_x

sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c

1158

|| TilingFormat == dm_sw_64kb_d_x

sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c

1353

|| SurfaceTiling == dm_sw_64kb_d_t || SurfaceTiling == dm_sw_64kb_d_x

sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c

3571

|| mode_lib->vba.SurfaceTiling[k] == dm_sw_64kb_d_x

sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c

1440

&& (TilingFormat == dm_sw_64kb_d || TilingFormat == dm_sw_64kb_d_x

sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c

1454

&& (TilingFormat == dm_sw_64kb_d || TilingFormat == dm_sw_64kb_d_x

sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c

3519

|| ((v->SurfaceTiling[k] == dm_sw_64kb_d || v->SurfaceTiling[k] == dm_sw_64kb_d_t || v->SurfaceTiling[k] == dm_sw_64kb_d_x)

sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c

1627

if ((BytePerPixelY == 8 && (TilingFormat == dm_sw_64kb_d || TilingFormat == dm_sw_64kb_d_x || TilingFormat == dm_sw_64kb_d_t || TilingFormat == dm_sw_64kb_r_x))

sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c

1638

if ((BytePerPixelC == 8 && (TilingFormat == dm_sw_64kb_d || TilingFormat == dm_sw_64kb_d_x || TilingFormat == dm_sw_64kb_d_t || TilingFormat == dm_sw_64kb_r_x))

sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c

3841

|| v->SurfaceTiling[k] == dm_sw_64kb_d_x) && !(v->SourcePixelFormat[k] == dm_444_64))) {

sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c

1644

if ((BytePerPixelY == 8 && (TilingFormat == dm_sw_64kb_d || TilingFormat == dm_sw_64kb_d_x || TilingFormat == dm_sw_64kb_d_t || TilingFormat == dm_sw_64kb_r_x))

sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c

1655

if ((BytePerPixelC == 8 && (TilingFormat == dm_sw_64kb_d || TilingFormat == dm_sw_64kb_d_x || TilingFormat == dm_sw_64kb_d_t || TilingFormat == dm_sw_64kb_r_x))

sys/dev/pci/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c

369

SurfaceTiling == dm_sw_64kb_d_x || SurfaceTiling == dm_sw_64kb_r_x) {