sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c

2581

mode_lib->vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_vactive;

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c

2646

mode_lib->vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_vactive;

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c

2649

mode_lib->vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_vactive;

sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c

5200

&& ((locals->DRAMClockChangeSupport[i][1] == dm_dram_clock_change_vactive

sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c

5201

&& locals->DRAMClockChangeSupport[i][0] != dm_dram_clock_change_vactive)

sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c

5495

*DRAMClockChangeSupport = dm_dram_clock_change_vactive;

sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c

5266

*DRAMClockChangeSupport = dm_dram_clock_change_vactive;

sys/dev/pci/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c

471

if (context->bw_ctx.dml.vba.DRAMClockChangeSupport[context->bw_ctx.dml.vba.VoltageLevel][context->bw_ctx.dml.vba.maxMpcComb] != dm_dram_clock_change_vactive)

sys/dev/pci/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c

562

context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][context->bw_ctx.dml.vba.maxMpcComb] == dm_dram_clock_change_vactive;

sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c

5727

*DRAMClockChangeSupport = dm_dram_clock_change_vactive;

sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c

5821

*DRAMClockChangeSupport = dm_dram_clock_change_vactive;

sys/dev/pci/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c

4576

*DRAMClockChangeSupport = dm_dram_clock_change_vactive;

sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1647

context->bw_ctx.dml.vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_vactive;