Symbol: dcn_bw_yuv420_sub_8
sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
1053
else if (v->source_pixel_format[k] == dcn_bw_yuv420_sub_8) {
sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
1080
else if (v->source_pixel_format[k] == dcn_bw_yuv420_sub_8) {
sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
1113
else if (v->source_pixel_format[k] == dcn_bw_yuv420_sub_8 && v->source_scan[k] == dcn_bw_hor) {
sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
1191
if ((v->source_pixel_format[k] != dcn_bw_yuv420_sub_8 && v->source_pixel_format[k] != dcn_bw_yuv420_sub_10)) {
sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
1270
else if (v->source_pixel_format[k] == dcn_bw_yuv420_sub_8) {
sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
1461
else if (v->source_pixel_format[k] == dcn_bw_yuv420_sub_8) {
sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
165
else if (v->source_pixel_format[k] == dcn_bw_yuv420_sub_8) {
sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
1682
if (v->immediate_flip_supported == dcn_bw_yes && (v->source_pixel_format[k] != dcn_bw_yuv420_sub_8 && v->source_pixel_format[k] != dcn_bw_yuv420_sub_10)) {
sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
1689
if (v->immediate_flip_supported == dcn_bw_yes && (v->source_pixel_format[k] != dcn_bw_yuv420_sub_8 && v->source_pixel_format[k] != dcn_bw_yuv420_sub_10)) {
sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
1701
if (v->immediate_flip_supported == dcn_bw_yes && (v->source_pixel_format[k] != dcn_bw_yuv420_sub_8 && v->source_pixel_format[k] != dcn_bw_yuv420_sub_10)) {
sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
1750
if (v->immediate_flip_supported == dcn_bw_yes && (v->source_pixel_format[k] != dcn_bw_yuv420_sub_8 && v->source_pixel_format[k] != dcn_bw_yuv420_sub_10)) {
sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
363
else if (v->source_pixel_format[k] == dcn_bw_yuv420_sub_8) {
sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
396
else if (v->source_pixel_format[k] == dcn_bw_yuv420_sub_8 && v->source_scan[k] == dcn_bw_hor) {
sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
841
if ((v->source_pixel_format[k] != dcn_bw_yuv420_sub_8 && v->source_pixel_format[k] != dcn_bw_yuv420_sub_10)) {
sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
917
if ((v->source_pixel_format[k] != dcn_bw_yuv420_sub_8 && v->source_pixel_format[k] != dcn_bw_yuv420_sub_10)) {
sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
952
if ((((v->source_pixel_format[k] != dcn_bw_yuv420_sub_8 && v->source_pixel_format[k] != dcn_bw_yuv420_sub_10) && (v->v_ratio_pre_ywith_immediate_flip[i][j][k] > 4.0 || v->v_ratio_pre_cwith_immediate_flip[i][j][k] > 4.0)) || ((v->source_pixel_format[k] == dcn_bw_yuv420_sub_8 || v->source_pixel_format[k] == dcn_bw_yuv420_sub_10) && (v->v_ratio_pre_ywithout_immediate_flip[i][j][k] > 4.0 || v->v_ratio_pre_cwithout_immediate_flip[i][j][k] > 4.0)))) {
sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c
1101
} else if (v->source_pixel_format[k] == dcn_bw_yuv420_sub_8) {
sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c
245
return dcn_bw_yuv420_sub_8;