Symbol: dcn_bw_sw_linear
sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
1062
if (v->source_surface_mode[k] == dcn_bw_sw_linear) {
sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
1076
if (v->source_surface_mode[k] == dcn_bw_sw_linear) {
sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
1100
if (v->source_surface_mode[k] == dcn_bw_sw_linear || (v->source_pixel_format[k] == dcn_bw_rgb_sub_64 && (v->source_surface_mode[k] == dcn_bw_sw_4_kb_s || v->source_surface_mode[k] == dcn_bw_sw_4_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_t || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_var_s || v->source_surface_mode[k] == dcn_bw_sw_var_s_x) && v->source_scan[k] == dcn_bw_hor)) {
sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
1109
if (v->source_surface_mode[k] == dcn_bw_sw_linear) {
sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
140
if ((v->source_surface_mode[k] == dcn_bw_sw_linear && v->source_scan[k] != dcn_bw_hor) || ((v->source_surface_mode[k] == dcn_bw_sw_4_kb_d || v->source_surface_mode[k] == dcn_bw_sw_4_kb_d_x || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d_t || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d_x || v->source_surface_mode[k] == dcn_bw_sw_var_d || v->source_surface_mode[k] == dcn_bw_sw_var_d_x) && v->source_pixel_format[k] != dcn_bw_rgb_sub_64)) {
sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
1445
if (v->source_surface_mode[k] == dcn_bw_sw_linear) {
sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
1457
if (v->source_surface_mode[k] == dcn_bw_sw_linear) {
sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
1492
if (v->source_surface_mode[k] == dcn_bw_sw_linear) {
sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
1515
if (v->source_surface_mode[k] == dcn_bw_sw_linear) {
sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
1551
if (v->source_surface_mode[k] == dcn_bw_sw_linear) {
sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
1574
if (v->source_surface_mode[k] == dcn_bw_sw_linear) {
sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
345
if (v->source_surface_mode[k] == dcn_bw_sw_linear) {
sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
359
if (v->source_surface_mode[k] == dcn_bw_sw_linear) {
sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
383
if (v->source_surface_mode[k] == dcn_bw_sw_linear || (v->source_pixel_format[k] == dcn_bw_rgb_sub_64 && (v->source_surface_mode[k] == dcn_bw_sw_4_kb_s || v->source_surface_mode[k] == dcn_bw_sw_4_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_t || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_var_s || v->source_surface_mode[k] == dcn_bw_sw_var_s_x) && v->source_scan[k] == dcn_bw_hor)) {
sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
392
if (v->source_surface_mode[k] == dcn_bw_sw_linear) {
sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
419
if (v->source_surface_mode[k] == dcn_bw_sw_linear) {
sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
641
if (v->source_surface_mode[k] == dcn_bw_sw_linear) {
sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
664
if (v->source_surface_mode[k] == dcn_bw_sw_linear) {
sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
701
if (v->source_surface_mode[k] == dcn_bw_sw_linear) {
sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
725
if (v->source_surface_mode[k] == dcn_bw_sw_linear) {
sys/dev/pci/drm/amd/display/dc/dml/calcs/dcn_calcs.c
166
return dcn_bw_sw_linear;