Symbol: dccg31_set_symclk32_le_root_clock_gating
sys/dev/pci/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
675
dccg31_set_symclk32_le_root_clock_gating(dccg, 0, false);
sys/dev/pci/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c
676
dccg31_set_symclk32_le_root_clock_gating(dccg, 1, false);
sys/dev/pci/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.h
188
void dccg31_set_symclk32_le_root_clock_gating(
sys/dev/pci/drm/amd/display/dc/dccg/dcn314/dcn314_dccg.c
366
.set_symclk32_le_root_clock_gating = dccg31_set_symclk32_le_root_clock_gating,
sys/dev/pci/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
1769
dccg31_set_symclk32_le_root_clock_gating(dccg, otg_inst, false);
sys/dev/pci/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c
2422
.set_symclk32_le_root_clock_gating = dccg31_set_symclk32_le_root_clock_gating,