sys/dev/pci/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c

686

dccg31_set_physymclk(dccg, 0, PHYSYMCLK_FORCE_SRC_SYMCLK, false);

sys/dev/pci/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c

687

dccg31_set_physymclk(dccg, 1, PHYSYMCLK_FORCE_SRC_SYMCLK, false);

sys/dev/pci/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c

688

dccg31_set_physymclk(dccg, 2, PHYSYMCLK_FORCE_SRC_SYMCLK, false);

sys/dev/pci/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c

689

dccg31_set_physymclk(dccg, 3, PHYSYMCLK_FORCE_SRC_SYMCLK, false);

sys/dev/pci/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c

690

dccg31_set_physymclk(dccg, 4, PHYSYMCLK_FORCE_SRC_SYMCLK, false);

sys/dev/pci/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c

721

.set_physymclk = dccg31_set_physymclk,

sys/dev/pci/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.h

193

void dccg31_set_physymclk(

sys/dev/pci/drm/amd/display/dc/dccg/dcn314/dcn314_dccg.c

310

dccg31_set_physymclk(dccg, otg_inst,

sys/dev/pci/drm/amd/display/dc/dccg/dcn314/dcn314_dccg.c

367

.set_physymclk = dccg31_set_physymclk,

sys/dev/pci/drm/amd/display/dc/dccg/dcn32/dcn32_dccg.c

339

.set_physymclk = dccg31_set_physymclk,