sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3280

if (!dc_wake_and_execute_gpint(adev->dm.dc->ctx, cmd, res, NULL, DM_DMUB_WAIT_TYPE_WAIT))

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3308

if (!dc_wake_and_execute_gpint(adev->dm.dc->ctx, cmd, 0, &response, DM_DMUB_WAIT_TYPE_WAIT_WITH_REPLY))

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

1154

if (!dc_wake_and_execute_gpint(dc->ctx, DMUB_GPINT__SET_TRACE_BUFFER_MASK_WORD1,

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

1160

if (!dc_wake_and_execute_gpint(dc->ctx, DMUB_GPINT__UPDATE_TRACE_BUFFER_MASK,

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.c

339

return dc_wake_and_execute_gpint(dc_dmub_srv->ctx, DMUB_GPINT__IDLE_OPT_NOTIFY_STREAM_MASK,

sys/dev/pci/drm/amd/display/dc/dc_dmub_srv.h

193

bool dc_wake_and_execute_gpint(const struct dc_context *ctx, enum dmub_gpint_command command_code,

sys/dev/pci/drm/amd/display/dc/dce/dmub_psr.c

115

if (dc_wake_and_execute_gpint(dmub->ctx, DMUB_GPINT__GET_PSR_STATE, panel_inst, &raw_state,

sys/dev/pci/drm/amd/display/dc/dce/dmub_psr.c

462

dc_wake_and_execute_gpint(dmub->ctx, DMUB_GPINT__PSR_RESIDENCY, param, residency,

sys/dev/pci/drm/amd/display/dc/dce/dmub_replay.c

271

if (dc_wake_and_execute_gpint(dmub->ctx, DMUB_GPINT__REPLAY_RESIDENCY, param,

sys/dev/pci/drm/amd/display/dc/dce/dmub_replay.c

30

if (!dc_wake_and_execute_gpint(dmub->ctx, DMUB_GPINT__GET_REPLAY_STATE, panel_inst,