sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.h

185

void dcn10_set_cursor_sdr_white_level(struct pipe_ctx *pipe_ctx);

sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_init.c

76

.set_cursor_sdr_white_level = dcn10_set_cursor_sdr_white_level,

sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_init.c

80

.set_cursor_sdr_white_level = dcn10_set_cursor_sdr_white_level,

sys/dev/pci/drm/amd/display/dc/hwss/dcn201/dcn201_init.c

86

.set_cursor_sdr_white_level = dcn10_set_cursor_sdr_white_level,

sys/dev/pci/drm/amd/display/dc/hwss/dcn21/dcn21_init.c

80

.set_cursor_sdr_white_level = dcn10_set_cursor_sdr_white_level,

sys/dev/pci/drm/amd/display/dc/hwss/dcn30/dcn30_init.c

82

.set_cursor_sdr_white_level = dcn10_set_cursor_sdr_white_level,

sys/dev/pci/drm/amd/display/dc/hwss/dcn301/dcn301_init.c

82

.set_cursor_sdr_white_level = dcn10_set_cursor_sdr_white_level,

sys/dev/pci/drm/amd/display/dc/hwss/dcn31/dcn31_init.c

85

.set_cursor_sdr_white_level = dcn10_set_cursor_sdr_white_level,

sys/dev/pci/drm/amd/display/dc/hwss/dcn314/dcn314_init.c

87

.set_cursor_sdr_white_level = dcn10_set_cursor_sdr_white_level,

sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_init.c

83

.set_cursor_sdr_white_level = dcn10_set_cursor_sdr_white_level,

sys/dev/pci/drm/amd/display/dc/hwss/dcn35/dcn35_init.c

88

.set_cursor_sdr_white_level = dcn10_set_cursor_sdr_white_level,

sys/dev/pci/drm/amd/display/dc/hwss/dcn351/dcn351_init.c

87

.set_cursor_sdr_white_level = dcn10_set_cursor_sdr_white_level,

sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_init.c

62

.set_cursor_sdr_white_level = dcn10_set_cursor_sdr_white_level,