sys/dev/ic/dc.c
1136
sframe->dc_status = htole32(DC_TXSTAT_OWN);
sys/dev/ic/dc.c
1911
c->dc_status = htole32(DC_RXSTAT_OWN);
sys/dev/ic/dc.c
1992
rxstat = letoh32(c->dc_status);
sys/dev/ic/dc.c
2026
cur_rx->dc_status = htole32(rxstat | DC_RXSTAT_FIRSTFRAG);
sys/dev/ic/dc.c
2055
stat = sc->dc_ldata->dc_rx_list[pos].dc_status;
sys/dev/ic/dc.c
2097
rxstat = letoh32(cur_rx->dc_status);
sys/dev/ic/dc.c
2117
rxstat = letoh32(cur_rx->dc_status);
sys/dev/ic/dc.c
2201
txstat = letoh32(cur_tx->dc_status);
sys/dev/ic/dc.c
2511
f->dc_status = htole32(0);
sys/dev/ic/dc.c
2514
f->dc_status = htole32(DC_TXSTAT_OWN);
sys/dev/ic/dc.c
2538
sc->dc_ldata->dc_tx_list[*idx].dc_status = htole32(DC_TXSTAT_OWN);
sys/dev/ic/dc.c
952
sframe->dc_status = htole32(DC_TXSTAT_OWN);
sys/dev/ic/dcreg.h
412
u_int32_t dc_status;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
12269
enum dc_status status;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3077
static enum dc_status amdgpu_dm_commit_zero_streams(struct dc *dc)
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3100
enum dc_status res;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
3196
enum dc_status res;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7826
static enum dc_status dm_validate_stream_and_context(struct dc *dc,
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7829
enum dc_status dc_result = DC_ERROR_UNEXPECTED;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c
7900
enum dc_status dc_result = DC_OK;
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
1856
enum dc_status dm_dp_mst_is_port_support_mode(
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.h
93
enum dc_status dm_dp_mst_is_port_support_mode(
sys/dev/pci/drm/amd/display/dc/core/dc.c
2110
static enum dc_status dc_commit_state_no_check(struct dc *dc, struct dc_state *context)
sys/dev/pci/drm/amd/display/dc/core/dc.c
2113
enum dc_status result = DC_ERROR_UNEXPECTED;
sys/dev/pci/drm/amd/display/dc/core/dc.c
2339
enum dc_status dc_commit_streams(struct dc *dc, struct dc_commit_streams_params *params)
sys/dev/pci/drm/amd/display/dc/core/dc.c
2343
enum dc_status res = DC_OK;
sys/dev/pci/drm/amd/display/dc/core/dc.c
4891
enum dc_status ret = DC_ERROR_UNEXPECTED;
sys/dev/pci/drm/amd/display/dc/core/dc.c
5498
enum dc_status dc_set_clock(struct dc *dc, enum dc_clock_type clock_type, uint32_t clk_khz, uint32_t stepping)
sys/dev/pci/drm/amd/display/dc/core/dc.c
6016
enum dc_status dc_process_dmub_set_mst_slots(const struct dc *dc,
sys/dev/pci/drm/amd/display/dc/core/dc_debug.c
214
char *dc_status_to_str(enum dc_status status)
sys/dev/pci/drm/amd/display/dc/core/dc_link_exports.c
397
enum dc_status dc_link_dp_read_hpd_rx_irq_data(
sys/dev/pci/drm/amd/display/dc/core/dc_link_exports.c
519
enum dc_status dc_link_validate_dp_tunneling_bandwidth(const struct dc *dc, const struct dc_state *new_ctx)
sys/dev/pci/drm/amd/display/dc/core/dc_resource.c
1698
enum dc_status resource_build_scaling_params_for_context(
sys/dev/pci/drm/amd/display/dc/core/dc_resource.c
2839
enum dc_status resource_add_otg_master_for_stream_output(struct dc_state *new_ctx,
sys/dev/pci/drm/amd/display/dc/core/dc_resource.c
3860
enum dc_status resource_map_pool_resources(
sys/dev/pci/drm/amd/display/dc/core/dc_resource.c
4074
enum dc_status dc_validate_with_context(struct dc *dc,
sys/dev/pci/drm/amd/display/dc/core/dc_resource.c
4084
enum dc_status res = DC_ERROR_UNEXPECTED;
sys/dev/pci/drm/amd/display/dc/core/dc_resource.c
4310
enum dc_status dc_validate_global_state(
sys/dev/pci/drm/amd/display/dc/core/dc_resource.c
4315
enum dc_status result = DC_ERROR_UNEXPECTED;
sys/dev/pci/drm/amd/display/dc/core/dc_resource.c
4833
enum dc_status resource_map_clock_resources(
sys/dev/pci/drm/amd/display/dc/core/dc_resource.c
5067
enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream)
sys/dev/pci/drm/amd/display/dc/core/dc_resource.c
5074
enum dc_status res = DC_OK;
sys/dev/pci/drm/amd/display/dc/core/dc_resource.c
5098
enum dc_status dc_validate_plane(struct dc *dc, const struct dc_plane_state *plane_state)
sys/dev/pci/drm/amd/display/dc/core/dc_resource.c
5100
enum dc_status res = DC_OK;
sys/dev/pci/drm/amd/display/dc/core/dc_resource.c
5488
enum dc_status update_dp_encoder_resources_for_test_harness(const struct dc *dc,
sys/dev/pci/drm/amd/display/dc/core/dc_state.c
373
enum dc_status dc_state_add_stream(
sys/dev/pci/drm/amd/display/dc/core/dc_state.c
378
enum dc_status res;
sys/dev/pci/drm/amd/display/dc/core/dc_state.c
402
enum dc_status dc_state_remove_stream(
sys/dev/pci/drm/amd/display/dc/core/dc_state.c
785
enum dc_status dc_state_add_phantom_stream(const struct dc *dc,
sys/dev/pci/drm/amd/display/dc/core/dc_state.c
792
enum dc_status res = dc_state_add_stream(dc, state, phantom_stream);
sys/dev/pci/drm/amd/display/dc/core/dc_state.c
820
enum dc_status dc_state_remove_phantom_stream(const struct dc *dc,
sys/dev/pci/drm/amd/display/dc/core/dc_stream.c
803
enum dc_status dc_stream_add_dsc_to_resource(struct dc *dc,
sys/dev/pci/drm/amd/display/dc/dc.h
1891
enum dc_status dc_validate_plane(struct dc *dc, const struct dc_plane_state *plane_state);
sys/dev/pci/drm/amd/display/dc/dc.h
1893
enum dc_status dc_validate_with_context(struct dc *dc,
sys/dev/pci/drm/amd/display/dc/dc.h
1902
enum dc_status dc_validate_global_state(
sys/dev/pci/drm/amd/display/dc/dc.h
1930
enum dc_status dc_commit_streams(struct dc *dc, struct dc_commit_streams_params *params);
sys/dev/pci/drm/amd/display/dc/dc.h
2146
enum dc_status dc_link_dp_read_hpd_rx_irq_data(
sys/dev/pci/drm/amd/display/dc/dc.h
2506
enum dc_status dc_link_validate_dp_tunneling_bandwidth(const struct dc *dc, const struct dc_state *new_ctx);
sys/dev/pci/drm/amd/display/dc/dc.h
2637
enum dc_status dc_set_clock(struct dc *dc, enum dc_clock_type clock_type, uint32_t clk_khz, uint32_t stepping);
sys/dev/pci/drm/amd/display/dc/dc.h
2700
enum dc_status dc_process_dmub_set_mst_slots(const struct dc *dc,
sys/dev/pci/drm/amd/display/dc/dc_state.h
41
enum dc_status dc_state_add_stream(const struct dc *dc,
sys/dev/pci/drm/amd/display/dc/dc_state.h
45
enum dc_status dc_state_remove_stream(
sys/dev/pci/drm/amd/display/dc/dc_state_priv.h
63
enum dc_status dc_state_add_phantom_stream(const struct dc *dc,
sys/dev/pci/drm/amd/display/dc/dc_state_priv.h
67
enum dc_status dc_state_remove_phantom_stream(const struct dc *dc,
sys/dev/pci/drm/amd/display/dc/dc_stream.h
451
enum dc_status dc_stream_add_dsc_to_resource(struct dc *dc,
sys/dev/pci/drm/amd/display/dc/dc_stream.h
461
enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream);
sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.h
96
enum dc_status dml2_build_mapped_resource(const struct dc *dc, struct dc_state *context, struct dc_stream_state *stream);
sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h
123
enum dc_status (*add_phantom_stream)(const struct dc *dc,
sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.h
132
enum dc_status (*remove_phantom_stream)(const struct dc *dc,
sys/dev/pci/drm/amd/display/dc/hdcp/hdcp_msg.c
236
enum dc_status status;
sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
1516
static enum dc_status dce110_enable_stream_timing(
sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
1581
enum dc_status dce110_apply_single_controller_ctx_to_hw(
sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
2451
enum dc_status dce110_apply_ctx_to_hw(
sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
2457
enum dc_status status;
sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.h
38
enum dc_status dce110_apply_ctx_to_hw(
sys/dev/pci/drm/amd/display/dc/hwss/dce110/dce110_hwseq.h
42
enum dc_status dce110_apply_single_controller_ctx_to_hw(
sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
1178
enum dc_status dcn10_enable_stream_timing(
sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
4051
enum dc_status dcn10_set_clock(struct dc *dc,
sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.h
115
enum dc_status dce110_apply_ctx_to_hw(
sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.h
189
enum dc_status dcn10_set_clock(struct dc *dc,
sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.h
43
enum dc_status dcn10_enable_stream_timing(
sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
831
enum dc_status dcn20_enable_stream_timing(
sys/dev/pci/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.h
82
enum dc_status dcn20_enable_stream_timing(
sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
1572
enum dc_status status = DC_OK;
sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
757
enum dc_status dcn401_enable_stream_timing(
sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h
47
enum dc_status dcn401_enable_stream_timing(
sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h
222
enum dc_status (*apply_ctx_to_hw)(struct dc *dc,
sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer.h
341
enum dc_status (*set_clock)(struct dc *dc,
sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer_private.h
100
enum dc_status (*enable_stream_timing)(
sys/dev/pci/drm/amd/display/dc/hwss/hw_sequencer_private.h
174
enum dc_status (*apply_single_controller_ctx_to_hw)(
sys/dev/pci/drm/amd/display/dc/inc/core_status.h
66
char *dc_status_to_str(enum dc_status status);
sys/dev/pci/drm/amd/display/dc/inc/core_types.h
135
enum dc_status (*validate_global)(
sys/dev/pci/drm/amd/display/dc/inc/core_types.h
155
enum dc_status (*validate_plane)(
sys/dev/pci/drm/amd/display/dc/inc/core_types.h
159
enum dc_status (*add_stream_to_ctx)(
sys/dev/pci/drm/amd/display/dc/inc/core_types.h
164
enum dc_status (*remove_stream_from_ctx)(
sys/dev/pci/drm/amd/display/dc/inc/core_types.h
169
enum dc_status (*patch_unknown_plane_state)(
sys/dev/pci/drm/amd/display/dc/inc/core_types.h
204
enum dc_status (*add_dsc_to_stream_resource)(
sys/dev/pci/drm/amd/display/dc/inc/core_types.h
228
enum dc_status (*update_dc_state_for_encoder_switch)(struct dc_link *link,
sys/dev/pci/drm/amd/display/dc/inc/core_types.h
84
enum dc_status (*validate_bandwidth)(
sys/dev/pci/drm/amd/display/dc/inc/link_service.h
140
enum dc_status (*validate_mode_timing)(
sys/dev/pci/drm/amd/display/dc/inc/link_service.h
147
enum dc_status (*validate_dp_tunnel_bandwidth)(
sys/dev/pci/drm/amd/display/dc/inc/link_service.h
163
enum dc_status (*increase_mst_payload)(
sys/dev/pci/drm/amd/display/dc/inc/link_service.h
165
enum dc_status (*reduce_mst_payload)(
sys/dev/pci/drm/amd/display/dc/inc/link_service.h
242
enum dc_status (*dp_read_hpd_rx_irq_data)(
sys/dev/pci/drm/amd/display/dc/inc/resource.h
108
enum dc_status resource_map_pool_resources(
sys/dev/pci/drm/amd/display/dc/inc/resource.h
119
enum dc_status resource_build_scaling_params_for_context(
sys/dev/pci/drm/amd/display/dc/inc/resource.h
292
enum dc_status resource_add_otg_master_for_stream_output(struct dc_state *new_ctx,
sys/dev/pci/drm/amd/display/dc/inc/resource.h
577
enum dc_status resource_map_clock_resources(
sys/dev/pci/drm/amd/display/dc/inc/resource.h
582
enum dc_status resource_map_phy_clock_resources(
sys/dev/pci/drm/amd/display/dc/inc/resource.h
636
enum dc_status update_dp_encoder_resources_for_test_harness(const struct dc *dc,
sys/dev/pci/drm/amd/display/dc/link/hwss/link_hwss_dpia.c
39
static enum dc_status status;
sys/dev/pci/drm/amd/display/dc/link/link_detection.c
527
enum dc_status status = DC_ERROR_UNEXPECTED;
sys/dev/pci/drm/amd/display/dc/link/link_dpms.c
104
enum dc_status status = DC_ERROR_UNEXPECTED;
sys/dev/pci/drm/amd/display/dc/link/link_dpms.c
1330
static enum dc_status deallocate_mst_payload(struct pipe_ctx *pipe_ctx)
sys/dev/pci/drm/amd/display/dc/link/link_dpms.c
1429
static enum dc_status allocate_mst_payload(struct pipe_ctx *pipe_ctx)
sys/dev/pci/drm/amd/display/dc/link/link_dpms.c
1656
static enum dc_status update_sst_payload(struct pipe_ctx *pipe_ctx,
sys/dev/pci/drm/amd/display/dc/link/link_dpms.c
1739
enum dc_status link_reduce_mst_payload(struct pipe_ctx *pipe_ctx, uint32_t bw_in_kbps)
sys/dev/pci/drm/amd/display/dc/link/link_dpms.c
1827
enum dc_status link_increase_mst_payload(struct pipe_ctx *pipe_ctx, uint32_t bw_in_kbps)
sys/dev/pci/drm/amd/display/dc/link/link_dpms.c
2036
static enum dc_status enable_link_dp(struct dc_state *state,
sys/dev/pci/drm/amd/display/dc/link/link_dpms.c
2040
enum dc_status status;
sys/dev/pci/drm/amd/display/dc/link/link_dpms.c
2159
static enum dc_status enable_link_edp(
sys/dev/pci/drm/amd/display/dc/link/link_dpms.c
2185
static enum dc_status enable_link_dp_mst(
sys/dev/pci/drm/amd/display/dc/link/link_dpms.c
2214
static enum dc_status enable_link_virtual(struct pipe_ctx *pipe_ctx)
sys/dev/pci/drm/amd/display/dc/link/link_dpms.c
2226
static enum dc_status enable_link(
sys/dev/pci/drm/amd/display/dc/link/link_dpms.c
2230
enum dc_status status = DC_ERROR_UNEXPECTED;
sys/dev/pci/drm/amd/display/dc/link/link_dpms.c
2462
enum dc_status status;
sys/dev/pci/drm/amd/display/dc/link/link_dpms.c
81
enum dc_status status = DC_ERROR_UNEXPECTED;
sys/dev/pci/drm/amd/display/dc/link/link_dpms.h
43
enum dc_status link_increase_mst_payload(struct pipe_ctx *pipe_ctx, uint32_t req_pbn);
sys/dev/pci/drm/amd/display/dc/link/link_dpms.h
44
enum dc_status link_reduce_mst_payload(struct pipe_ctx *pipe_ctx, uint32_t req_pbn);
sys/dev/pci/drm/amd/display/dc/link/link_validation.c
332
enum dc_status link_validate_mode_timing(
sys/dev/pci/drm/amd/display/dc/link/link_validation.c
392
enum dc_status link_validate_dp_tunnel_bandwidth(const struct dc *dc, const struct dc_state *new_ctx)
sys/dev/pci/drm/amd/display/dc/link/link_validation.c
396
enum dc_status result = DC_OK;
sys/dev/pci/drm/amd/display/dc/link/link_validation.h
29
enum dc_status link_validate_mode_timing(
sys/dev/pci/drm/amd/display/dc/link/link_validation.h
33
enum dc_status link_validate_dp_tunnel_bandwidth(
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1052
static enum dc_status wake_up_aux_channel(struct dc_link *link)
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1054
enum dc_status status = DC_ERROR_UNEXPECTED;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1326
enum dc_status status = DC_ERROR_UNEXPECTED;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1387
enum dc_status __maybe_unused result_write_min_hblank = DC_NOT_SUPPORTED;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1519
enum dc_status st = DC_OK;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1574
enum dc_status dp_retrieve_lttpr_cap(struct dc_link *link)
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1577
enum dc_status status;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c
1693
enum dc_status status = DC_ERROR_UNEXPECTED;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.h
46
enum dc_status dp_retrieve_lttpr_cap(struct dc_link *link);
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_dpia.c
49
enum dc_status dpcd_get_tunneling_device_data(struct dc_link *link)
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_dpia.c
51
enum dc_status status = DC_OK;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_dpia.h
35
enum dc_status dpcd_get_tunneling_device_data(struct dc_link *link);
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
293
enum dc_status retval;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
317
enum dc_status retval;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
334
enum dc_status dp_read_hpd_rx_irq_data(
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
338
static enum dc_status retval;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
416
enum dc_status result;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
51
enum dc_status dpcd_result = DC_ERROR_UNEXPECTED;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_irq_handler.h
35
enum dc_status dp_read_hpd_rx_irq_data(
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_phy.c
138
enum dc_status dp_set_fec_ready(struct dc_link *link, const struct link_resource *link_res, bool ready)
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_phy.c
146
enum dc_status status = DC_OK;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_phy.h
52
enum dc_status dp_set_fec_ready(struct dc_link *link,
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c
1019
enum dc_status status;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c
1047
enum dc_status dpcd_configure_channel_coding(struct dc_link *link,
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c
1053
enum dc_status status;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c
1068
enum dc_status dpcd_set_training_pattern(
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c
1072
enum dc_status status;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c
1093
enum dc_status dpcd_set_link_settings(
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c
1098
enum dc_status status;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c
1183
enum dc_status dpcd_set_lane_settings(
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c
1189
enum dc_status status;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c
548
enum dc_status status)
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c
594
enum dc_status dp_get_lane_status_and_lane_adjust(
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c
607
enum dc_status status;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c
903
enum dc_status configure_lttpr_mode_transparent(struct dc_link *link)
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c
914
static enum dc_status configure_lttpr_mode_non_transparent(
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c
923
enum dc_status result = DC_ERROR_UNEXPECTED;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c
981
enum dc_status dpcd_configure_lttpr_mode(struct dc_link *link, struct link_training_settings *lt_settings)
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c
983
enum dc_status status = DC_OK;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.h
199
enum dc_status status);
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.h
58
enum dc_status dpcd_set_training_pattern(
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.h
63
enum dc_status dpcd_set_lane_settings(
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.h
69
enum dc_status dpcd_set_link_settings(
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.h
80
enum dc_status dp_get_lane_status_and_lane_adjust(
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.h
88
enum dc_status dpcd_configure_lttpr_mode(
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.h
92
enum dc_status configure_lttpr_mode_transparent(struct dc_link *link);
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.h
94
enum dc_status dpcd_configure_channel_coding(
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_128b_132b.c
162
enum dc_status status = DC_OK;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_128b_132b.c
39
static enum dc_status dpcd_128b_132b_set_lane_settings(
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_128b_132b.c
43
enum dc_status status = core_link_write_dpcd(link,
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_128b_132b.c
82
enum dc_status status = DC_OK;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c
226
enum dc_status status;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c
346
enum dc_status status;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c
103
enum dc_status status;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c
147
static enum dc_status core_link_send_set_config(
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c
203
static enum dc_status convert_trng_ptn_to_trng_stg(enum dc_dp_training_pattern tps, enum dpia_set_config_ts *ts)
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c
205
enum dc_status status = DC_OK;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c
234
static enum dc_status dpcd_set_lt_pattern(
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c
241
enum dc_status status;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c
295
enum dc_status status = DC_ERROR_UNEXPECTED;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c
461
enum dc_status status;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c
591
enum dc_status status = DC_ERROR_UNEXPECTED;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c
735
enum dc_status status;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c
826
static enum dc_status dpcd_clear_lt_pattern(
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c
832
enum dc_status status;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c
866
enum dc_status status;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dpcd.c
197
enum dc_status core_link_read_dpcd(
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dpcd.c
209
enum dc_status status = DC_ERROR_UNEXPECTED;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dpcd.c
230
enum dc_status core_link_write_dpcd(
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dpcd.c
238
enum dc_status status = DC_ERROR_UNEXPECTED;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dpcd.c
44
static enum dc_status internal_link_read_dpcd(
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dpcd.c
59
static enum dc_status internal_link_write_dpcd(
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dpcd.h
31
enum dc_status core_link_read_dpcd(
sys/dev/pci/drm/amd/display/dc/link/protocols/link_dpcd.h
37
enum dc_status core_link_write_dpcd(
sys/dev/pci/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
460
enum dc_status result = DC_OK;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
484
enum dc_status result = DC_OK;
sys/dev/pci/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
57
enum dc_status result;
sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.c
823
static enum dc_status build_mapped_resource(
sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.c
840
enum dc_status dce100_validate_bandwidth(
sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.c
901
enum dc_status dce100_validate_global(
sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.c
911
enum dc_status dce100_add_stream_to_ctx(
sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.c
916
enum dc_status result = DC_ERROR_UNEXPECTED;
sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.c
938
enum dc_status dce100_validate_plane(const struct dc_plane_state *plane_state, struct dc_caps *caps)
sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.h
42
enum dc_status dce100_validate_plane(const struct dc_plane_state *plane_state, struct dc_caps *caps);
sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.h
44
enum dc_status dce100_validate_global(
sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.h
48
enum dc_status dce100_validate_bandwidth(
sys/dev/pci/drm/amd/display/dc/resource/dce100/dce100_resource.h
53
enum dc_status dce100_add_stream_to_ctx(
sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c
1037
static enum dc_status dce110_validate_plane(const struct dc_plane_state *plane_state,
sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c
1092
static enum dc_status dce110_validate_global(
sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c
1102
static enum dc_status dce110_add_stream_to_ctx(
sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c
1107
enum dc_status result = DC_ERROR_UNEXPECTED;
sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c
940
static enum dc_status build_mapped_resource(
sys/dev/pci/drm/amd/display/dc/resource/dce110/dce110_resource.c
963
static enum dc_status dce110_validate_bandwidth(
sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.c
1013
enum dc_status dce112_add_stream_to_ctx(
sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.c
1018
enum dc_status result;
sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.c
1032
static enum dc_status dce112_validate_global(
sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.c
869
static enum dc_status build_mapped_resource(
sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.c
886
enum dc_status dce112_validate_bandwidth(
sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.c
958
enum dc_status resource_map_phy_clock_resources(
sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.h
38
enum dc_status dce112_validate_with_context(
sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.h
45
enum dc_status dce112_validate_bandwidth(
sys/dev/pci/drm/amd/display/dc/resource/dce112/dce112_resource.h
50
enum dc_status dce112_add_stream_to_ctx(
sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c
1046
static enum dc_status build_mapped_resource(
sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c
1060
static enum dc_status dcn10_add_stream_to_ctx(
sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c
1065
enum dc_status result = DC_ERROR_UNEXPECTED;
sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c
1129
static enum dc_status dcn10_validate_bandwidth(
sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c
1143
static enum dc_status dcn10_validate_plane(const struct dc_plane_state *plane_state, struct dc_caps *caps)
sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c
1153
static enum dc_status dcn10_validate_global(struct dc *dc, struct dc_state *context)
sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c
1211
static enum dc_status dcn10_patch_unknown_plane_state(struct dc_plane_state *plane_state)
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
1291
static enum dc_status build_pipe_hw_param(struct pipe_ctx *pipe_ctx)
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
1310
enum dc_status dcn20_build_mapped_resource(const struct dc *dc, struct dc_state *context, struct dc_stream_state *stream)
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
1312
enum dc_status status = DC_OK;
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
1376
enum dc_status dcn20_add_dsc_to_stream_resource(struct dc *dc,
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
1380
enum dc_status result = DC_OK;
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
1410
static enum dc_status remove_dsc_from_stream_resource(struct dc *dc,
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
1433
enum dc_status dcn20_add_stream_to_ctx(struct dc *dc, struct dc_state *new_ctx, struct dc_stream_state *dc_stream)
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
1435
enum dc_status result = DC_ERROR_UNEXPECTED;
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
1453
enum dc_status dcn20_remove_stream_from_ctx(struct dc *dc, struct dc_state *new_ctx, struct dc_stream_state *dc_stream)
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
1455
enum dc_status result = DC_OK;
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
2127
enum dc_status dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context,
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
2198
enum dc_status dcn20_patch_unknown_plane_state(struct dc_plane_state *plane_state)
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.h
122
enum dc_status dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context, enum dc_validate_mode validate_mode);
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.h
163
enum dc_status dcn20_build_mapped_resource(const struct dc *dc, struct dc_state *context, struct dc_stream_state *stream);
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.h
164
enum dc_status dcn20_add_stream_to_ctx(struct dc *dc, struct dc_state *new_ctx, struct dc_stream_state *dc_stream);
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.h
165
enum dc_status dcn20_add_dsc_to_stream_resource(struct dc *dc, struct dc_state *dc_ctx, struct dc_stream_state *dc_stream);
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.h
166
enum dc_status dcn20_remove_stream_from_ctx(struct dc *dc, struct dc_state *new_ctx, struct dc_stream_state *dc_stream);
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.h
167
enum dc_status dcn20_patch_unknown_plane_state(struct dc_plane_state *plane_state);
sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c
1353
static enum dc_status dcn21_patch_unknown_plane_state(struct dc_plane_state *plane_state)
sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c
926
static enum dc_status dcn21_validate_bandwidth(struct dc *dc, struct dc_state *context,
sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c
1280
enum dc_status dcn30_add_stream_to_ctx(struct dc *dc, struct dc_state *new_ctx, struct dc_stream_state *dc_stream)
sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c
2038
enum dc_status dcn30_validate_bandwidth(struct dc *dc,
sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.h
59
enum dc_status dcn30_validate_bandwidth(struct dc *dc, struct dc_state *context,
sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.h
96
enum dc_status dcn30_add_stream_to_ctx(
sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c
1761
enum dc_status dcn31_validate_bandwidth(struct dc *dc,
sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c
2239
enum dc_status dcn31_update_dc_state_for_encoder_switch(struct dc_link *link,
sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.h
40
enum dc_status dcn31_validate_bandwidth(struct dc *dc,
sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.h
69
enum dc_status dcn31_update_dc_state_for_encoder_switch(struct dc_link *link,
sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c
1699
enum dc_status dcn314_validate_bandwidth(struct dc *dc,
sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.h
42
enum dc_status dcn314_validate_bandwidth(struct dc *dc,
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
1814
enum dc_status dcn32_validate_bandwidth(struct dc *dc,
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
1819
enum dc_status status;
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
101
enum dc_status dcn32_validate_bandwidth(struct dc *dc,
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
1735
static enum dc_status dcn35_validate_bandwidth(struct dc *dc,
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
1755
enum dc_status dcn35_patch_unknown_plane_state(struct dc_plane_state *plane_state)
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.h
38
enum dc_status dcn35_patch_unknown_plane_state(struct dc_plane_state *plane_state);
sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
1715
static enum dc_status dcn351_validate_bandwidth(struct dc *dc,
sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c
1716
static enum dc_status dcn35_validate_bandwidth(struct dc *dc,
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
1630
enum dc_status dcn401_patch_unknown_plane_state(struct dc_plane_state *plane_state)
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
1637
enum dc_status dcn401_validate_bandwidth(struct dc *dc,
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
1642
enum dc_status status = DC_OK;
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.h
23
enum dc_status dcn401_patch_unknown_plane_state(struct dc_plane_state *plane_state);
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.h
25
enum dc_status dcn401_validate_bandwidth(struct dc *dc,