CCK_REG_DSI_PLL_CONTROL
vlv_cck_write(display->drm, CCK_REG_DSI_PLL_CONTROL, 0);
vlv_cck_write(display->drm, CCK_REG_DSI_PLL_CONTROL,
vlv_cck_write(display->drm, CCK_REG_DSI_PLL_CONTROL, config->dsi_pll.ctrl);
ret = poll_timeout_us(val = vlv_cck_read(display->drm, CCK_REG_DSI_PLL_CONTROL),
tmp = vlv_cck_read(display->drm, CCK_REG_DSI_PLL_CONTROL);
vlv_cck_write(display->drm, CCK_REG_DSI_PLL_CONTROL, tmp);
pll_ctl = vlv_cck_read(display->drm, CCK_REG_DSI_PLL_CONTROL);
cur_state = vlv_cck_read(display->drm, CCK_REG_DSI_PLL_CONTROL) & DSI_PLL_VCO_EN;