Symbol: dc_clocks
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
1113
void dm_set_dcn_clocks(struct dc_context *ctx, struct dc_clocks *clks)
sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h
491
TP_PROTO(const struct dc_clocks *clk),
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr.c
194
struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk;
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr.c
36
memset(&(clk_mgr->clks), 0, sizeof(struct dc_clocks));
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr.c
39
static int rv1_determine_dppclk_threshold(struct clk_mgr_internal *clk_mgr, struct dc_clocks *new_clocks)
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr.c
88
struct dc_clocks *new_clocks,
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c
221
struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk;
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c
349
struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk;
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c
405
memset(&(clk_mgr->clks), 0, sizeof(struct dc_clocks));
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c
469
static bool dcn2_are_clock_states_equal(struct dc_clocks *a,
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c
470
struct dc_clocks *b)
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c
77
memset(&(clk_mgr->clks), 0, sizeof(struct dc_clocks));
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c
89
struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk;
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
136
struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk;
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
447
memset(&(clk_mgr->clks), 0, sizeof(struct dc_clocks));
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
528
static bool rn_are_clock_states_equal(struct dc_clocks *a,
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
529
struct dc_clocks *b)
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c
114
memset(&(clk_mgr_base->clks), 0, sizeof(struct dc_clocks));
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c
198
struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk;
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c
436
static bool dcn3_are_clock_states_equal(struct dc_clocks *a,
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c
437
struct dc_clocks *b)
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c
100
struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk;
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c
379
memset(&(clk_mgr->clks), 0, sizeof(struct dc_clocks));
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c
465
static bool vg_are_clock_states_equal(struct dc_clocks *a,
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c
466
struct dc_clocks *b)
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c
140
struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk;
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c
301
memset(&(clk_mgr->clks), 0, sizeof(struct dc_clocks));
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c
310
bool dcn31_are_clock_states_equal(struct dc_clocks *a,
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c
311
struct dc_clocks *b)
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.h
42
bool dcn31_are_clock_states_equal(struct dc_clocks *a,
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.h
43
struct dc_clocks *b);
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c
254
memset(&(clk_mgr->clks), 0, sizeof(struct dc_clocks));
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c
279
struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk;
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c
446
bool dcn314_are_clock_states_equal(struct dc_clocks *a,
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c
447
struct dc_clocks *b)
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.h
50
bool dcn314_are_clock_states_equal(struct dc_clocks *a,
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.h
51
struct dc_clocks *b);
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c
131
struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk;
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c
141
struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk;
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c
1069
static bool dcn32_are_clock_states_equal(struct dc_clocks *a,
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c
1070
struct dc_clocks *b)
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c
174
memset(&(clk_mgr_base->clks), 0, sizeof(struct dc_clocks));
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c
297
static void dcn32_update_dppclk_dispclk_freq(struct clk_mgr_internal *clk_mgr, struct dc_clocks *new_clocks)
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c
506
struct dc_clocks *new_clocks,
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c
626
struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk;
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c
1234
struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk;
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c
344
struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk;
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c
383
struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk;
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c
573
bool dcn35_are_clock_states_equal(struct dc_clocks *a,
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c
574
struct dc_clocks *b)
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c
725
memset(&(clk_mgr->clks), 0, sizeof(struct dc_clocks));
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.h
49
bool dcn35_are_clock_states_equal(struct dc_clocks *a,
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.h
50
struct dc_clocks *b);
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c
1080
struct dc_clocks *new_clocks,
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c
1332
struct dc_clocks new_clocks;
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c
1339
memcpy(&new_clocks, &clk_mgr_base->clks, sizeof(struct dc_clocks));
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c
1428
static bool dcn401_are_clock_states_equal(struct dc_clocks *a,
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c
1429
struct dc_clocks *b)
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c
227
memset(&(clk_mgr_base->clks), 0, sizeof(struct dc_clocks));
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c
411
struct dc_clocks *new_clocks,
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c
767
struct dc_clocks *new_clocks,
sys/dev/pci/drm/amd/display/dc/core/dc.c
3055
} else if (memcmp(&dc->current_state->bw_ctx.bw.dcn.clk, &dc->clk_mgr->clks, offsetof(struct dc_clocks, prev_p_state_change_support)) != 0) {
sys/dev/pci/drm/amd/display/dc/dm_helpers.h
192
struct dc_clocks *clks);
sys/dev/pci/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
4058
struct dc_clocks *current_clocks = &context->bw_ctx.bw.dcn.clk;
sys/dev/pci/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
751
struct dc_clocks *clocks = &dc->current_state->bw_ctx.bw.dcn.clk;
sys/dev/pci/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
56
struct dc_clocks *clocks = &dc->current_state->bw_ctx.bw.dcn.clk;
sys/dev/pci/drm/amd/display/dc/inc/core_types.h
561
struct dc_clocks clk;
sys/dev/pci/drm/amd/display/dc/inc/hw/clk_mgr.h
307
bool (*are_clock_states_equal) (struct dc_clocks *a,
sys/dev/pci/drm/amd/display/dc/inc/hw/clk_mgr.h
308
struct dc_clocks *b);
sys/dev/pci/drm/amd/display/dc/inc/hw/clk_mgr.h
348
struct dc_clocks clks;