d_status
status = in16rb(&cmd->d_status);
cmd->d_status = 0;
status = in16rb(&cmd->d_status);
cmd->d_status = 0;
while (DBDMA_LD4_ENDIAN(&dmap->d_status) & DBDMA_CNTRL_ACTIVE);
} while (DBDMA_LD4_ENDIAN(&dmap->d_status) & DBDMA_CNTRL_ACTIVE);
while (DBDMA_LD4_ENDIAN(&dmap->d_status) &
while (DBDMA_LD4_ENDIAN(&dmap->d_status) & (DBDMA_CNTRL_FLUSH));
while (DBDMA_LD4_ENDIAN(&dmap->d_status) & DBDMA_CNTRL_RUN);
u_int16_t d_status;
(d)->d_status = 0; \
u_int32_t d_status; /* DBDMA Status Register */
status = in16rb(&cmd->d_status);
cmd->d_status = 0;
status = in16rb(&cmd->d_status);
cmd->d_status = 0;
status = dbdma_ld16(&cmd->d_status);
cmd->d_status = 0;
cmd->d_status = 0;
status = dbdma_ld16(&cmd->d_status);
status = dbdma_ld16(&cmd->d_status);
desc64[idx].d_status = status;
desc32[idx].d_status = status;
status = desc64[idx].d_status;
status = desc32[idx].d_status;
desc64[idx].d_status = 0;
desc32[idx].d_status = 0;
status = desc64[idx].d_status;
status = desc32[idx].d_status;
desc64[idx].d_status |= GEM_TXD_USED;
desc32[idx].d_status |= GEM_TXD_USED;
desc64[i].d_status,
desc32[i].d_status,
desc64[i].d_status,
desc32[i].d_status,
uint32_t d_status;
uint32_t d_status;
desc64[i].d_status = GEM_TXD_USED;
desc64[i].d_status |= GEM_TXD_WRAP;
desc32[i].d_status = GEM_TXD_USED;
desc32[i].d_status |= GEM_TXD_WRAP;
desc64[i].d_status = GEM_TXD_USED | GEM_TXD_WRAP;
desc32[i].d_status = GEM_TXD_USED | GEM_TXD_WRAP;
u_int32_t d_status;
di->d_status = 0;
di->d_status = 0;
if ((((volatile tulip_desc_t *) eop)->d_status & (TULIP_DSTS_OWNER|TULIP_DSTS_RxFIRSTDESC|TULIP_DSTS_RxLASTDESC)) == (TULIP_DSTS_RxFIRSTDESC|TULIP_DSTS_RxLASTDESC)) {
if (((volatile tulip_desc_t *) eop)->d_status & TULIP_DSTS_OWNER)
while ((((volatile tulip_desc_t *) eop)->d_status & TULIP_DSTS_RxLASTDESC) == 0) {
if (eop == ri->ri_nextout || ((((volatile tulip_desc_t *) eop)->d_status & TULIP_DSTS_OWNER))) {
total_len = ((eop->d_status >> 16) & 0x7FFF) - 4;
&& ((eop->d_status & TULIP_DSTS_ERRSUM) == 0)) {
if (eop->d_status & (TULIP_DSTS_RxBADLENGTH|TULIP_DSTS_RxOVERFLOW|TULIP_DSTS_RxWATCHDOG))
if (eop->d_status & TULIP_DSTS_RxTOOLONG) {
if (eop->d_status & TULIP_DSTS_RxBADCRC) {
if (eop->d_status & TULIP_DSTS_RxDRBBLBIT) {
nextout->d_status = TULIP_DSTS_OWNER;
if (((volatile tulip_desc_t *) ri->ri_nextin)->d_status & TULIP_DSTS_OWNER)
const u_int32_t d_status = ri->ri_nextin->d_status;
if (d_status & (TULIP_DSTS_TxNOCARR|TULIP_DSTS_TxEXCCOLL)) {
if (d_status & TULIP_DSTS_TxNOCARR)
if (d_status & TULIP_DSTS_TxEXCCOLL)
if (d_status & TULIP_DSTS_ERRSUM) {
if (d_status & TULIP_DSTS_TxEXCCOLL)
if (d_status & TULIP_DSTS_TxLATECOLL)
if (d_status & (TULIP_DSTS_TxNOCARR|TULIP_DSTS_TxCARRLOSS))
if (d_status & (TULIP_DSTS_TxUNDERFLOW|TULIP_DSTS_TxBABBLE))
if (d_status & TULIP_DSTS_TxUNDERFLOW)
if (d_status & TULIP_DSTS_TxBABBLE)
(d_status & TULIP_DSTS_TxCOLLMASK)
else if (d_status & TULIP_DSTS_TxDEFERRED)
if (d_status & TULIP_DSTS_TxNOHRTBT & sc->tulip_flags)
u_int32_t d_status;
d_status = 0;
eop->d_status = d_status;
d_status = TULIP_DSTS_OWNER;
eop->d_status = d_status;
nextout->d_status = 0;
ri->ri_nextout->d_status = TULIP_DSTS_OWNER;
ri->ri_nextout->d_status = 0;
nextout->d_status = TULIP_DSTS_OWNER;
dp->d_status = D_SKIPPED1;
dp->d_status = D_SKIPPED2;
dp->d_status = diffreg(path1, path2, flags);
print_status(dp->d_status, path1, path2, "");