lib/libcrypto/ec/ec_asn1.c
1019
if (!ec_asn1_parameters_curve2group(params->curve,
lib/libcrypto/ec/ec_asn1.c
127
X9_62_CURVE *curve;
lib/libcrypto/ec/ec_asn1.c
391
.offset = offsetof(ECPARAMETERS, curve),
lib/libcrypto/ec/ec_asn1.c
717
ec_asn1_group2curve(const EC_GROUP *group, X9_62_CURVE *curve)
lib/libcrypto/ec/ec_asn1.c
724
if (curve == NULL || curve->a == NULL || curve->b == NULL)
lib/libcrypto/ec/ec_asn1.c
737
if (!ec_asn1_encode_field_element(group, a, curve->a)) {
lib/libcrypto/ec/ec_asn1.c
741
if (!ec_asn1_encode_field_element(group, b, curve->b)) {
lib/libcrypto/ec/ec_asn1.c
746
ASN1_BIT_STRING_free(curve->seed);
lib/libcrypto/ec/ec_asn1.c
747
curve->seed = NULL;
lib/libcrypto/ec/ec_asn1.c
750
if ((curve->seed = ASN1_BIT_STRING_new()) == NULL) {
lib/libcrypto/ec/ec_asn1.c
754
if (!ASN1_BIT_STRING_set(curve->seed,
lib/libcrypto/ec/ec_asn1.c
759
if (!asn1_abs_set_unused_bits(curve->seed, 0)) {
lib/libcrypto/ec/ec_asn1.c
794
if (!ec_asn1_group2curve(group, parameters->curve)) {
lib/libcrypto/ec/ec_asn1.c
912
ec_asn1_parameters_curve2group(const X9_62_CURVE *curve,
lib/libcrypto/ec/ec_asn1.c
924
if ((a = BN_bin2bn(curve->a->data, curve->a->length, NULL)) == NULL)
lib/libcrypto/ec/ec_asn1.c
926
if ((b = BN_bin2bn(curve->b->data, curve->b->length, NULL)) == NULL)
lib/libcrypto/ec/ec_asn1.c
990
if ((seed = params->curve->seed) != NULL) {
lib/libcrypto/ec/ec_curve.c
1168
ec_group_new_from_data(const struct ec_curve *curve)
lib/libcrypto/ec/ec_curve.c
1210
if (BN_bin2bn(curve->p, curve->param_len, p) == NULL) {
lib/libcrypto/ec/ec_curve.c
1214
if (BN_bin2bn(curve->a, curve->param_len, a) == NULL) {
lib/libcrypto/ec/ec_curve.c
1218
if (BN_bin2bn(curve->b, curve->param_len, b) == NULL) {
lib/libcrypto/ec/ec_curve.c
1226
EC_GROUP_set_curve_name(group, curve->nid);
lib/libcrypto/ec/ec_curve.c
1232
if (BN_bin2bn(curve->x, curve->param_len, x) == NULL) {
lib/libcrypto/ec/ec_curve.c
1236
if (BN_bin2bn(curve->y, curve->param_len, y) == NULL) {
lib/libcrypto/ec/ec_curve.c
1244
if (BN_bin2bn(curve->order, curve->param_len, order) == NULL) {
lib/libcrypto/ec/ec_curve.c
1248
if (!BN_set_word(cofactor, curve->cofactor)) {
lib/libcrypto/ec/ec_curve.c
1257
if (curve->seed != NULL) {
lib/libcrypto/ec/ec_curve.c
1258
if (!EC_GROUP_set_seed(group, curve->seed, curve->seed_len)) {
lib/libcrypto/ec/ec_curve.c
1295
ec_curve_free(struct ec_curve *curve)
lib/libcrypto/ec/ec_curve.c
1297
if (curve == NULL)
lib/libcrypto/ec/ec_curve.c
1301
free((uint8_t *)curve->seed);
lib/libcrypto/ec/ec_curve.c
1302
free((uint8_t *)curve->p);
lib/libcrypto/ec/ec_curve.c
1303
free((uint8_t *)curve->a);
lib/libcrypto/ec/ec_curve.c
1304
free((uint8_t *)curve->b);
lib/libcrypto/ec/ec_curve.c
1305
free((uint8_t *)curve->x);
lib/libcrypto/ec/ec_curve.c
1306
free((uint8_t *)curve->y);
lib/libcrypto/ec/ec_curve.c
1307
free((uint8_t *)curve->order);
lib/libcrypto/ec/ec_curve.c
1309
free(curve);
lib/libcrypto/ec/ec_curve.c
1341
struct ec_curve *curve = NULL;
lib/libcrypto/ec/ec_curve.c
1372
if ((curve = calloc(1, sizeof(*curve))) == NULL)
lib/libcrypto/ec/ec_curve.c
1375
curve->param_len = BN_num_bytes(p);
lib/libcrypto/ec/ec_curve.c
1376
if (BN_num_bytes(order) > curve->param_len)
lib/libcrypto/ec/ec_curve.c
1377
curve->param_len = BN_num_bytes(order);
lib/libcrypto/ec/ec_curve.c
1379
if (!ec_curve_encode_parameter(p, curve->param_len, &curve->p))
lib/libcrypto/ec/ec_curve.c
1381
if (!ec_curve_encode_parameter(a, curve->param_len, &curve->a))
lib/libcrypto/ec/ec_curve.c
1383
if (!ec_curve_encode_parameter(b, curve->param_len, &curve->b))
lib/libcrypto/ec/ec_curve.c
1385
if (!ec_curve_encode_parameter(x, curve->param_len, &curve->x))
lib/libcrypto/ec/ec_curve.c
1387
if (!ec_curve_encode_parameter(y, curve->param_len, &curve->y))
lib/libcrypto/ec/ec_curve.c
1389
if (!ec_curve_encode_parameter(order, curve->param_len, &curve->order))
lib/libcrypto/ec/ec_curve.c
1400
curve->cofactor = cofactor_word;
lib/libcrypto/ec/ec_curve.c
1412
curve->seed = seed;
lib/libcrypto/ec/ec_curve.c
1413
curve->seed_len = seed_len;
lib/libcrypto/ec/ec_curve.c
1419
return curve;
lib/libcrypto/ec/ec_curve.c
1425
ec_curve_free(curve);
lib/libcrypto/ec/ec_curve.c
1481
ec_group_nid_from_curve(const struct ec_curve *curve)
lib/libcrypto/ec/ec_curve.c
1486
if (ec_curve_cmp(curve, &ec_curve_list[i]) == 0)
lib/libcrypto/ec/ec_curve.c
1496
struct ec_curve *curve;
lib/libcrypto/ec/ec_curve.c
1502
if ((curve = ec_curve_from_group(group)) == NULL)
lib/libcrypto/ec/ec_curve.c
1504
if ((nid = ec_group_nid_from_curve(curve)) == NID_undef)
lib/libcrypto/ec/ec_curve.c
1512
ec_curve_free(curve);
lib/libtls/tls_config.c
555
tls_config_set_ecdhecurve(struct tls_config *config, const char *curve)
lib/libtls/tls_config.c
557
if (curve == NULL ||
lib/libtls/tls_config.c
558
strcasecmp(curve, "none") == 0 ||
lib/libtls/tls_config.c
559
strcasecmp(curve, "auto") == 0) {
lib/libtls/tls_config.c
560
curve = TLS_ECDHE_CURVES;
lib/libtls/tls_config.c
561
} else if (strchr(curve, ',') != NULL || strchr(curve, ':') != NULL) {
lib/libtls/tls_config.c
563
"invalid ecdhe curve '%s'", curve);
lib/libtls/tls_config.c
567
return tls_config_set_ecdhecurves(config, curve);
regress/lib/libcrypto/ec/ec_arithmetic.c
104
.curve = NID_secp521r1,
regress/lib/libcrypto/ec/ec_arithmetic.c
135
if ((group = EC_GROUP_new_by_curve_name(bm->curve)) == NULL)
regress/lib/libcrypto/ec/ec_arithmetic.c
56
int curve;
regress/lib/libcrypto/ec/ec_arithmetic.c
64
.curve = NID_X9_62_prime256v1,
regress/lib/libcrypto/ec/ec_arithmetic.c
69
.curve = NID_secp384r1,
regress/lib/libcrypto/ec/ec_arithmetic.c
74
.curve = NID_secp521r1,
regress/lib/libcrypto/ec/ec_arithmetic.c
79
.curve = NID_X9_62_prime256v1,
regress/lib/libcrypto/ec/ec_arithmetic.c
84
.curve = NID_secp384r1,
regress/lib/libcrypto/ec/ec_arithmetic.c
89
.curve = NID_secp521r1,
regress/lib/libcrypto/ec/ec_arithmetic.c
94
.curve = NID_X9_62_prime256v1,
regress/lib/libcrypto/ec/ec_arithmetic.c
99
.curve = NID_secp384r1,
regress/lib/libcrypto/ec/ec_asn1_test.c
1007
curve->descr);
regress/lib/libcrypto/ec/ec_asn1_test.c
1012
if (compare_data(curve->descr, der, der_len,
regress/lib/libcrypto/ec/ec_asn1_test.c
1013
curve->param, curve->param_len) == -1)
regress/lib/libcrypto/ec/ec_asn1_test.c
1021
fprintf(stderr, "FAIL: %s unexpected error %lu\n", curve->descr,
regress/lib/libcrypto/ec/ec_asn1_test.c
1026
pder = curve->named;
regress/lib/libcrypto/ec/ec_asn1_test.c
1027
der_len = curve->named_len;
regress/lib/libcrypto/ec/ec_asn1_test.c
1029
if (!curve->known_named_curve && new_group != NULL) {
regress/lib/libcrypto/ec/ec_asn1_test.c
1031
curve->descr);
regress/lib/libcrypto/ec/ec_asn1_test.c
1038
if (!curve->known_named_curve &&
regress/lib/libcrypto/ec/ec_asn1_test.c
1041
curve->descr, EC_R_UNKNOWN_GROUP, ERR_GET_REASON(error));
regress/lib/libcrypto/ec/ec_asn1_test.c
1048
pder = curve->param;
regress/lib/libcrypto/ec/ec_asn1_test.c
1049
der_len = curve->param_len;
regress/lib/libcrypto/ec/ec_asn1_test.c
1052
curve->descr);
regress/lib/libcrypto/ec/ec_asn1_test.c
1060
curve->descr, EC_R_UNKNOWN_GROUP, ERR_GET_REASON(error));
regress/lib/libcrypto/ec/ec_asn1_test.c
1113
ec_group_check_prime_order(EC_builtin_curve *curve, BN_CTX *ctx)
regress/lib/libcrypto/ec/ec_asn1_test.c
1120
if ((group = EC_GROUP_new_by_curve_name(curve->nid)) == NULL)
regress/lib/libcrypto/ec/ec_asn1_test.c
1133
__func__, curve->nid, rv);
regress/lib/libcrypto/ec/ec_asn1_test.c
2515
ec_group_check_seed(const EC_builtin_curve *curve, BN_CTX *ctx)
regress/lib/libcrypto/ec/ec_asn1_test.c
2524
if ((group = EC_GROUP_new_by_curve_name(curve->nid)) == NULL)
regress/lib/libcrypto/ec/ec_asn1_test.c
2639
__func__, curve->comment);
regress/lib/libcrypto/ec/ec_asn1_test.c
398
ec_group_roundtrip_builtin_curve(const EC_builtin_curve *curve, BN_CTX *ctx)
regress/lib/libcrypto/ec/ec_asn1_test.c
403
if ((group = EC_GROUP_new_by_curve_name(curve->nid)) == NULL)
regress/lib/libcrypto/ec/ec_asn1_test.c
404
errx(1, "failed to instantiate curve %d", curve->nid);
regress/lib/libcrypto/ec/ec_asn1_test.c
407
fprintf(stderr, "FAIL: EC_GROUP_check(%d) failed\n", curve->nid);
regress/lib/libcrypto/ec/ec_asn1_test.c
411
if ((simple_group = ec_group_simple_from_builtin(group, curve->nid,
regress/lib/libcrypto/ec/ec_asn1_test.c
413
errx(1, "failed to instantiate simple group %d", curve->nid);
regress/lib/libcrypto/ec/ec_asn1_test.c
416
fprintf(stderr, "FAIL: EC_GROUP_check(%d) failed\n", curve->nid);
regress/lib/libcrypto/ec/ec_asn1_test.c
420
failed |= ec_group_roundtrip_group(group, curve->nid);
regress/lib/libcrypto/ec/ec_asn1_test.c
421
failed |= ec_group_roundtrip_group(simple_group, curve->nid);
regress/lib/libcrypto/ec/ec_asn1_test.c
514
static const struct curve wei25519 = {
regress/lib/libcrypto/ec/ec_asn1_test.c
573
static const struct curve wei25519_2 = {
regress/lib/libcrypto/ec/ec_asn1_test.c
627
static const struct curve wei25519_3 = {
regress/lib/libcrypto/ec/ec_asn1_test.c
652
static const struct curve wei25519_3_neg = {
regress/lib/libcrypto/ec/ec_asn1_test.c
715
static const struct curve secp256k1_m = {
regress/lib/libcrypto/ec/ec_asn1_test.c
790
static const struct curve bls12_377 = {
regress/lib/libcrypto/ec/ec_asn1_test.c
815
ec_group_from_curve_method(const struct curve *curve, const EC_METHOD *method,
regress/lib/libcrypto/ec/ec_asn1_test.c
839
if (BN_hex2bn(&p, curve->p) == 0)
regress/lib/libcrypto/ec/ec_asn1_test.c
841
if (BN_hex2bn(&a, curve->a) == 0)
regress/lib/libcrypto/ec/ec_asn1_test.c
843
if (BN_hex2bn(&b, curve->b) == 0)
regress/lib/libcrypto/ec/ec_asn1_test.c
852
if (BN_hex2bn(&x, curve->x) == 0)
regress/lib/libcrypto/ec/ec_asn1_test.c
854
if (BN_hex2bn(&x, curve->x) == 0)
regress/lib/libcrypto/ec/ec_asn1_test.c
856
if (BN_hex2bn(&y, curve->y) == 0)
regress/lib/libcrypto/ec/ec_asn1_test.c
864
curve->descr);
regress/lib/libcrypto/ec/ec_asn1_test.c
869
if (BN_hex2bn(&order, curve->order) == 0)
regress/lib/libcrypto/ec/ec_asn1_test.c
874
fprintf(stderr, "FAIL: %s EC_GROUP_set_generator\n", curve->descr);
regress/lib/libcrypto/ec/ec_asn1_test.c
895
ec_group_new(const struct curve *curve, const EC_METHOD *method, BN_CTX *ctx)
regress/lib/libcrypto/ec/ec_asn1_test.c
903
if ((nid = OBJ_txt2nid(curve->oid)) == NID_undef)
regress/lib/libcrypto/ec/ec_asn1_test.c
904
nid = OBJ_create(curve->oid, curve->sn, curve->ln);
regress/lib/libcrypto/ec/ec_asn1_test.c
906
fprintf(stderr, "FAIL: OBJ_create(%s)\n", curve->descr);
regress/lib/libcrypto/ec/ec_asn1_test.c
915
if (BN_hex2bn(&cofactor, curve->cofactor) == 0)
regress/lib/libcrypto/ec/ec_asn1_test.c
918
if ((group = ec_group_from_curve_method(curve, method, ctx)) == NULL) {
regress/lib/libcrypto/ec/ec_asn1_test.c
919
fprintf(stderr, "FAIL: %s ec_group_from_curve_method\n", curve->descr);
regress/lib/libcrypto/ec/ec_asn1_test.c
925
fprintf(stderr, "FAIL: %s EC_GROUP_get_cofactor\n", curve->descr);
regress/lib/libcrypto/ec/ec_asn1_test.c
931
fprintf(stderr, "FAIL: %s cofactor: want ", curve->descr);
regress/lib/libcrypto/ec/ec_asn1_test.c
940
fprintf(stderr, "FAIL: %s EC_GROUP_check\n", curve->descr);
regress/lib/libcrypto/ec/ec_asn1_test.c
960
ec_group_non_builtin_curve(const struct curve *curve, const EC_METHOD *method,
regress/lib/libcrypto/ec/ec_asn1_test.c
975
if ((group = ec_group_new(curve, method, ctx)) == NULL)
regress/lib/libcrypto/ec/ec_asn1_test.c
979
fprintf(stderr, "FAIL: no curve name set for %s\n", curve->descr);
regress/lib/libcrypto/ec/ec_asn1_test.c
988
curve->descr);
regress/lib/libcrypto/ec/ec_asn1_test.c
993
if (compare_data(curve->descr, der, der_len,
regress/lib/libcrypto/ec/ec_asn1_test.c
994
curve->named, curve->named_len) == -1)
regress/lib/libcrypto/ec/ec_point_conversion.c
113
test_random_points_on_curve(EC_builtin_curve *curve)
regress/lib/libcrypto/ec/ec_point_conversion.c
122
if ((group = EC_GROUP_new_by_curve_name(curve->nid)) == NULL)
regress/lib/libcrypto/ec/ec_point_conversion.c
124
OBJ_nid2sn(curve->nid));
sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c
1488
const struct gamma_curve *curve;
sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c
1504
curve = params->arr_curve_points;
sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c
1507
REGAMMA_CNTLA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c
1508
REGAMMA_CNTLA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c
1509
REGAMMA_CNTLA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c
1510
REGAMMA_CNTLA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c
1511
curve += 2;
sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c
1514
REGAMMA_CNTLA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c
1515
REGAMMA_CNTLA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c
1516
REGAMMA_CNTLA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c
1517
REGAMMA_CNTLA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c
1518
curve += 2;
sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c
1521
REGAMMA_CNTLA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c
1522
REGAMMA_CNTLA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c
1523
REGAMMA_CNTLA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c
1524
REGAMMA_CNTLA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c
1525
curve += 2;
sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c
1528
REGAMMA_CNTLA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c
1529
REGAMMA_CNTLA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c
1530
REGAMMA_CNTLA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c
1531
REGAMMA_CNTLA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c
1532
curve += 2;
sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c
1535
REGAMMA_CNTLA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c
1536
REGAMMA_CNTLA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c
1537
REGAMMA_CNTLA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c
1538
REGAMMA_CNTLA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c
1539
curve += 2;
sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c
1542
REGAMMA_CNTLA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c
1543
REGAMMA_CNTLA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c
1544
REGAMMA_CNTLA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c
1545
REGAMMA_CNTLA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c
1546
curve += 2;
sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c
1549
REGAMMA_CNTLA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c
1550
REGAMMA_CNTLA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c
1551
REGAMMA_CNTLA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c
1552
REGAMMA_CNTLA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c
1553
curve += 2;
sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c
1556
REGAMMA_CNTLA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c
1557
REGAMMA_CNTLA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c
1558
REGAMMA_CNTLA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dce/dce_transform.c
1559
REGAMMA_CNTLA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
133
const struct gamma_curve *curve;
sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
192
curve = params->arr_curve_points;
sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
198
curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
204
curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
210
curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
216
curve[1].segments_num,
sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
226
curve += 2;
sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
231
curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
237
curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
243
curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
249
curve[1].segments_num,
sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
258
curve += 2;
sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
263
curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
269
curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
275
curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
281
curve[1].segments_num,
sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
290
curve += 2;
sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
295
curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
301
curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
307
curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
313
curve[1].segments_num,
sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
322
curve += 2;
sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
327
curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
333
curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
339
curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
345
curve[1].segments_num,
sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
354
curve += 2;
sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
359
curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
365
curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
371
curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
377
curve[1].segments_num,
sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
386
curve += 2;
sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
391
curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
397
curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
403
curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
409
curve[1].segments_num,
sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
418
curve += 2;
sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
423
curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
429
curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
435
curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
441
curve[1].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
634
const struct gamma_curve *curve;
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
659
curve = params->arr_curve_points;
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
661
CM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
662
CM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
663
CM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
664
CM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
666
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
668
CM_SHAPER_RAMA_EXP_REGION2_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
669
CM_SHAPER_RAMA_EXP_REGION2_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
670
CM_SHAPER_RAMA_EXP_REGION3_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
671
CM_SHAPER_RAMA_EXP_REGION3_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
673
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
675
CM_SHAPER_RAMA_EXP_REGION4_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
676
CM_SHAPER_RAMA_EXP_REGION4_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
677
CM_SHAPER_RAMA_EXP_REGION5_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
678
CM_SHAPER_RAMA_EXP_REGION5_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
680
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
682
CM_SHAPER_RAMA_EXP_REGION6_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
683
CM_SHAPER_RAMA_EXP_REGION6_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
684
CM_SHAPER_RAMA_EXP_REGION7_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
685
CM_SHAPER_RAMA_EXP_REGION7_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
687
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
689
CM_SHAPER_RAMA_EXP_REGION8_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
690
CM_SHAPER_RAMA_EXP_REGION8_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
691
CM_SHAPER_RAMA_EXP_REGION9_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
692
CM_SHAPER_RAMA_EXP_REGION9_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
694
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
696
CM_SHAPER_RAMA_EXP_REGION10_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
697
CM_SHAPER_RAMA_EXP_REGION10_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
698
CM_SHAPER_RAMA_EXP_REGION11_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
699
CM_SHAPER_RAMA_EXP_REGION11_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
701
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
703
CM_SHAPER_RAMA_EXP_REGION12_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
704
CM_SHAPER_RAMA_EXP_REGION12_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
705
CM_SHAPER_RAMA_EXP_REGION13_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
706
CM_SHAPER_RAMA_EXP_REGION13_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
708
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
710
CM_SHAPER_RAMA_EXP_REGION14_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
711
CM_SHAPER_RAMA_EXP_REGION14_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
712
CM_SHAPER_RAMA_EXP_REGION15_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
713
CM_SHAPER_RAMA_EXP_REGION15_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
715
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
717
CM_SHAPER_RAMA_EXP_REGION16_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
718
CM_SHAPER_RAMA_EXP_REGION16_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
719
CM_SHAPER_RAMA_EXP_REGION17_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
720
CM_SHAPER_RAMA_EXP_REGION17_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
722
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
724
CM_SHAPER_RAMA_EXP_REGION18_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
725
CM_SHAPER_RAMA_EXP_REGION18_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
726
CM_SHAPER_RAMA_EXP_REGION19_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
727
CM_SHAPER_RAMA_EXP_REGION19_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
729
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
731
CM_SHAPER_RAMA_EXP_REGION20_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
732
CM_SHAPER_RAMA_EXP_REGION20_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
733
CM_SHAPER_RAMA_EXP_REGION21_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
734
CM_SHAPER_RAMA_EXP_REGION21_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
736
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
738
CM_SHAPER_RAMA_EXP_REGION22_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
739
CM_SHAPER_RAMA_EXP_REGION22_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
740
CM_SHAPER_RAMA_EXP_REGION23_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
741
CM_SHAPER_RAMA_EXP_REGION23_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
743
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
745
CM_SHAPER_RAMA_EXP_REGION24_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
746
CM_SHAPER_RAMA_EXP_REGION24_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
747
CM_SHAPER_RAMA_EXP_REGION25_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
748
CM_SHAPER_RAMA_EXP_REGION25_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
750
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
752
CM_SHAPER_RAMA_EXP_REGION26_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
753
CM_SHAPER_RAMA_EXP_REGION26_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
754
CM_SHAPER_RAMA_EXP_REGION27_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
755
CM_SHAPER_RAMA_EXP_REGION27_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
757
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
759
CM_SHAPER_RAMA_EXP_REGION28_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
760
CM_SHAPER_RAMA_EXP_REGION28_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
761
CM_SHAPER_RAMA_EXP_REGION29_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
762
CM_SHAPER_RAMA_EXP_REGION29_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
764
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
766
CM_SHAPER_RAMA_EXP_REGION30_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
767
CM_SHAPER_RAMA_EXP_REGION30_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
768
CM_SHAPER_RAMA_EXP_REGION31_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
769
CM_SHAPER_RAMA_EXP_REGION31_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
771
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
773
CM_SHAPER_RAMA_EXP_REGION32_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
774
CM_SHAPER_RAMA_EXP_REGION32_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
775
CM_SHAPER_RAMA_EXP_REGION33_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
776
CM_SHAPER_RAMA_EXP_REGION33_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
784
const struct gamma_curve *curve;
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
809
curve = params->arr_curve_points;
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
811
CM_SHAPER_RAMB_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
812
CM_SHAPER_RAMB_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
813
CM_SHAPER_RAMB_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
814
CM_SHAPER_RAMB_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
816
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
818
CM_SHAPER_RAMB_EXP_REGION2_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
819
CM_SHAPER_RAMB_EXP_REGION2_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
820
CM_SHAPER_RAMB_EXP_REGION3_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
821
CM_SHAPER_RAMB_EXP_REGION3_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
823
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
825
CM_SHAPER_RAMB_EXP_REGION4_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
826
CM_SHAPER_RAMB_EXP_REGION4_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
827
CM_SHAPER_RAMB_EXP_REGION5_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
828
CM_SHAPER_RAMB_EXP_REGION5_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
830
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
832
CM_SHAPER_RAMB_EXP_REGION6_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
833
CM_SHAPER_RAMB_EXP_REGION6_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
834
CM_SHAPER_RAMB_EXP_REGION7_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
835
CM_SHAPER_RAMB_EXP_REGION7_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
837
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
839
CM_SHAPER_RAMB_EXP_REGION8_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
840
CM_SHAPER_RAMB_EXP_REGION8_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
841
CM_SHAPER_RAMB_EXP_REGION9_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
842
CM_SHAPER_RAMB_EXP_REGION9_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
844
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
846
CM_SHAPER_RAMB_EXP_REGION10_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
847
CM_SHAPER_RAMB_EXP_REGION10_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
848
CM_SHAPER_RAMB_EXP_REGION11_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
849
CM_SHAPER_RAMB_EXP_REGION11_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
851
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
853
CM_SHAPER_RAMB_EXP_REGION12_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
854
CM_SHAPER_RAMB_EXP_REGION12_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
855
CM_SHAPER_RAMB_EXP_REGION13_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
856
CM_SHAPER_RAMB_EXP_REGION13_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
858
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
860
CM_SHAPER_RAMB_EXP_REGION14_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
861
CM_SHAPER_RAMB_EXP_REGION14_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
862
CM_SHAPER_RAMB_EXP_REGION15_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
863
CM_SHAPER_RAMB_EXP_REGION15_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
865
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
867
CM_SHAPER_RAMB_EXP_REGION16_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
868
CM_SHAPER_RAMB_EXP_REGION16_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
869
CM_SHAPER_RAMB_EXP_REGION17_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
870
CM_SHAPER_RAMB_EXP_REGION17_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
872
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
874
CM_SHAPER_RAMB_EXP_REGION18_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
875
CM_SHAPER_RAMB_EXP_REGION18_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
876
CM_SHAPER_RAMB_EXP_REGION19_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
877
CM_SHAPER_RAMB_EXP_REGION19_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
879
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
881
CM_SHAPER_RAMB_EXP_REGION20_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
882
CM_SHAPER_RAMB_EXP_REGION20_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
883
CM_SHAPER_RAMB_EXP_REGION21_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
884
CM_SHAPER_RAMB_EXP_REGION21_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
886
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
888
CM_SHAPER_RAMB_EXP_REGION22_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
889
CM_SHAPER_RAMB_EXP_REGION22_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
890
CM_SHAPER_RAMB_EXP_REGION23_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
891
CM_SHAPER_RAMB_EXP_REGION23_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
893
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
895
CM_SHAPER_RAMB_EXP_REGION24_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
896
CM_SHAPER_RAMB_EXP_REGION24_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
897
CM_SHAPER_RAMB_EXP_REGION25_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
898
CM_SHAPER_RAMB_EXP_REGION25_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
900
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
902
CM_SHAPER_RAMB_EXP_REGION26_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
903
CM_SHAPER_RAMB_EXP_REGION26_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
904
CM_SHAPER_RAMB_EXP_REGION27_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
905
CM_SHAPER_RAMB_EXP_REGION27_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
907
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
909
CM_SHAPER_RAMB_EXP_REGION28_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
910
CM_SHAPER_RAMB_EXP_REGION28_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
911
CM_SHAPER_RAMB_EXP_REGION29_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
912
CM_SHAPER_RAMB_EXP_REGION29_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
914
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
916
CM_SHAPER_RAMB_EXP_REGION30_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
917
CM_SHAPER_RAMB_EXP_REGION30_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
918
CM_SHAPER_RAMB_EXP_REGION31_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
919
CM_SHAPER_RAMB_EXP_REGION31_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
921
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
923
CM_SHAPER_RAMB_EXP_REGION32_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
924
CM_SHAPER_RAMB_EXP_REGION32_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
925
CM_SHAPER_RAMB_EXP_REGION33_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c
926
CM_SHAPER_RAMB_EXP_REGION33_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1000
CM_SHAPER_RAMA_EXP_REGION22_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1001
CM_SHAPER_RAMA_EXP_REGION22_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1002
CM_SHAPER_RAMA_EXP_REGION23_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1003
CM_SHAPER_RAMA_EXP_REGION23_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1005
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1007
CM_SHAPER_RAMA_EXP_REGION24_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1008
CM_SHAPER_RAMA_EXP_REGION24_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1009
CM_SHAPER_RAMA_EXP_REGION25_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1010
CM_SHAPER_RAMA_EXP_REGION25_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1012
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1014
CM_SHAPER_RAMA_EXP_REGION26_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1015
CM_SHAPER_RAMA_EXP_REGION26_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1016
CM_SHAPER_RAMA_EXP_REGION27_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1017
CM_SHAPER_RAMA_EXP_REGION27_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1019
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1021
CM_SHAPER_RAMA_EXP_REGION28_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1022
CM_SHAPER_RAMA_EXP_REGION28_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1023
CM_SHAPER_RAMA_EXP_REGION29_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1024
CM_SHAPER_RAMA_EXP_REGION29_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1026
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1028
CM_SHAPER_RAMA_EXP_REGION30_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1029
CM_SHAPER_RAMA_EXP_REGION30_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1030
CM_SHAPER_RAMA_EXP_REGION31_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1031
CM_SHAPER_RAMA_EXP_REGION31_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1033
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1035
CM_SHAPER_RAMA_EXP_REGION32_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1036
CM_SHAPER_RAMA_EXP_REGION32_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1037
CM_SHAPER_RAMA_EXP_REGION33_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1038
CM_SHAPER_RAMA_EXP_REGION33_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1046
const struct gamma_curve *curve;
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1071
curve = params->arr_curve_points;
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1073
CM_SHAPER_RAMB_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1074
CM_SHAPER_RAMB_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1075
CM_SHAPER_RAMB_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1076
CM_SHAPER_RAMB_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1078
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1080
CM_SHAPER_RAMB_EXP_REGION2_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1081
CM_SHAPER_RAMB_EXP_REGION2_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1082
CM_SHAPER_RAMB_EXP_REGION3_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1083
CM_SHAPER_RAMB_EXP_REGION3_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1085
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1087
CM_SHAPER_RAMB_EXP_REGION4_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1088
CM_SHAPER_RAMB_EXP_REGION4_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1089
CM_SHAPER_RAMB_EXP_REGION5_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1090
CM_SHAPER_RAMB_EXP_REGION5_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1092
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1094
CM_SHAPER_RAMB_EXP_REGION6_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1095
CM_SHAPER_RAMB_EXP_REGION6_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1096
CM_SHAPER_RAMB_EXP_REGION7_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1097
CM_SHAPER_RAMB_EXP_REGION7_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1099
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1101
CM_SHAPER_RAMB_EXP_REGION8_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1102
CM_SHAPER_RAMB_EXP_REGION8_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1103
CM_SHAPER_RAMB_EXP_REGION9_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1104
CM_SHAPER_RAMB_EXP_REGION9_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1106
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1108
CM_SHAPER_RAMB_EXP_REGION10_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1109
CM_SHAPER_RAMB_EXP_REGION10_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1110
CM_SHAPER_RAMB_EXP_REGION11_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1111
CM_SHAPER_RAMB_EXP_REGION11_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1113
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1115
CM_SHAPER_RAMB_EXP_REGION12_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1116
CM_SHAPER_RAMB_EXP_REGION12_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1117
CM_SHAPER_RAMB_EXP_REGION13_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1118
CM_SHAPER_RAMB_EXP_REGION13_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1120
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1122
CM_SHAPER_RAMB_EXP_REGION14_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1123
CM_SHAPER_RAMB_EXP_REGION14_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1124
CM_SHAPER_RAMB_EXP_REGION15_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1125
CM_SHAPER_RAMB_EXP_REGION15_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1127
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1129
CM_SHAPER_RAMB_EXP_REGION16_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1130
CM_SHAPER_RAMB_EXP_REGION16_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1131
CM_SHAPER_RAMB_EXP_REGION17_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1132
CM_SHAPER_RAMB_EXP_REGION17_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1134
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1136
CM_SHAPER_RAMB_EXP_REGION18_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1137
CM_SHAPER_RAMB_EXP_REGION18_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1138
CM_SHAPER_RAMB_EXP_REGION19_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1139
CM_SHAPER_RAMB_EXP_REGION19_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1141
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1143
CM_SHAPER_RAMB_EXP_REGION20_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1144
CM_SHAPER_RAMB_EXP_REGION20_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1145
CM_SHAPER_RAMB_EXP_REGION21_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1146
CM_SHAPER_RAMB_EXP_REGION21_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1148
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1150
CM_SHAPER_RAMB_EXP_REGION22_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1151
CM_SHAPER_RAMB_EXP_REGION22_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1152
CM_SHAPER_RAMB_EXP_REGION23_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1153
CM_SHAPER_RAMB_EXP_REGION23_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1155
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1157
CM_SHAPER_RAMB_EXP_REGION24_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1158
CM_SHAPER_RAMB_EXP_REGION24_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1159
CM_SHAPER_RAMB_EXP_REGION25_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1160
CM_SHAPER_RAMB_EXP_REGION25_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1162
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1164
CM_SHAPER_RAMB_EXP_REGION26_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1165
CM_SHAPER_RAMB_EXP_REGION26_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1166
CM_SHAPER_RAMB_EXP_REGION27_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1167
CM_SHAPER_RAMB_EXP_REGION27_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1169
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1171
CM_SHAPER_RAMB_EXP_REGION28_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1172
CM_SHAPER_RAMB_EXP_REGION28_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1173
CM_SHAPER_RAMB_EXP_REGION29_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1174
CM_SHAPER_RAMB_EXP_REGION29_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1176
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1178
CM_SHAPER_RAMB_EXP_REGION30_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1179
CM_SHAPER_RAMB_EXP_REGION30_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1180
CM_SHAPER_RAMB_EXP_REGION31_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1181
CM_SHAPER_RAMB_EXP_REGION31_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1183
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1185
CM_SHAPER_RAMB_EXP_REGION32_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1186
CM_SHAPER_RAMB_EXP_REGION32_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1187
CM_SHAPER_RAMB_EXP_REGION33_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
1188
CM_SHAPER_RAMB_EXP_REGION33_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
896
const struct gamma_curve *curve;
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
921
curve = params->arr_curve_points;
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
923
CM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
924
CM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
925
CM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
926
CM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
928
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
930
CM_SHAPER_RAMA_EXP_REGION2_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
931
CM_SHAPER_RAMA_EXP_REGION2_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
932
CM_SHAPER_RAMA_EXP_REGION3_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
933
CM_SHAPER_RAMA_EXP_REGION3_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
935
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
937
CM_SHAPER_RAMA_EXP_REGION4_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
938
CM_SHAPER_RAMA_EXP_REGION4_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
939
CM_SHAPER_RAMA_EXP_REGION5_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
940
CM_SHAPER_RAMA_EXP_REGION5_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
942
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
944
CM_SHAPER_RAMA_EXP_REGION6_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
945
CM_SHAPER_RAMA_EXP_REGION6_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
946
CM_SHAPER_RAMA_EXP_REGION7_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
947
CM_SHAPER_RAMA_EXP_REGION7_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
949
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
951
CM_SHAPER_RAMA_EXP_REGION8_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
952
CM_SHAPER_RAMA_EXP_REGION8_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
953
CM_SHAPER_RAMA_EXP_REGION9_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
954
CM_SHAPER_RAMA_EXP_REGION9_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
956
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
958
CM_SHAPER_RAMA_EXP_REGION10_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
959
CM_SHAPER_RAMA_EXP_REGION10_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
960
CM_SHAPER_RAMA_EXP_REGION11_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
961
CM_SHAPER_RAMA_EXP_REGION11_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
963
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
965
CM_SHAPER_RAMA_EXP_REGION12_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
966
CM_SHAPER_RAMA_EXP_REGION12_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
967
CM_SHAPER_RAMA_EXP_REGION13_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
968
CM_SHAPER_RAMA_EXP_REGION13_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
970
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
972
CM_SHAPER_RAMA_EXP_REGION14_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
973
CM_SHAPER_RAMA_EXP_REGION14_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
974
CM_SHAPER_RAMA_EXP_REGION15_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
975
CM_SHAPER_RAMA_EXP_REGION15_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
977
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
979
CM_SHAPER_RAMA_EXP_REGION16_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
980
CM_SHAPER_RAMA_EXP_REGION16_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
981
CM_SHAPER_RAMA_EXP_REGION17_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
982
CM_SHAPER_RAMA_EXP_REGION17_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
984
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
986
CM_SHAPER_RAMA_EXP_REGION18_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
987
CM_SHAPER_RAMA_EXP_REGION18_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
988
CM_SHAPER_RAMA_EXP_REGION19_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
989
CM_SHAPER_RAMA_EXP_REGION19_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
991
curve += 2;
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
993
CM_SHAPER_RAMA_EXP_REGION20_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
994
CM_SHAPER_RAMA_EXP_REGION20_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
995
CM_SHAPER_RAMA_EXP_REGION21_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
996
CM_SHAPER_RAMA_EXP_REGION21_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
998
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
492
const struct gamma_curve *curve;
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
515
curve = params->arr_curve_points;
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
517
MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
518
MPC_RMU_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
519
MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
520
MPC_RMU_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
522
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
524
MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
525
MPC_RMU_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
526
MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
527
MPC_RMU_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
529
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
531
MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
532
MPC_RMU_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
533
MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
534
MPC_RMU_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
536
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
538
MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
539
MPC_RMU_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
540
MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
541
MPC_RMU_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
543
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
545
MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
546
MPC_RMU_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
547
MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
548
MPC_RMU_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
550
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
552
MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
553
MPC_RMU_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
554
MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
555
MPC_RMU_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
557
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
559
MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
560
MPC_RMU_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
561
MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
562
MPC_RMU_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
564
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
566
MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
567
MPC_RMU_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
568
MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
569
MPC_RMU_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
572
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
574
MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
575
MPC_RMU_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
576
MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
577
MPC_RMU_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
579
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
581
MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
582
MPC_RMU_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
583
MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
584
MPC_RMU_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
586
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
588
MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
589
MPC_RMU_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
590
MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
591
MPC_RMU_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
593
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
595
MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
596
MPC_RMU_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
597
MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
598
MPC_RMU_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
600
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
602
MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
603
MPC_RMU_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
604
MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
605
MPC_RMU_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
607
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
609
MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
610
MPC_RMU_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
611
MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
612
MPC_RMU_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
614
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
616
MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
617
MPC_RMU_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
618
MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
619
MPC_RMU_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
621
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
623
MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
624
MPC_RMU_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
625
MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
626
MPC_RMU_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
628
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
630
MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
631
MPC_RMU_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
632
MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
633
MPC_RMU_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
641
const struct gamma_curve *curve;
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
664
curve = params->arr_curve_points;
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
666
MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
667
MPC_RMU_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
668
MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
669
MPC_RMU_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
671
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
673
MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
674
MPC_RMU_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
675
MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
676
MPC_RMU_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
679
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
681
MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
682
MPC_RMU_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
683
MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
684
MPC_RMU_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
686
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
688
MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
689
MPC_RMU_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
690
MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
691
MPC_RMU_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
693
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
695
MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
696
MPC_RMU_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
697
MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
698
MPC_RMU_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
700
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
702
MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
703
MPC_RMU_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
704
MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
705
MPC_RMU_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
707
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
709
MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
710
MPC_RMU_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
711
MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
712
MPC_RMU_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
714
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
716
MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
717
MPC_RMU_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
718
MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
719
MPC_RMU_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
722
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
724
MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
725
MPC_RMU_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
726
MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
727
MPC_RMU_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
729
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
731
MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
732
MPC_RMU_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
733
MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
734
MPC_RMU_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
736
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
738
MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
739
MPC_RMU_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
740
MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
741
MPC_RMU_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
743
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
745
MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
746
MPC_RMU_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
747
MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
748
MPC_RMU_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
750
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
752
MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
753
MPC_RMU_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
754
MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
755
MPC_RMU_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
757
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
759
MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
760
MPC_RMU_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
761
MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
762
MPC_RMU_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
764
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
766
MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
767
MPC_RMU_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
768
MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
769
MPC_RMU_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
771
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
773
MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
774
MPC_RMU_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
775
MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
776
MPC_RMU_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
778
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
780
MPC_RMU_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
781
MPC_RMU_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
782
MPC_RMU_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
783
MPC_RMU_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
348
const struct gamma_curve *curve;
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
371
curve = params->arr_curve_points;
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
372
if (curve) {
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
374
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
375
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
376
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
377
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
379
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
381
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
382
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
383
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
384
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
386
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
388
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
389
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
390
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
391
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
393
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
395
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
396
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
397
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
398
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
400
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
402
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
403
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
404
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
405
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
407
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
409
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
410
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
411
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
412
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
414
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
416
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
417
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
418
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
419
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
421
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
423
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
424
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
425
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
426
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
429
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
431
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
432
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
433
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
434
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
436
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
438
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
439
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
440
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
441
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
443
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
445
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
446
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
447
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
448
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
450
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
452
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
453
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
454
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
455
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
457
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
459
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
460
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
461
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
462
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
464
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
466
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
467
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
468
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
469
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
471
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
473
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
474
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
475
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
476
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
478
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
480
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
481
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
482
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
483
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
485
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
487
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
488
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
489
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
490
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
500
const struct gamma_curve *curve;
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
523
curve = params->arr_curve_points;
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
524
if (curve) {
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
526
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
527
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
528
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
529
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
531
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
533
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
534
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
535
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
536
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
539
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
541
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
542
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
543
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
544
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
546
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
548
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
549
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
550
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
551
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
553
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
555
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
556
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
557
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
558
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
560
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
562
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
563
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
564
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
565
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
567
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
569
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
570
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
571
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
572
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
574
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
576
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
577
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
578
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
579
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
582
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
584
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
585
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
586
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
587
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
589
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
591
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
592
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
593
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
594
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
596
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
598
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
599
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
600
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
601
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
603
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
605
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
606
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
607
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
608
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
610
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
612
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
613
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
614
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
615
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
617
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
619
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
620
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
621
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
622
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
624
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
626
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
627
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
628
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
629
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
631
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
633
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
634
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
635
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
636
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
638
curve += 2;
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
640
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
641
MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
642
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,
sys/dev/pci/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
643
MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);
sys/dev/pci/drm/amd/display/modules/color/color_gamma.c
1180
static bool build_degamma(struct pwl_float_data_ex *curve,
sys/dev/pci/drm/amd/display/modules/color/color_gamma.c
1201
curve[i].r = dc_fixpt_zero;
sys/dev/pci/drm/amd/display/modules/color/color_gamma.c
1202
curve[i].g = dc_fixpt_zero;
sys/dev/pci/drm/amd/display/modules/color/color_gamma.c
1203
curve[i].b = dc_fixpt_zero;
sys/dev/pci/drm/amd/display/modules/color/color_gamma.c
1208
curve[i].r = translate_to_linear_space_ex(
sys/dev/pci/drm/amd/display/modules/color/color_gamma.c
1210
curve[i].g = curve[i].r;
sys/dev/pci/drm/amd/display/modules/color/color_gamma.c
1211
curve[i].b = curve[i].r;
sys/dev/pci/drm/amd/display/modules/color/color_gamma.c
1215
curve[i].r = dc_fixpt_one;
sys/dev/pci/drm/amd/display/modules/color/color_gamma.c
1216
curve[i].g = dc_fixpt_one;
sys/dev/pci/drm/amd/display/modules/color/color_gamma.c
1217
curve[i].b = dc_fixpt_one;
sys/dev/pci/drm/amd/display/modules/color/color_gamma.c
1677
struct pwl_float_data_ex *curve = NULL;
sys/dev/pci/drm/amd/display/modules/color/color_gamma.c
1740
curve = kvcalloc(MAX_HW_POINTS + _EXTRA_POINTS, sizeof(*curve),
sys/dev/pci/drm/amd/display/modules/color/color_gamma.c
1742
if (!curve)
sys/dev/pci/drm/amd/display/modules/color/color_gamma.c
1753
build_de_pq(curve,
sys/dev/pci/drm/amd/display/modules/color/color_gamma.c
1761
build_degamma(curve,
sys/dev/pci/drm/amd/display/modules/color/color_gamma.c
1766
build_hlg_degamma(curve,
sys/dev/pci/drm/amd/display/modules/color/color_gamma.c
1774
curve[i].r = coordinates_x[i].x;
sys/dev/pci/drm/amd/display/modules/color/color_gamma.c
1775
curve[i].g = curve[i].r;
sys/dev/pci/drm/amd/display/modules/color/color_gamma.c
1776
curve[i].b = curve[i].r;
sys/dev/pci/drm/amd/display/modules/color/color_gamma.c
1789
struct pwl_float_data_ex *curvePt = curve;
sys/dev/pci/drm/amd/display/modules/color/color_gamma.c
1802
coordinates_x, axis_x, curve,
sys/dev/pci/drm/amd/display/modules/color/color_gamma.c
1818
kvfree(curve);
usr.bin/ssh/ssh-ecdsa.c
224
char *curve = NULL;
usr.bin/ssh/ssh-ecdsa.c
230
if ((r = sshbuf_get_cstring(b, &curve, NULL)) != 0)
usr.bin/ssh/ssh-ecdsa.c
232
if (key->ecdsa_nid != sshkey_curve_name_to_nid(curve)) {
usr.bin/ssh/ssh-ecdsa.c
268
free(curve);
