clamp
*ref_div = clamp(DIV_ROUND_CLOSEST(den, post_div), 1u, ref_div_max);
clamp(phys_ram_gb * 3, min_vm_size, max_size));
pages = clamp(pages, 1ULL << 9, 1ULL << 18);
vlevel = clamp(vlevel_req, 2, vlevel_max);
vlevel = clamp(vlevel_req, 1, vlevel_max);
dp_aux_i2c_transfer_size = clamp(dp_aux_i2c_transfer_size, 1, DP_AUX_MAX_PAYLOAD_BYTES);
f = clamp(DIV_ROUND_CLOSEST(fxp, 1 << pn), 1, 255);
if (score < clamp(edid_fixup, 0, 8)) {
val = clamp(val, panel->backlight.pwm_level_min, panel->backlight.pwm_level_max);
source_val = clamp(source_val, source_min, source_max);
hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max);
c = clamp(c, -(s64)BIT(int_bits + frac_bits - 1),
mantissa = clamp(b - a, 0, 0x7f);
return clamp(intel_dp->link.force_lane_count, 1, intel_dp_max_common_lane_count(intel_dp));
*ana_cp_int = clamp(ana_cp_int_temp, 1, 127);
*ana_cp_prop = clamp(*ana_cp_prop, 1, 127);
vdsc_cfg->first_line_bpg_offset = clamp(first_line_bpg_offset, 0,
u64 clamp = intel_clamp_##field(engine, engine->props.field); \
if (clamp != engine->props.field) { \
#field, clamp); \
engine->props.field = clamp; \
new_freq = clamp(new_freq,
intel_rps_set(rps, clamp(rps->cur_freq,
clamp(rps->cur_freq,
ref_div_max = clamp(100 / post_div, 1u, ref_div_max);
*ref_div = clamp(den / post_div, 1u, ref_div_max);