clear_bit
clear_bit(ATH11K_FLAG_HW_CRYPTO_DISABLED, sc->sc_flags);
clear_bit(ATH11K_FLAG_RAW_MODE, sc->sc_flags);
clear_bit(ATH11K_FLAG_QMI_FAIL, sc->sc_flags);
clear_bit(ATH11K_FLAG_CRASH_FLUSH, sc->sc_flags);
clear_bit(ATH11K_FLAG_RECOVERY, sc->sc_flags);
clear_bit(ATH11K_CAC_RUNNING, sc->sc_flags);
clear_bit(ATH11K_FLAG_CRASH_FLUSH, sc->sc_flags);
clear_bit(ATH12K_FLAG_HW_CRYPTO_DISABLED, sc->sc_flags);
clear_bit(ATH12K_FLAG_RAW_MODE, sc->sc_flags);
clear_bit(ATH12K_FLAG_QMI_FAIL, sc->sc_flags);
clear_bit(ATH12K_FLAG_CRASH_FLUSH, sc->sc_flags);
clear_bit(ATH12K_FLAG_RECOVERY, sc->sc_flags);
clear_bit(ATH12K_CAC_RUNNING, sc->sc_flags);
clear_bit(ATH12K_FLAG_CRASH_FLUSH, sc->sc_flags);
clear_bit(AMDGPU_NEED_FULL_RESET, &reset_context.flags);
clear_bit(i, gpu_resources.cp_queue_bitmap);
clear_bit(AMDGPU_HOST_FLR, &reset_context->flags);
clear_bit(AMDGPU_NEED_FULL_RESET,
clear_bit(AMDGPU_NEED_FULL_RESET, &reset_context->flags);
clear_bit(AMDGPU_NEED_FULL_RESET, &reset_context.flags);
clear_bit(AMDGPU_NEED_FULL_RESET, &reset_context.flags);
clear_bit(AMDGPU_RAS_BLOCK__LAST, &ras->ras_err_state);
clear_bit(AMDGPU_NEED_FULL_RESET, &reset_context.flags);
clear_bit(AMDGPU_NEED_FULL_RESET, &reset_context.flags);
clear_bit(AMDGPU_NEED_FULL_RESET, &reset_context.flags);
clear_bit(*restore_sdma_id, dqm->sdma_bitmap);
clear_bit(bit, dqm->sdma_bitmap);
clear_bit(*restore_sdma_id, dqm->xgmi_sdma_bitmap);
clear_bit(bit, dqm->xgmi_sdma_bitmap);
clear_bit(i, is_xgmi ? dqm->xgmi_sdma_bitmap : dqm->sdma_bitmap);
clear_bit(*qid, pqm->queue_slot_bitmap);
clear_bit(qid, pqm->queue_slot_bitmap);
clear_bit(bit, word);
clear_bit(TASKLET_STATE_SCHED, &ts->state);
clear_bit(domain, power_domains->async_put_domains[0].bits);
clear_bit(domain, power_domains->async_put_domains[1].bits);
clear_bit(domain, power_domain_set->mask.bits);
bool clear_bit);
clear_bit(CONTEXT_USER_ENGINES, &ctx->flags);
clear_bit(UCONTEXT_NO_ERROR_CAPTURE, &ctx->user_flags);
clear_bit(UCONTEXT_BANNABLE, &ctx->user_flags);
clear_bit(UCONTEXT_RECOVERABLE, &ctx->user_flags);
clear_bit(UCONTEXT_PERSISTENCE, &ctx->user_flags);
clear_bit(I915_TILING_QUIRK_BIT, &obj->flags);
clear_bit(I915_VMA_CAN_FENCE_BIT, __i915_vma_flags(ppgtt->vma));
clear_bit(CONTEXT_USE_SEMAPHORES, &ce->flags);
clear_bit(CONTEXT_NOPREEMPT, &ce->flags);
clear_bit(CONTEXT_IS_PARKING, &ce->flags);
clear_bit(I915_FENCE_FLAG_PQUEUE, &rq->fence.flags);
clear_bit(I915_FENCE_FLAG_PQUEUE, &rq->fence.flags);
clear_bit(I915_FENCE_FLAG_HOLD, &rq->fence.flags);
clear_bit(tag - 1, &engine->context_tag);
clear_bit(I915_FENCE_FLAG_PQUEUE, &rq->fence.flags);
clear_bit(I915_WEDGED, >->reset.flags);
clear_bit(CONTEXT_VALID_BIT, &ce->flags);
clear_bit(INTEL_RPS_INTERRUPTS, &rps->flags);
clear_bit(INTEL_RPS_TIMER, &rps->flags);
clear_bit(INTEL_RPS_ENABLED, &rps->flags);
clear_bit(CONTEXT_BANNED, &rq->context->flags);
clear_bit(CONTEXT_BANNED, &rq[0]->context->flags);
clear_bit(CONTEXT_BANNED, &rq[1]->context->flags);
clear_bit(CONTEXT_BANNED, &rq[0]->context->flags);
clear_bit(CONTEXT_BANNED, &rq[1]->context->flags);
clear_bit(CONTEXT_BANNED, &rq->context->flags);
clear_bit(CONTEXT_BANNED, &rq->context->flags);
clear_bit(I915_FENCE_FLAG_PQUEUE, &rq->fence.flags);
clear_bit(CONTEXT_LRCA_DIRTY, &ce->flags);
clear_bit(event, irq->flip_done_event[pipe]);
clear_bit(index, spt->post_shadow_bitmap);
clear_bit(INTEL_VGPU_STATUS_ATTACHED, vgpu->status);
clear_bit(INTEL_GVT_REQUEST_EVENT_SCHED, (void *)&gvt->service_request);
clear_bit(engine->id, s->shadow_ctx_desc_updated);
clear_bit(INTEL_VGPU_STATUS_ACTIVE, vgpu->status);
clear_bit(INTEL_VGPU_STATUS_ACTIVE, vgpu->status);
clear_bit(I915_FENCE_FLAG_PQUEUE, &request->fence.flags);
clear_bit(I915_FENCE_FLAG_HOLD, &rq->fence.flags);
clear_bit(I915_VMA_CAN_FENCE_BIT, __i915_vma_flags(vma));
clear_bit(I915_VMA_CAN_FENCE_BIT, __i915_vma_flags(vma));
return clear_bit(I915_VMA_USERFAULT_BIT, __i915_vma_flags(vma));
clear_bit(I915_VMA_SCANOUT_BIT, __i915_vma_flags(vma));
clear_bit(I915_RESET_BACKOFF, >->reset.flags);
clear_bit(b, p);
clear_bit(TASKLET_STATE_RUN, &ts->state);
clear_bit(TASKLET_STATE_SCHED, &ts->state);
clear_bit(ATH11K_FLAG_EXT_IRQ_ENABLED, sc->sc_flags);
clear_bit(ATH11K_FLAG_CE_IRQ_ENABLED, sc->sc_flags);
clear_bit(ATH11K_FLAG_DEVICE_INIT_DONE, sc->sc_flags);
clear_bit(ATH11K_FLAG_DEVICE_INIT_DONE, sc->sc_flags);
clear_bit(ATH11K_FLAG_MULTI_MSI_VECTORS, sc->sc_flags);
clear_bit(ATH12K_FLAG_EXT_IRQ_ENABLED, sc->sc_flags);
clear_bit(ATH12K_FLAG_CE_IRQ_ENABLED, sc->sc_flags);
clear_bit(ATH12K_FLAG_DEVICE_INIT_DONE, sc->sc_flags);
clear_bit(ATH12K_FLAG_DEVICE_INIT_DONE, sc->sc_flags);
clear_bit(ATH12K_FLAG_MULTI_MSI_VECTORS, sc->sc_flags);
clear_bit(0, &evt->evt_flags[0]);
clear_bit(xi->xi_port, &sc->sc_ipg->evtchn_pending[0]);
clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
void clear_bit(uint8_t bits[], size_t index);