sys/dev/pci/drm/amd/acp/acp_hw.c

43

acp_mode = cgs_read_register(cgs_device,

sys/dev/pci/drm/amd/amdgpu/amdgpu_acp.c

447

val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET);

sys/dev/pci/drm/amd/amdgpu/amdgpu_acp.c

454

val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET);

sys/dev/pci/drm/amd/amdgpu/amdgpu_acp.c

466

val = cgs_read_register(adev->acp.cgs_device, mmACP_CONTROL);

sys/dev/pci/drm/amd/amdgpu/amdgpu_acp.c

473

val = cgs_read_register(adev->acp.cgs_device, mmACP_STATUS);

sys/dev/pci/drm/amd/amdgpu/amdgpu_acp.c

484

val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET);

sys/dev/pci/drm/amd/amdgpu/amdgpu_acp.c

516

val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET);

sys/dev/pci/drm/amd/amdgpu/amdgpu_acp.c

523

val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET);

sys/dev/pci/drm/amd/amdgpu/amdgpu_acp.c

534

val = cgs_read_register(adev->acp.cgs_device, mmACP_CONTROL);

sys/dev/pci/drm/amd/amdgpu/amdgpu_acp.c

541

val = cgs_read_register(adev->acp.cgs_device, mmACP_STATUS);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

13196

value = cgs_read_register(ctx->cgs_device, address);

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm.c

1800

cgs_read_register(adev->dm.cgs_device, 0x34c0 + 0x01f8);

sys/dev/pci/drm/amd/include/cgs_common.h

131

cgs_write_register(device, mm##reg, (cgs_read_register(device, mm##reg) & ~CGS_REG_FIELD_MASK(reg, field)) | (val) << CGS_REG_FIELD_SHIFT(reg, field))

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

1288

(cgs_read_register(hwmgr->device, 0x1488) & ~0x1));

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

207

hwmgr->microcode_version_info.MC = cgs_read_register(hwmgr->device, mmMC_SEQ_IO_DEBUG_DATA);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

4876

tmp = cgs_read_register(hwmgr->device, mmMC_SEQ_IO_DEBUG_DATA);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

4914

cgs_read_register(hwmgr->device, mmDLL_CNTL);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

4916

cgs_read_register(hwmgr->device, mmMCLK_PWRMGT_CNTL);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

4918

cgs_read_register(hwmgr->device, mmMPLL_AD_FUNC_CNTL);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

4920

cgs_read_register(hwmgr->device, mmMPLL_DQ_FUNC_CNTL);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

4922

cgs_read_register(hwmgr->device, mmMPLL_FUNC_CNTL);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

4924

cgs_read_register(hwmgr->device, mmMPLL_FUNC_CNTL_1);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

4926

cgs_read_register(hwmgr->device, mmMPLL_FUNC_CNTL_2);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

4928

cgs_read_register(hwmgr->device, mmMPLL_SS1);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

4930

cgs_read_register(hwmgr->device, mmMPLL_SS2);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

523

mc_arb_dram_timing = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

524

mc_arb_dram_timing2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

528

mc_arb_dram_timing = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING_1);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

529

mc_arb_dram_timing2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2_1);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

551

mc_cg_config = cgs_read_register(hwmgr->device, mmMC_CG_CONFIG);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_powertune.c

924

data = cgs_read_register(hwmgr->device, config_regs->offset);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_powertune.c

976

value2 = cgs_read_register(hwmgr->device, mmGRBM_GFX_INDEX);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu_helper.c

122

cur_value = cgs_read_register(hwmgr->device, index);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu_helper.c

166

cur_value = cgs_read_register(hwmgr->device,

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu_helper.h

152

PHM_GET_FIELD(cgs_read_register(device, mm##reg), reg, field)

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu_helper.h

164

cgs_read_register(device, mm##reg), reg, field, fieldval))

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/vega10_powertune.c

790

data = cgs_read_register(hwmgr->device, config_regs->offset);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

1261

((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC7) >> 16) & 0xf))

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

1262

dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC5) >> 1) & 0x1) ? 1 : 0;

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

1264

dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC6) >> 1) & 0x1) ? 1 : 0;

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

1270

dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC5) >> 1) & 0x1) ? 1 : 0;

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

151

original_data = cgs_read_register(hwmgr->device, mmSMC_IND_DATA_0);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

1647

dramTiming = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

1648

dramTiming2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

204

*value = cgs_read_register(hwmgr->device, mmSMC_IND_DATA_0);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2453

return (uint8_t) (0xFF & (cgs_read_register(hwmgr->device, mmBIOS_SCRATCH_4) >> 16));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2605

temp_reg = cgs_read_register(hwmgr->device, mmMC_PMG_CMD_EMRS);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2617

temp_reg = cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2645

temp_reg = cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS1);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2698

cgs_write_register(hwmgr->device, mmMC_SEQ_RAS_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_RAS_TIMING));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2699

cgs_write_register(hwmgr->device, mmMC_SEQ_CAS_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_CAS_TIMING));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2700

cgs_write_register(hwmgr->device, mmMC_SEQ_DLL_STBY_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_DLL_STBY));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2701

cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD0_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD0));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2702

cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD1_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD1));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2703

cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CTRL_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_G5PDX_CTRL));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2704

cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CMD_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CMD));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2705

cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CTL_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CTL));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2706

cgs_write_register(hwmgr->device, mmMC_SEQ_MISC_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_MISC_TIMING));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2707

cgs_write_register(hwmgr->device, mmMC_SEQ_MISC_TIMING2_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_MISC_TIMING2));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2708

cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_CMD_EMRS_LP, cgs_read_register(hwmgr->device, mmMC_PMG_CMD_EMRS));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2709

cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_CMD_MRS_LP, cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2710

cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_CMD_MRS1_LP, cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS1));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2711

cgs_write_register(hwmgr->device, mmMC_SEQ_WR_CTL_D0_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_D0));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2712

cgs_write_register(hwmgr->device, mmMC_SEQ_WR_CTL_D1_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_D1));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2713

cgs_write_register(hwmgr->device, mmMC_SEQ_RD_CTL_D0_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_RD_CTL_D0));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2714

cgs_write_register(hwmgr->device, mmMC_SEQ_RD_CTL_D1_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_RD_CTL_D1));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2715

cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_PMG_TIMING));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2716

cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_CMD_MRS2_LP, cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS2));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

2717

cgs_write_register(hwmgr->device, mmMC_SEQ_WR_CTL_2_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_2));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1508

dram_timing = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1509

dram_timing2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

1510

burstTime = cgs_read_register(hwmgr->device, mmMC_ARB_BURST_TIME);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2072

table->ThermOutPolarity = (0 == (cgs_read_register(hwmgr->device, mmGPIOPAD_A) &

sys/dev/pci/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2524

cgs_read_register(hwmgr->device, mmMC_SEQ_RAS_TIMING));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2526

cgs_read_register(hwmgr->device, mmMC_SEQ_CAS_TIMING));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2528

cgs_read_register(hwmgr->device, mmMC_SEQ_MISC_TIMING2));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2530

cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_D1));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2532

cgs_read_register(hwmgr->device, mmMC_SEQ_RD_CTL_D0));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2534

cgs_read_register(hwmgr->device, mmMC_SEQ_RD_CTL_D1));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c

2536

cgs_read_register(hwmgr->device, mmMC_SEQ_PMG_TIMING));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

1308

((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC7) >> 16) & 0xf))

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

1309

dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC5) >> 1) & 0x1) ? 1 : 0;

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

1311

dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC6) >> 1) & 0x1) ? 1 : 0;

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

1317

dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC5) >> 1) & 0x1) ? 1 : 0;

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

1600

dramTiming = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

1601

dramTiming2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

2372

return (uint8_t) (0xFF & (cgs_read_register(hwmgr->device, mmBIOS_SCRATCH_4) >> 16));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

2524

temp_reg = cgs_read_register(hwmgr->device, mmMC_PMG_CMD_EMRS);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

2536

temp_reg = cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

2565

temp_reg = cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS1);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

2617

cgs_write_register(hwmgr->device, mmMC_SEQ_RAS_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_RAS_TIMING));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

2618

cgs_write_register(hwmgr->device, mmMC_SEQ_CAS_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_CAS_TIMING));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

2619

cgs_write_register(hwmgr->device, mmMC_SEQ_DLL_STBY_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_DLL_STBY));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

2620

cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD0_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD0));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

2621

cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD1_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD1));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

2622

cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CTRL_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_G5PDX_CTRL));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

2623

cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CMD_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CMD));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

2624

cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CTL_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CTL));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

2625

cgs_write_register(hwmgr->device, mmMC_SEQ_MISC_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_MISC_TIMING));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

2626

cgs_write_register(hwmgr->device, mmMC_SEQ_MISC_TIMING2_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_MISC_TIMING2));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

2627

cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_CMD_EMRS_LP, cgs_read_register(hwmgr->device, mmMC_PMG_CMD_EMRS));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

2628

cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_CMD_MRS_LP, cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

2629

cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_CMD_MRS1_LP, cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS1));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

2630

cgs_write_register(hwmgr->device, mmMC_SEQ_WR_CTL_D0_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_D0));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

2631

cgs_write_register(hwmgr->device, mmMC_SEQ_WR_CTL_D1_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_D1));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

2632

cgs_write_register(hwmgr->device, mmMC_SEQ_RD_CTL_D0_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_RD_CTL_D0));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

2633

cgs_write_register(hwmgr->device, mmMC_SEQ_RD_CTL_D1_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_RD_CTL_D1));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

2634

cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_PMG_TIMING));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

2635

cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_CMD_MRS2_LP, cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS2));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/iceland_smumgr.c

2636

cgs_write_register(hwmgr->device, mmMC_SEQ_WR_CTL_2_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_2));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1478

dram_timing = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

1479

dram_timing2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

2078

table->ThermOutPolarity = (0 == (cgs_read_register(hwmgr->device, mmGPIOPAD_A)

sys/dev/pci/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c

2565

return (uint8_t) (0xFF & (cgs_read_register(hwmgr->device, mmBIOS_SCRATCH_4) >> 16));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/smu7_smumgr.c

172

return cgs_read_register(hwmgr->device, mmSMC_MSG_ARG_0);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/smu7_smumgr.c

235

*value = result ? 0 : cgs_read_register(hwmgr->device, mmSMC_IND_DATA_11);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/smu7_smumgr.c

89

original_data = cgs_read_register(hwmgr->device, mmSMC_IND_DATA_11);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/smu8_smumgr.c

161

(cgs_read_register(hwmgr->device, mmMP0PUB_IND_DATA) & firmware))

sys/dev/pci/drm/amd/pm/powerplay/smumgr/smu8_smumgr.c

191

tmp = cgs_read_register(hwmgr->device,

sys/dev/pci/drm/amd/pm/powerplay/smumgr/smu8_smumgr.c

197

tmp = cgs_read_register(hwmgr->device,

sys/dev/pci/drm/amd/pm/powerplay/smumgr/smu8_smumgr.c

61

return cgs_read_register(hwmgr->device,

sys/dev/pci/drm/amd/pm/powerplay/smumgr/smu8_smumgr.c

746

hwmgr->smu_version = cgs_read_register(hwmgr->device, mmMP0PUB_IND_DATA);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/smu8_smumgr.c

80

uint32_t val = cgs_read_register(hwmgr->device,

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

1048

((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC7) >> 16) & 0xf)) {

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

1049

dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC5) >> 1) & 0x1) ? 1 : 0;

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

1051

dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC6) >> 1) & 0x1) ? 1 : 0;

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

1060

dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC5) >> 1) & 0x1) ? 1 : 0;

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

1475

dramTiming = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

1476

dramTiming2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

2401

(0 == (cgs_read_register(hwmgr->device, mmGPIOPAD_A) &

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

2834

return (uint8_t) (0xFF & (cgs_read_register(hwmgr->device, mmBIOS_SCRATCH_4) >> 16));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

2988

temp_reg = cgs_read_register(hwmgr->device,

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3001

temp_reg = cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3028

temp_reg = cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS1);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3082

cgs_read_register(hwmgr->device, mmMC_SEQ_RAS_TIMING));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3084

cgs_read_register(hwmgr->device, mmMC_SEQ_CAS_TIMING));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3086

cgs_read_register(hwmgr->device, mmMC_SEQ_DLL_STBY));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3088

cgs_read_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD0));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3090

cgs_read_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD1));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3092

cgs_read_register(hwmgr->device, mmMC_SEQ_G5PDX_CTRL));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3094

cgs_read_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CMD));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3096

cgs_read_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CTL));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3098

cgs_read_register(hwmgr->device, mmMC_SEQ_MISC_TIMING));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3100

cgs_read_register(hwmgr->device, mmMC_SEQ_MISC_TIMING2));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3102

cgs_read_register(hwmgr->device, mmMC_PMG_CMD_EMRS));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3104

cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3106

cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS1));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3108

cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_D0));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3110

cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_D1));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3112

cgs_read_register(hwmgr->device, mmMC_SEQ_RD_CTL_D0));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3114

cgs_read_register(hwmgr->device, mmMC_SEQ_RD_CTL_D1));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3116

cgs_read_register(hwmgr->device, mmMC_SEQ_PMG_TIMING));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3118

cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS2));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3120

cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_2));

sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1262

dram_timing = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1263

dram_timing2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1264

burst_time = cgs_read_register(hwmgr->device, mmMC_ARB_BURST_TIME);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1265

rfsh_rate = cgs_read_register(hwmgr->device, mmMC_ARB_RFSH_RATE);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

1266

misc3 = cgs_read_register(hwmgr->device, mmMC_ARB_MISC3);

sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c

2086

(0 == (cgs_read_register(hwmgr->device, mmGPIOPAD_A) &