Symbol: AFMT_60958_CS_CHANNEL_NUMBER_R
sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c
1682
tmp = REG_SET_FIELD(tmp, AFMT_60958_1, AFMT_60958_CS_CHANNEL_NUMBER_R, 2);
sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c
1609
tmp = REG_SET_FIELD(tmp, AFMT_60958_1, AFMT_60958_CS_CHANNEL_NUMBER_R, 2);
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.c
1328
REG_UPDATE(AFMT_60958_1, AFMT_60958_CS_CHANNEL_NUMBER_R, 2);
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
190
SE_SF(AFMT_60958_1, AFMT_60958_CS_CHANNEL_NUMBER_R, mask_sh),\
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
268
SE_SF(DIG0_AFMT_60958_1, AFMT_60958_CS_CHANNEL_NUMBER_R, mask_sh),\
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
462
uint8_t AFMT_60958_CS_CHANNEL_NUMBER_R;
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
594
uint32_t AFMT_60958_CS_CHANNEL_NUMBER_R;
sys/dev/pci/drm/amd/display/dc/dcn30/dcn30_afmt.c
71
REG_UPDATE(AFMT_60958_1, AFMT_60958_CS_CHANNEL_NUMBER_R, 2);
sys/dev/pci/drm/amd/display/dc/dcn30/dcn30_afmt.h
65
SE_SF(AFMT0_AFMT_60958_1, AFMT_60958_CS_CHANNEL_NUMBER_R, mask_sh),\
sys/dev/pci/drm/amd/display/dc/dcn30/dcn30_afmt.h
84
type AFMT_60958_CS_CHANNEL_NUMBER_R;\
sys/dev/pci/drm/amd/display/dc/dcn31/dcn31_afmt.h
65
SE_SF(AFMT0_AFMT_60958_1, AFMT_60958_CS_CHANNEL_NUMBER_R, mask_sh),\
sys/dev/pci/drm/amd/display/dc/dcn31/dcn31_afmt.h
86
type AFMT_60958_CS_CHANNEL_NUMBER_R;\
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c
1316
REG_UPDATE(AFMT_60958_1, AFMT_60958_CS_CHANNEL_NUMBER_R, 2);
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
260
SE_SF(DIG0_AFMT_60958_1, AFMT_60958_CS_CHANNEL_NUMBER_R, mask_sh),\
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
476
type AFMT_60958_CS_CHANNEL_NUMBER_R;\
sys/dev/pci/drm/radeon/evergreen_hdmi.c
368
AFMT_60958_CS_CHANNEL_NUMBER_R(2));