Symbol: AFMT_60958_2
sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c
1686
tmp = REG_SET_FIELD(tmp, AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_2, 3);
sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c
1687
tmp = REG_SET_FIELD(tmp, AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_3, 4);
sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c
1688
tmp = REG_SET_FIELD(tmp, AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_4, 5);
sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c
1689
tmp = REG_SET_FIELD(tmp, AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_5, 6);
sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c
1690
tmp = REG_SET_FIELD(tmp, AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_6, 7);
sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c
1691
tmp = REG_SET_FIELD(tmp, AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_7, 8);
sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c
1613
tmp = REG_SET_FIELD(tmp, AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_2, 3);
sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c
1614
tmp = REG_SET_FIELD(tmp, AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_3, 4);
sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c
1615
tmp = REG_SET_FIELD(tmp, AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_4, 5);
sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c
1616
tmp = REG_SET_FIELD(tmp, AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_5, 6);
sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c
1617
tmp = REG_SET_FIELD(tmp, AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_6, 7);
sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c
1618
tmp = REG_SET_FIELD(tmp, AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_7, 8);
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.c
1332
REG_UPDATE_6(AFMT_60958_2,
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
191
SE_SF(AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_2, mask_sh),\
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
192
SE_SF(AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_3, mask_sh),\
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
193
SE_SF(AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_4, mask_sh),\
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
194
SE_SF(AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_5, mask_sh),\
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
195
SE_SF(AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_6, mask_sh),\
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
196
SE_SF(AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_7, mask_sh),\
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
654
uint32_t AFMT_60958_2;
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
66
SRI(AFMT_60958_2, DIG, id), \
sys/dev/pci/drm/amd/display/dc/dcn30/dcn30_afmt.c
76
REG_UPDATE_6(AFMT_60958_2,
sys/dev/pci/drm/amd/display/dc/dcn30/dcn30_afmt.h
41
SRI(AFMT_60958_2, AFMT, id), \
sys/dev/pci/drm/amd/display/dc/dcn30/dcn30_afmt.h
52
uint32_t AFMT_60958_2;
sys/dev/pci/drm/amd/display/dc/dcn31/dcn31_afmt.h
41
SRI(AFMT_60958_2, AFMT, id), \
sys/dev/pci/drm/amd/display/dc/dcn31/dcn31_afmt.h
52
uint32_t AFMT_60958_2;
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c
1321
REG_UPDATE_6(AFMT_60958_2,
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
128
uint32_t AFMT_60958_2;
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
53
SRI(AFMT_60958_2, DIG, id), \
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.h
256
SRI_ARR(AFMT_60958_2, AFMT, id), SRI_ARR(AFMT_MEM_PWR, AFMT, id)
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.h
76
SRI_ARR(AFMT_60958_2, AFMT, id), \
sys/dev/pci/drm/radeon/evergreen_hdmi.c
370
WREG32(AFMT_60958_2 + offset,