Symbol: bw_mul
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1049
data->scatter_gather_pte_requests_in_row[i] = bw_div(bw_mul(bw_ceil2(bw_mul(bw_div(data->source_width_rounded_up_to_chunks[i], bw_int_to_fixed(dceip->chunk_width)), data->pte_request_per_chunk[i]), bw_int_to_fixed(1)), data->scatter_gather_row_height), data->scatter_gather_page_height[i]);
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1050
data->scatter_gather_pte_requests_in_vblank = bw_mul(data->scatter_gather_pte_request_rows, data->scatter_gather_pte_requests_in_row[i]);
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1055
data->scatter_gather_pte_request_limit[i] = bw_max2(dceip->minimum_outstanding_pte_request_limit, bw_min2(data->scatter_gather_pte_requests_in_vblank, bw_ceil2(bw_mul(bw_mul(bw_div(bw_ceil2(data->adjusted_data_buffer_size[i], data->memory_chunk_size_in_bytes[i]), data->memory_chunk_size_in_bytes[i]), data->pte_request_per_chunk[i]), data->peak_pte_request_to_eviction_ratio_limiting), bw_int_to_fixed(1))));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1062
data->inefficient_linear_pitch_in_bytes = bw_mul(bw_mul(bw_int_to_fixed(256), bw_int_to_fixed(vbios->number_of_dram_banks)), bw_int_to_fixed(data->number_of_dram_channels));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1089
data->cursor_total_data = bw_add(data->cursor_total_data, bw_mul(bw_mul(bw_int_to_fixed(2), data->cursor_width_pixels[i]), bw_int_to_fixed(4)));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1108
data->bytes_per_page_close_open = bw_mul(data->lines_interleaved_in_mem_access[i], bw_max2(bw_mul(bw_mul(bw_mul(bw_int_to_fixed(data->bytes_per_pixel[i]), data->tile_width_in_pixels), bw_int_to_fixed(vbios->number_of_dram_banks)), bw_int_to_fixed(data->number_of_dram_channels)), bw_mul(bw_int_to_fixed(data->bytes_per_pixel[i]), data->scatter_gather_page_width[i])));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1110
else if (data->scatter_gather_enable_for_pipe[i] == 1 && tiling_mode[i] == bw_def_linear && bw_equ(bw_mod((bw_mul(data->pitch_in_pixels_after_surface_type[i], bw_int_to_fixed(data->bytes_per_pixel[i]))), data->inefficient_linear_pitch_in_bytes), bw_int_to_fixed(0))) {
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1124
data->dmif_total_page_close_open_time = bw_div(bw_mul((bw_add(bw_add(data->dmif_total_number_of_data_request_page_close_open, data->scatter_gather_total_pte_request_groups), data->cursor_total_request_groups)), vbios->trc), bw_int_to_fixed(1000));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1125
data->mcifwr_total_page_close_open_time = bw_div(bw_mul(data->mcifwr_total_number_of_data_request_page_close_open, vbios->trc), bw_int_to_fixed(1000));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1128
data->adjusted_data_buffer_size_in_memory[i] = bw_div(bw_mul(data->adjusted_data_buffer_size[i], data->bytes_per_request[i]), data->useful_bytes_per_request[i]);
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1140
data->total_dmifmc_urgent_latency = bw_mul(vbios->dmifmc_urgent_latency, data->total_dmifmc_urgent_trips);
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1163
data->display_reads_required_dram_access_data = bw_mul(data->adjusted_data_buffer_size_in_memory[i], bw_ceil2(bw_div(bw_int_to_fixed((8 * vbios->dram_channel_width_in_bits / 8)), data->bytes_per_request[i]), bw_int_to_fixed(1)));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1170
data->total_display_writes_required_dram_access_data = bw_add(data->total_display_writes_required_dram_access_data, bw_mul(data->adjusted_data_buffer_size_in_memory[i], bw_ceil2(bw_div(bw_int_to_fixed(vbios->dram_channel_width_in_bits), data->bytes_per_request[i]), bw_int_to_fixed(1))));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1174
data->total_display_reads_required_data = bw_add(bw_add(data->total_display_reads_required_data, data->cursor_total_data), bw_mul(data->scatter_gather_total_pte_requests, bw_int_to_fixed(64)));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1175
data->total_display_reads_required_dram_access_data = bw_add(bw_add(data->total_display_reads_required_dram_access_data, data->cursor_total_data), bw_mul(data->scatter_gather_total_pte_requests, bw_int_to_fixed(64)));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1179
data->src_pixels_for_first_output_pixel[i] = bw_mul(bw_int_to_fixed(4), data->source_width_rounded_up_to_chunks[i]);
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1189
data->src_data_for_first_output_pixel[i] = bw_div(bw_mul(bw_mul(data->src_pixels_for_first_output_pixel[i], bw_int_to_fixed(data->bytes_per_pixel[i])), data->bytes_per_request[i]), data->useful_bytes_per_request[i]);
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1190
data->src_pixels_for_last_output_pixel[i] = bw_mul(data->source_width_rounded_up_to_chunks[i], bw_max2(bw_ceil2(data->v_filter_init[i], bw_int_to_fixed(dceip->lines_interleaved_into_lb)), bw_mul(bw_ceil2(data->vsr[i], bw_int_to_fixed(dceip->lines_interleaved_into_lb)), data->horizontal_blank_and_chunk_granularity_factor[i])));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1191
data->src_data_for_last_output_pixel[i] = bw_div(bw_mul(bw_mul(bw_mul(data->source_width_rounded_up_to_chunks[i], bw_max2(bw_ceil2(data->v_filter_init[i], bw_int_to_fixed(dceip->lines_interleaved_into_lb)), data->lines_interleaved_in_mem_access[i])), bw_int_to_fixed(data->bytes_per_pixel[i])), data->bytes_per_request[i]), data->useful_bytes_per_request[i]);
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1197
data->dmif_burst_time[i][j] = bw_max3(data->dmif_total_page_close_open_time, bw_div(data->total_display_reads_required_dram_access_data, (bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[i]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_channels)))), bw_div(data->total_display_reads_required_data, (bw_mul(bw_mul(sclk[j], vbios->data_return_bus_width), bw_frc_to_fixed(dceip->percent_of_ideal_port_bw_received_after_urgent_latency, 100)))));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1199
data->mcifwr_burst_time[i][j] = bw_max3(data->mcifwr_total_page_close_open_time, bw_div(data->total_display_writes_required_dram_access_data, (bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[i]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_wrchannels)))), bw_div(data->total_display_writes_required_data, (bw_mul(sclk[j], vbios->data_return_bus_width))));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1210
data->dmif_buffer_transfer_time[i] = bw_mul(data->source_width_rounded_up_to_chunks[i], (bw_div(dceip->lb_write_pixels_per_dispclk, (bw_div(vbios->low_voltage_max_dispclk, dceip->display_pipe_throughput_factor)))));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1211
data->line_source_transfer_time[i][j][k] = bw_max2(bw_mul((bw_add(data->total_dmifmc_urgent_latency, data->dmif_burst_time[j][k])), bw_floor2(bw_div(data->src_data_for_first_output_pixel[i], data->adjusted_data_buffer_size_in_memory[i]), bw_int_to_fixed(1))), bw_sub(bw_add(bw_mul((bw_add(data->total_dmifmc_urgent_latency, data->dmif_burst_time[j][k])), bw_floor2(bw_div(data->src_data_for_last_output_pixel[i], data->adjusted_data_buffer_size_in_memory[i]), bw_int_to_fixed(1))), data->dmif_buffer_transfer_time[i]), data->active_time[i]));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1256
data->scaler_limits_factor = bw_max3(bw_int_to_fixed(1), bw_ceil2(bw_div(data->h_taps[i], bw_int_to_fixed(4)), bw_int_to_fixed(1)), bw_mul(data->hsr[i], bw_max2(bw_div(data->v_taps[i], data->v_scaler_efficiency), bw_int_to_fixed(1))));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1258
data->dram_speed_change_line_source_transfer_time[i][j][k] = bw_mul(bw_int_to_fixed(2), bw_max2((bw_add((bw_div(data->src_data_for_first_output_pixel[i], bw_min2(bw_mul(data->bytes_per_request[i], sclk[k]), bw_div(bw_mul(bw_mul(data->bytes_per_request[i], data->pixel_rate[i]), data->scaler_limits_factor), bw_int_to_fixed(2))))), (bw_mul(data->dmif_burst_time[j][k], bw_floor2(bw_div(data->src_data_for_first_output_pixel[i], data->adjusted_data_buffer_size_in_memory[i]), bw_int_to_fixed(1)))))), (bw_add((bw_div(data->src_data_for_last_output_pixel[i], bw_min2(bw_mul(data->bytes_per_request[i], sclk[k]), bw_div(bw_mul(bw_mul(data->bytes_per_request[i], data->pixel_rate[i]), data->scaler_limits_factor), bw_int_to_fixed(2))))), (bw_sub(bw_mul(data->dmif_burst_time[j][k], bw_floor2(bw_div(data->src_data_for_last_output_pixel[i], data->adjusted_data_buffer_size_in_memory[i]), bw_int_to_fixed(1))), data->active_time[i]))))));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1261
data->line_source_transfer_time[i][j][k] = bw_max2(bw_mul((bw_add(vbios->mcifwrmc_urgent_latency, data->mcifwr_burst_time[j][k])), bw_floor2(bw_div(data->src_data_for_first_output_pixel[i], data->adjusted_data_buffer_size_in_memory[i]), bw_int_to_fixed(1))), bw_sub(bw_mul((bw_add(vbios->mcifwrmc_urgent_latency, data->mcifwr_burst_time[j][k])), bw_floor2(bw_div(data->src_data_for_last_output_pixel[i], data->adjusted_data_buffer_size_in_memory[i]), bw_int_to_fixed(1))), data->active_time[i]));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1267
data->dram_speed_change_line_source_transfer_time[i][j][k] = bw_max2((bw_add((bw_div(data->src_data_for_first_output_pixel[i], bw_min2(bw_mul(data->bytes_per_request[i], sclk[k]), bw_div(bw_mul(data->bytes_per_request[i], vbios->low_voltage_max_dispclk), bw_int_to_fixed(2))))), (bw_mul(data->mcifwr_burst_time[j][k], bw_floor2(bw_div(data->src_data_for_first_output_pixel[i], data->adjusted_data_buffer_size_in_memory[i]), bw_int_to_fixed(1)))))), (bw_add((bw_div(data->src_data_for_last_output_pixel[i], bw_min2(bw_mul(data->bytes_per_request[i], sclk[k]), bw_div(bw_mul(data->bytes_per_request[i], vbios->low_voltage_max_dispclk), bw_int_to_fixed(2))))), (bw_sub(bw_mul(data->mcifwr_burst_time[j][k], bw_floor2(bw_div(data->src_data_for_last_output_pixel[i], data->adjusted_data_buffer_size_in_memory[i]), bw_int_to_fixed(1))), data->active_time[i])))));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1298
data->cursor_latency_hiding[i] = bw_div(bw_div(bw_mul((bw_sub(dceip->cursor_dcp_buffer_lines, bw_int_to_fixed(1))), data->h_total[i]), data->vsr[i]), data->pixel_rate[i]);
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1301
data->cursor_latency_hiding[i] = bw_div(bw_div(bw_mul((bw_sub(dceip->cursor_dcp_buffer_lines, bw_int_to_fixed(3))), data->h_total[i]), data->vsr[i]), data->pixel_rate[i]);
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1313
data->minimum_latency_hiding[i] = bw_sub(bw_div(bw_mul((bw_div((bw_add(bw_sub(data->lb_partitions[i], bw_int_to_fixed(2)), bw_div(bw_div(data->data_buffer_size[i], bw_int_to_fixed(data->bytes_per_pixel[i])), data->source_width_pixels[i]))), data->vsr[i])), data->h_total[i]), data->pixel_rate[i]), data->total_dmifmc_urgent_latency);
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1315
data->minimum_latency_hiding[i] = bw_sub(bw_div(bw_mul((bw_div((bw_add(bw_sub(data->lb_partitions[i], bw_int_to_fixed(1)), bw_div(bw_div(data->data_buffer_size[i], bw_int_to_fixed(data->bytes_per_pixel[i])), data->source_width_pixels[i]))), data->vsr[i])), data->h_total[i]), data->pixel_rate[i]), data->total_dmifmc_urgent_latency);
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1318
data->minimum_latency_hiding[i] = bw_sub(bw_div(bw_mul((bw_div((bw_add(bw_int_to_fixed(1 + data->line_buffer_prefetch[i]), bw_div(bw_div(data->data_buffer_size[i], bw_int_to_fixed(data->bytes_per_pixel[i])), data->source_width_pixels[i]))), data->vsr[i])), data->h_total[i]), data->pixel_rate[i]), data->total_dmifmc_urgent_latency);
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1332
data->dispclk_required_for_blackout_duration[i][j] = bw_max3(data->dispclk_required_for_blackout_duration[i][j], bw_div(bw_div(bw_mul(data->src_pixels_for_first_output_pixel[k], dceip->display_pipe_throughput_factor), dceip->lb_write_pixels_per_dispclk), (bw_sub(bw_sub(data->minimum_latency_hiding_with_cursor[k], vbios->blackout_duration), data->dmif_burst_time[i][j]))), bw_div(bw_div(bw_mul(data->src_pixels_for_last_output_pixel[k], dceip->display_pipe_throughput_factor), dceip->lb_write_pixels_per_dispclk), (bw_add(bw_sub(bw_sub(data->minimum_latency_hiding_with_cursor[k], vbios->blackout_duration), data->dmif_burst_time[i][j]), data->active_time[k]))));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1333
if (bw_leq(vbios->maximum_blackout_recovery_time, bw_add(bw_mul(bw_int_to_fixed(2), data->total_dmifmc_urgent_latency), data->dmif_burst_time[i][j]))) {
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1336
else if (bw_ltn(data->adjusted_data_buffer_size[k], bw_mul(bw_div(bw_mul(data->display_bandwidth[k], data->useful_bytes_per_request[k]), data->bytes_per_request[k]), (bw_add(vbios->blackout_duration, bw_add(bw_mul(bw_int_to_fixed(2), data->total_dmifmc_urgent_latency), data->dmif_burst_time[i][j])))))) {
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1337
data->dispclk_required_for_blackout_recovery[i][j] = bw_max2(data->dispclk_required_for_blackout_recovery[i][j], bw_div(bw_mul(bw_div(bw_div((bw_sub(bw_mul(bw_div(bw_mul(data->display_bandwidth[k], data->useful_bytes_per_request[k]), data->bytes_per_request[k]), (bw_add(vbios->blackout_duration, vbios->maximum_blackout_recovery_time))), data->adjusted_data_buffer_size[k])), bw_int_to_fixed(data->bytes_per_pixel[k])), (bw_sub(vbios->maximum_blackout_recovery_time, bw_sub(bw_mul(bw_int_to_fixed(2), data->total_dmifmc_urgent_latency), data->dmif_burst_time[i][j])))), data->latency_hiding_lines[k]), data->lines_interleaved_in_mem_access[k]));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1342
data->dispclk_required_for_blackout_duration[i][j] = bw_max3(data->dispclk_required_for_blackout_duration[i][j], bw_div(bw_div(bw_mul(data->src_pixels_for_first_output_pixel[k], dceip->display_pipe_throughput_factor), dceip->lb_write_pixels_per_dispclk), (bw_sub(bw_sub(bw_sub(data->minimum_latency_hiding_with_cursor[k], vbios->blackout_duration), data->dmif_burst_time[i][j]), data->mcifwr_burst_time[i][j]))), bw_div(bw_div(bw_mul(data->src_pixels_for_last_output_pixel[k], dceip->display_pipe_throughput_factor), dceip->lb_write_pixels_per_dispclk), (bw_add(bw_sub(bw_sub(bw_sub(data->minimum_latency_hiding_with_cursor[k], vbios->blackout_duration), data->dmif_burst_time[i][j]), data->mcifwr_burst_time[i][j]), data->active_time[k]))));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1343
if (bw_ltn(vbios->maximum_blackout_recovery_time, bw_add(bw_add(bw_mul(bw_int_to_fixed(2), vbios->mcifwrmc_urgent_latency), data->dmif_burst_time[i][j]), data->mcifwr_burst_time[i][j]))) {
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1346
else if (bw_ltn(data->adjusted_data_buffer_size[k], bw_mul(bw_div(bw_mul(data->display_bandwidth[k], data->useful_bytes_per_request[k]), data->bytes_per_request[k]), (bw_add(vbios->blackout_duration, bw_add(bw_mul(bw_int_to_fixed(2), data->total_dmifmc_urgent_latency), data->dmif_burst_time[i][j])))))) {
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1347
data->dispclk_required_for_blackout_recovery[i][j] = bw_max2(data->dispclk_required_for_blackout_recovery[i][j], bw_div(bw_mul(bw_div(bw_div((bw_sub(bw_mul(bw_div(bw_mul(data->display_bandwidth[k], data->useful_bytes_per_request[k]), data->bytes_per_request[k]), (bw_add(vbios->blackout_duration, vbios->maximum_blackout_recovery_time))), data->adjusted_data_buffer_size[k])), bw_int_to_fixed(data->bytes_per_pixel[k])), (bw_sub(vbios->maximum_blackout_recovery_time, (bw_add(bw_mul(bw_int_to_fixed(2), data->total_dmifmc_urgent_latency), data->dmif_burst_time[i][j]))))), data->latency_hiding_lines[k]), data->lines_interleaved_in_mem_access[k]));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1379
bw_mul(bw_frc_to_fixed(5, 10), data->total_dmifmc_urgent_latency));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1397
data->dispclk_required_for_dram_speed_change_pipe[i][j] = bw_max2(bw_div(bw_div(bw_mul(data->src_pixels_for_first_output_pixel[k], dceip->display_pipe_throughput_factor), dceip->lb_write_pixels_per_dispclk), (bw_sub(bw_sub(bw_sub(data->maximum_latency_hiding_with_cursor[k], vbios->nbp_state_change_latency), data->dmif_burst_time[i][j]), data->dram_speed_change_line_source_transfer_time[k][i][j]))), bw_div(bw_div(bw_mul(data->src_pixels_for_last_output_pixel[k], dceip->display_pipe_throughput_factor), dceip->lb_write_pixels_per_dispclk), (bw_add(bw_sub(bw_sub(bw_sub(data->maximum_latency_hiding_with_cursor[k], vbios->nbp_state_change_latency), data->dmif_burst_time[i][j]), data->dram_speed_change_line_source_transfer_time[k][i][j]), data->active_time[k]))));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1411
data->dispclk_required_for_dram_speed_change_pipe[i][j] = bw_max2(bw_div(bw_div(bw_mul(data->src_pixels_for_first_output_pixel[k], dceip->display_pipe_throughput_factor), dceip->lb_write_pixels_per_dispclk), (bw_sub(bw_sub(bw_sub(bw_sub(data->maximum_latency_hiding_with_cursor[k], vbios->nbp_state_change_latency), data->dmif_burst_time[i][j]), data->dram_speed_change_line_source_transfer_time[k][i][j]), data->mcifwr_burst_time[i][j]))), bw_div(bw_div(bw_mul(data->src_pixels_for_last_output_pixel[k], dceip->display_pipe_throughput_factor), dceip->lb_write_pixels_per_dispclk), (bw_add(bw_sub(bw_sub(bw_sub(bw_sub(data->maximum_latency_hiding_with_cursor[k], vbios->nbp_state_change_latency), data->dmif_burst_time[i][j]), data->dram_speed_change_line_source_transfer_time[k][i][j]), data->mcifwr_burst_time[i][j]), data->active_time[k]))));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1436
data->v_blank_dram_speed_change_margin[k] = bw_sub(bw_sub(bw_sub(bw_div(bw_mul((bw_sub(data->v_total[k], bw_sub(bw_div(data->src_height[k], data->v_scale_ratio[k]), bw_int_to_fixed(4)))), data->h_total[k]), data->pixel_rate[k]), vbios->nbp_state_change_latency), data->dmif_burst_time[low][s_low]), data->dram_speed_change_line_source_transfer_time[k][low][s_low]);
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1440
data->v_blank_dram_speed_change_margin[k] = bw_sub(bw_sub(bw_sub(bw_sub(bw_div(bw_mul((bw_sub(data->v_total[k], bw_sub(bw_div(data->src_height[k], data->v_scale_ratio[k]), bw_int_to_fixed(4)))), data->h_total[k]), data->pixel_rate[k]), vbios->nbp_state_change_latency), data->dmif_burst_time[low][s_low]), data->mcifwr_burst_time[low][s_low]), data->dram_speed_change_line_source_transfer_time[k][low][s_low]);
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1483
data->average_bandwidth_no_compression[i] = bw_div(bw_mul(bw_mul(bw_div(bw_mul(data->source_width_rounded_up_to_chunks[i], bw_int_to_fixed(data->bytes_per_pixel[i])), (bw_div(data->h_total[i], data->pixel_rate[i]))), data->vsr[i]), data->bytes_per_request[i]), data->useful_bytes_per_request[i]);
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1513
data->min_cursor_memory_interface_buffer_size_in_time = bw_min2(data->min_cursor_memory_interface_buffer_size_in_time, bw_div(bw_mul(bw_div(bw_int_to_fixed(num_cursor_lines), data->vsr[i]), data->h_total[i]), data->pixel_rate[i]));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1535
data->dram_bandwidth = bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[high]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_channels));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1541
data->dram_bandwidth = bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[high]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_channels));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1545
if (bw_ltn(data->total_average_bandwidth_no_compression, bw_mul(bw_mul(bw_mul(bw_frc_to_fixed(dceip->max_average_percent_of_ideal_drambw_display_can_use_in_normal_system_operation, 100),yclk[low]),bw_div(bw_int_to_fixed(vbios->dram_channel_width_in_bits),bw_int_to_fixed(8))),bw_int_to_fixed(vbios->number_of_dram_channels)))
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1546
&& bw_ltn(bw_mul(data->required_dram_bandwidth_gbyte_per_second, bw_int_to_fixed(1000)), bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[low]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_channels))) && (data->cpup_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[low][s_high], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[low][s_high], vbios->high_voltage_max_dispclk))) && (data->cpuc_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[low][s_high], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[low][s_high], vbios->high_voltage_max_dispclk) && bw_ltn(data->dispclk_required_for_blackout_recovery[low][s_high], vbios->high_voltage_max_dispclk))) && (!data->increase_voltage_to_support_mclk_switch || data->nbp_state_change_enable == bw_def_no || (bw_mtn(data->min_dram_speed_change_margin[low][s_high], bw_int_to_fixed(0)) && bw_ltn(data->min_dram_speed_change_margin[low][s_high], bw_int_to_fixed(9999)) && bw_leq(data->dispclk_required_for_dram_speed_change[low][s_high], vbios->high_voltage_max_dispclk) && data->num_displays_with_margin[low][s_high] == number_of_displays_enabled_with_margin))) {
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1549
data->dram_bandwidth = bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[low]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_channels));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1551
else if (bw_ltn(data->total_average_bandwidth_no_compression, bw_mul(bw_mul(bw_mul(bw_frc_to_fixed(dceip->max_average_percent_of_ideal_drambw_display_can_use_in_normal_system_operation, 100),yclk[mid]),bw_div(bw_int_to_fixed(vbios->dram_channel_width_in_bits),bw_int_to_fixed(8))),bw_int_to_fixed(vbios->number_of_dram_channels)))
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1552
&& bw_ltn(bw_mul(data->required_dram_bandwidth_gbyte_per_second, bw_int_to_fixed(1000)), bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[mid]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_channels))) && (data->cpup_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[mid][s_high], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[mid][s_high], vbios->high_voltage_max_dispclk))) && (data->cpuc_state_change_enable == bw_def_no || (bw_mtn(data->blackout_duration_margin[mid][s_high], bw_int_to_fixed(0)) && bw_ltn(data->dispclk_required_for_blackout_duration[mid][s_high], vbios->high_voltage_max_dispclk) && bw_ltn(data->dispclk_required_for_blackout_recovery[mid][s_high], vbios->high_voltage_max_dispclk))) && (!data->increase_voltage_to_support_mclk_switch || data->nbp_state_change_enable == bw_def_no || (bw_mtn(data->min_dram_speed_change_margin[mid][s_high], bw_int_to_fixed(0)) && bw_ltn(data->min_dram_speed_change_margin[mid][s_high], bw_int_to_fixed(9999)) && bw_leq(data->dispclk_required_for_dram_speed_change[mid][s_high], vbios->high_voltage_max_dispclk) && data->num_displays_with_margin[mid][s_high] == number_of_displays_enabled_with_margin))) {
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1555
data->dram_bandwidth = bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[mid]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_channels));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1557
else if (bw_ltn(data->total_average_bandwidth_no_compression, bw_mul(bw_mul(bw_mul(bw_frc_to_fixed(dceip->max_average_percent_of_ideal_drambw_display_can_use_in_normal_system_operation, 100),yclk[high]),bw_div(bw_int_to_fixed(vbios->dram_channel_width_in_bits),bw_int_to_fixed(8))),bw_int_to_fixed(vbios->number_of_dram_channels)))
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1558
&& bw_ltn(bw_mul(data->required_dram_bandwidth_gbyte_per_second, bw_int_to_fixed(1000)), bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[high]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_channels)))) {
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1561
data->dram_bandwidth = bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[high]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_channels));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1566
data->dram_bandwidth = bw_mul(bw_div(bw_mul(bw_mul(data->dram_efficiency, yclk[high]), bw_int_to_fixed(vbios->dram_channel_width_in_bits)), bw_int_to_fixed(8)), bw_int_to_fixed(data->number_of_dram_channels));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1574
data->dmif_required_sclk = bw_div(bw_div(data->total_display_reads_required_data, data->display_reads_time_for_data_transfer), (bw_mul(vbios->data_return_bus_width, bw_frc_to_fixed(dceip->percent_of_ideal_port_bw_received_after_urgent_latency, 100))));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1588
if (bw_ltn(data->total_average_bandwidth_no_compression, bw_mul(bw_mul(bw_frc_to_fixed(dceip->max_average_percent_of_ideal_port_bw_display_can_use_in_normal_system_operation, 100),sclk[low]),vbios->data_return_bus_width))
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1594
else if (bw_ltn(data->total_average_bandwidth_no_compression, bw_mul(bw_mul(bw_frc_to_fixed(dceip->max_average_percent_of_ideal_port_bw_display_can_use_in_normal_system_operation, 100),sclk[mid]),vbios->data_return_bus_width))
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1600
else if (bw_ltn(data->total_average_bandwidth_no_compression, bw_mul(bw_mul(bw_frc_to_fixed(dceip->max_average_percent_of_ideal_port_bw_display_can_use_in_normal_system_operation, 100),sclk[s_mid2]),vbios->data_return_bus_width))
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1606
else if (bw_ltn(data->total_average_bandwidth_no_compression, bw_mul(bw_mul(bw_frc_to_fixed(dceip->max_average_percent_of_ideal_port_bw_display_can_use_in_normal_system_operation, 100),sclk[s_mid3]),vbios->data_return_bus_width))
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1612
else if (bw_ltn(data->total_average_bandwidth_no_compression, bw_mul(bw_mul(bw_frc_to_fixed(dceip->max_average_percent_of_ideal_port_bw_display_can_use_in_normal_system_operation, 100),sclk[s_mid4]),vbios->data_return_bus_width))
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1618
else if (bw_ltn(data->total_average_bandwidth_no_compression, bw_mul(bw_mul(bw_frc_to_fixed(dceip->max_average_percent_of_ideal_port_bw_display_can_use_in_normal_system_operation, 100),sclk[s_mid5]),vbios->data_return_bus_width))
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1624
else if (bw_ltn(data->total_average_bandwidth_no_compression, bw_mul(bw_mul(bw_frc_to_fixed(dceip->max_average_percent_of_ideal_port_bw_display_can_use_in_normal_system_operation, 100),sclk[s_mid6]),vbios->data_return_bus_width))
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1630
else if (bw_ltn(data->total_average_bandwidth_no_compression, bw_mul(bw_mul(bw_frc_to_fixed(dceip->max_average_percent_of_ideal_port_bw_display_can_use_in_normal_system_operation, 100),sclk[s_high]),vbios->data_return_bus_width))
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1636
else if (bw_meq(data->total_average_bandwidth_no_compression, bw_mul(bw_mul(bw_frc_to_fixed(dceip->max_average_percent_of_ideal_port_bw_display_can_use_in_normal_system_operation, 100),sclk[s_high]),vbios->data_return_bus_width))
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1704
data->scaler_limits_factor = bw_max3(bw_int_to_fixed(1), bw_ceil2(bw_div(data->h_taps[i], bw_int_to_fixed(4)), bw_int_to_fixed(1)), bw_mul(data->hsr[i], bw_max2(bw_div(data->v_taps[i], data->v_scaler_efficiency), bw_int_to_fixed(1))));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1706
data->display_pipe_pixel_throughput = bw_div(bw_div(bw_mul(bw_max2(data->lb_lines_in_per_line_out_in_beginning_of_frame[i], bw_mul(data->lb_lines_in_per_line_out_in_middle_of_frame[i], data->horizontal_blank_and_chunk_granularity_factor[i])), data->source_width_rounded_up_to_chunks[i]), (bw_div(data->h_total[i], data->pixel_rate[i]))), dceip->lb_write_pixels_per_dispclk);
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1707
data->dispclk_required_without_ramping[i] = bw_mul(data->downspread_factor, bw_max2(bw_mul(data->pixel_rate[i], data->scaler_limits_factor), bw_mul(dceip->display_pipe_throughput_factor, data->display_pipe_pixel_throughput)));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1708
data->dispclk_required_with_ramping[i] = bw_mul(dceip->dispclk_ramping_factor, bw_max2(bw_mul(data->pixel_rate[i], data->scaler_limits_factor), data->display_pipe_pixel_throughput));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1735
data->dispclk_required_for_total_read_request_bandwidth = bw_div(bw_mul(data->total_read_request_bandwidth, dceip->dispclk_per_request), dceip->request_efficiency);
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1801
data->blackout_recovery_time = bw_max2(data->blackout_recovery_time, bw_add(bw_mul(bw_int_to_fixed(2), data->total_dmifmc_urgent_latency), data->dmif_burst_time[data->y_clk_level][data->sclk_level]));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1802
if (bw_ltn(data->adjusted_data_buffer_size[k], bw_mul(bw_div(bw_mul(data->display_bandwidth[k], data->useful_bytes_per_request[k]), data->bytes_per_request[k]), (bw_add(vbios->blackout_duration, bw_add(bw_mul(bw_int_to_fixed(2), data->total_dmifmc_urgent_latency), data->dmif_burst_time[data->y_clk_level][data->sclk_level])))))) {
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1803
data->blackout_recovery_time = bw_max2(data->blackout_recovery_time, bw_div((bw_add(bw_mul(bw_div(bw_mul(data->display_bandwidth[k], data->useful_bytes_per_request[k]), data->bytes_per_request[k]), vbios->blackout_duration), bw_sub(bw_div(bw_mul(bw_mul(bw_mul((bw_add(bw_mul(bw_int_to_fixed(2), data->total_dmifmc_urgent_latency), data->dmif_burst_time[data->y_clk_level][data->sclk_level])), data->dispclk), bw_int_to_fixed(data->bytes_per_pixel[k])), data->lines_interleaved_in_mem_access[k]), data->latency_hiding_lines[k]), data->adjusted_data_buffer_size[k]))), (bw_sub(bw_div(bw_mul(bw_mul(data->dispclk, bw_int_to_fixed(data->bytes_per_pixel[k])), data->lines_interleaved_in_mem_access[k]), data->latency_hiding_lines[k]), bw_div(bw_mul(data->display_bandwidth[k], data->useful_bytes_per_request[k]), data->bytes_per_request[k])))));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1807
data->blackout_recovery_time = bw_max2(data->blackout_recovery_time, bw_add(bw_mul(bw_int_to_fixed(2), vbios->mcifwrmc_urgent_latency), data->mcifwr_burst_time[data->y_clk_level][data->sclk_level]));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1808
if (bw_ltn(data->adjusted_data_buffer_size[k], bw_mul(bw_div(bw_mul(data->display_bandwidth[k], data->useful_bytes_per_request[k]), data->bytes_per_request[k]), (bw_add(vbios->blackout_duration, bw_add(bw_mul(bw_int_to_fixed(2), vbios->mcifwrmc_urgent_latency), data->mcifwr_burst_time[data->y_clk_level][data->sclk_level])))))) {
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1809
data->blackout_recovery_time = bw_max2(data->blackout_recovery_time, bw_div((bw_add(bw_mul(bw_div(bw_mul(data->display_bandwidth[k], data->useful_bytes_per_request[k]), data->bytes_per_request[k]), vbios->blackout_duration), bw_sub(bw_div(bw_mul(bw_mul(bw_mul((bw_add(bw_add(bw_mul(bw_int_to_fixed(2), vbios->mcifwrmc_urgent_latency), data->dmif_burst_time[data->y_clk_level][data->sclk_level]), data->mcifwr_burst_time[data->y_clk_level][data->sclk_level])), data->dispclk), bw_int_to_fixed(data->bytes_per_pixel[k])), data->lines_interleaved_in_mem_access[k]), data->latency_hiding_lines[k]), data->adjusted_data_buffer_size[k]))), (bw_sub(bw_div(bw_mul(bw_mul(data->dispclk, bw_int_to_fixed(data->bytes_per_pixel[k])), data->lines_interleaved_in_mem_access[k]), data->latency_hiding_lines[k]), bw_div(bw_mul(data->display_bandwidth[k], data->useful_bytes_per_request[k]), data->bytes_per_request[k])))));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1844
data->sclk_deep_sleep = bw_max2(bw_div(bw_mul(data->dispclk, bw_frc_to_fixed(115, 100)), data->min_pixels_per_data_fifo_entry), data->total_read_request_bandwidth);
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1860
data->cursor_request_time = (bw_div(data->cursor_total_data, (bw_mul(bw_int_to_fixed(32), sclk[data->sclk_level]))));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1935
data->stutter_refresh_duration[i] = bw_sub(bw_mul(bw_div(bw_div(bw_mul(bw_div(bw_div(data->adjusted_data_buffer_size[i], bw_int_to_fixed(data->bytes_per_pixel[i])), data->source_width_rounded_up_to_chunks[i]), data->h_total[i]), data->vsr[i]), data->pixel_rate[i]), data->compression_rate[i]), bw_max2(bw_int_to_fixed(0), bw_sub(data->stutter_exit_watermark[i], bw_div(bw_mul((bw_sub(data->lb_partitions[i], bw_int_to_fixed(1))), data->h_total[i]), data->pixel_rate[i]))));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1936
data->stutter_dmif_buffer_size[i] = bw_div(bw_mul(bw_mul(bw_div(bw_mul(bw_mul(data->stutter_refresh_duration[i], bw_int_to_fixed(data->bytes_per_pixel[i])), data->source_width_rounded_up_to_chunks[i]), data->h_total[i]), data->vsr[i]), data->pixel_rate[i]), data->compression_rate[i]);
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1947
data->total_bytes_requested = bw_fixed_to_int(bw_add(bw_int_to_fixed(data->total_bytes_requested), (bw_mul(bw_mul(data->source_height_rounded_up_to_chunks[i], data->source_width_rounded_up_to_chunks[i]), bw_int_to_fixed(data->bytes_per_pixel[i])))));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1953
data->stutter_burst_time = bw_div(bw_int_to_fixed(data->total_stutter_dmif_buffer_size), bw_mul(sclk[data->sclk_level], vbios->data_return_bus_width));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1965
data->stutter_efficiency = bw_max2(bw_int_to_fixed(0), bw_mul((bw_sub(bw_int_to_fixed(1), (bw_div(bw_mul((bw_add(vbios->stutter_self_refresh_exit_latency, data->stutter_burst_time)), bw_int_to_fixed(data->num_stutter_bursts)), bw_frc_to_fixed(166666667, 10000))))), bw_int_to_fixed(100)));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1979
data->immediate_flip_time = bw_mul(data->worst_number_of_trips_to_memory, data->total_dmifmc_urgent_latency);
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
1998
data->v_blank_nbp_state_dram_speed_change_latency_supported = bw_min2(data->v_blank_nbp_state_dram_speed_change_latency_supported, bw_add(bw_sub(bw_div(bw_mul((bw_sub(data->v_total[i], bw_sub(bw_div(data->src_height[i], data->v_scale_ratio[i]), bw_int_to_fixed(4)))), data->h_total[i]), data->pixel_rate[i]), data->nbp_state_change_watermark[i]), vbios->nbp_state_change_latency));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
2003
data->display_reads_time_for_data_transfer_and_urgent_latency = bw_sub(data->min_read_buffer_size_in_time, bw_mul(data->total_dmifmc_urgent_trips, bw_int_to_fixed(i)));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
2005
data->dmif_required_sclk_for_urgent_latency[i] = bw_div(bw_div(data->total_display_reads_required_data, data->display_reads_time_for_data_transfer_and_urgent_latency), (bw_mul(vbios->data_return_bus_width, bw_frc_to_fixed(dceip->percent_of_ideal_port_bw_received_after_urgent_latency, 100))));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
2018
data->output_bpphdmi[k] = bw_fixed_to_int(bw_mul(bw_div(bw_min2(bw_int_to_fixed(600), data->max_phyclk), data->pixel_rate[k]), bw_int_to_fixed(24)));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
2020
data->output_bppdp4_lane_hbr[k] = bw_fixed_to_int(bw_mul(bw_div(bw_mul(bw_int_to_fixed(270), bw_int_to_fixed(4)), data->pixel_rate[k]), bw_int_to_fixed(8)));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
2023
data->output_bppdp4_lane_hbr2[k] = bw_fixed_to_int(bw_mul(bw_div(bw_mul(bw_int_to_fixed(540), bw_int_to_fixed(4)), data->pixel_rate[k]), bw_int_to_fixed(8)));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
2026
data->output_bppdp4_lane_hbr3[k] = bw_fixed_to_int(bw_mul(bw_div(bw_mul(bw_int_to_fixed(810), bw_int_to_fixed(4)), data->pixel_rate[k]), bw_int_to_fixed(8)));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3092
bw_fixed_to_int(bw_mul(data->dispclk,
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3097
bw_fixed_to_int(bw_mul(data->required_sclk,
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3100
bw_fixed_to_int(bw_mul(data->sclk_deep_sleep,
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3104
bw_mul(low_yclk, bw_int_to_fixed(1000)));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3107
bw_mul(mid_yclk, bw_int_to_fixed(1000)));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3110
bw_mul(high_yclk, bw_int_to_fixed(1000)));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3115
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3118
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3121
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3126
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3129
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3133
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3136
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3140
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3146
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3149
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3152
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3156
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3159
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3163
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3166
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3170
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3174
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3177
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3180
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3184
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3187
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3191
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3194
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3198
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3202
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3205
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3208
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3212
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3215
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3219
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3222
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3226
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3236
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3239
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3242
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3247
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3250
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3254
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3257
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3261
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3267
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3270
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3273
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3277
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3280
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3284
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3287
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3291
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3295
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3298
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3301
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3305
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3308
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3312
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3315
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3319
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3323
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3326
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3329
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3333
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3336
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3340
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3343
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3347
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3357
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3360
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3363
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3367
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3370
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3374
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3377
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3381
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3386
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3389
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3392
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3396
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3399
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3403
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3406
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3410
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3413
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3416
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3419
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3423
bw_fixed_to_int(bw_mul(data->stutter_entry_watermark[0],
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3426
bw_fixed_to_int(bw_mul(data->stutter_entry_watermark[1],
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3430
bw_fixed_to_int(bw_mul(data->stutter_entry_watermark[7],
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3433
bw_fixed_to_int(bw_mul(data->stutter_entry_watermark[8],
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3437
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3440
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3443
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3446
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3450
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3453
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3457
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3460
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3464
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3488
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3491
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3494
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3498
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3501
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3505
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3508
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3512
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3516
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3519
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3522
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3526
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3529
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3533
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3536
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3540
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3544
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3547
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3550
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3554
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3557
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3561
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3564
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3568
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3572
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3575
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3578
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3582
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3585
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3589
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3592
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
3596
bw_fixed_to_int(bw_mul(data->
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
466
data->source_height_pixels = bw_mul(bw_int_to_fixed(2), data->src_height_after_rotation);
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
468
data->vsr_after_stereo = bw_mul(bw_int_to_fixed(1), data->vsr_after_rotation);
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
471
data->source_width_pixels[i] = bw_mul(bw_int_to_fixed(2), data->src_width_after_rotation);
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
473
data->hsr_after_stereo = bw_mul(bw_int_to_fixed(1), data->hsr_after_rotation);
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
485
data->vsr[i] = bw_mul(data->vsr_after_stereo, bw_int_to_fixed(2));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
562
data->lb_line_pitch = bw_ceil2(bw_mul(bw_div(bw_frc_to_fixed(2401171875ul, 100000000), bw_int_to_fixed(3)), bw_ceil2(data->source_width_in_lb, bw_int_to_fixed(8))), bw_int_to_fixed(48));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
565
data->lb_line_pitch = bw_ceil2(bw_mul(bw_div(bw_frc_to_fixed(300234375, 10000000), bw_int_to_fixed(3)), bw_ceil2(data->source_width_in_lb, bw_int_to_fixed(8))), bw_int_to_fixed(48));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
568
data->lb_line_pitch = bw_ceil2(bw_mul(bw_int_to_fixed(data->lb_bpc[i]), data->source_width_in_lb), bw_int_to_fixed(48));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
803
data->v_filter_init[i] = bw_floor2(bw_div((bw_add(bw_add(bw_add(bw_int_to_fixed(1), data->v_taps[i]), data->vsr[i]), bw_mul(bw_mul(bw_int_to_fixed(data->interlace_mode[i]), bw_frc_to_fixed(5, 10)), data->vsr[i]))), bw_int_to_fixed(2)), bw_int_to_fixed(1));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
853
data->request_bandwidth[i] = bw_div(bw_mul(bw_div(bw_mul(bw_div(bw_mul(bw_max2(data->lb_lines_in_per_line_out_in_beginning_of_frame[i], data->lb_lines_in_per_line_out_in_middle_of_frame[i]), data->source_width_rounded_up_to_chunks[i]), (bw_div(data->h_total[i], data->pixel_rate[i]))), bw_int_to_fixed(data->bytes_per_pixel[i])), data->useful_bytes_per_request[i]), data->lines_interleaved_in_mem_access[i]), data->latency_hiding_lines[i]);
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
854
data->display_bandwidth[i] = bw_mul(data->request_bandwidth[i], data->bytes_per_request[i]);
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
912
data->data_buffer_size[i] = bw_min2(bw_mul(bw_mul(bw_int_to_fixed(max_chunks_fbc_mode), bw_int_to_fixed(pixels_per_chunk)), bw_int_to_fixed(data->bytes_per_pixel[i])), bw_mul(bw_int_to_fixed(dceip->max_dmif_buffer_allocated), bw_int_to_fixed(dceip->graphics_dmif_size)));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
915
data->data_buffer_size[i] = bw_min2(bw_mul(bw_mul(bw_int_to_fixed(max_chunks_fbc_mode), bw_int_to_fixed(pixels_per_chunk)), bw_int_to_fixed(data->bytes_per_pixel[i])), bw_int_to_fixed(dceip->graphics_dmif_size));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
921
data->data_buffer_size[i] = bw_min2(bw_mul(bw_mul(bw_int_to_fixed(data->max_chunks_non_fbc_mode[i]), bw_int_to_fixed(pixels_per_chunk)), bw_int_to_fixed(data->bytes_per_pixel[i])), bw_mul(bw_int_to_fixed(dceip->max_dmif_buffer_allocated), bw_int_to_fixed(dceip->graphics_dmif_size)));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
924
data->data_buffer_size[i] = bw_min2(bw_mul(bw_mul(bw_int_to_fixed(data->max_chunks_non_fbc_mode[i]), bw_int_to_fixed(pixels_per_chunk)), bw_int_to_fixed(data->bytes_per_pixel[i])), bw_int_to_fixed(dceip->graphics_dmif_size));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
934
data->memory_chunk_size_in_bytes[i] = bw_mul(bw_mul(bw_int_to_fixed(dceip->chunk_width), data->lines_interleaved_in_mem_access[i]), bw_int_to_fixed(data->bytes_per_pixel[i]));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
935
data->pipe_chunk_size_in_bytes[i] = bw_mul(bw_mul(bw_int_to_fixed(dceip->chunk_width), bw_int_to_fixed(dceip->lines_interleaved_into_lb)), bw_int_to_fixed(data->bytes_per_pixel[i]));
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
944
if (bw_ltn(bw_div(bw_div(bw_mul(data->data_buffer_size[i], data->bytes_per_request[i]), data->useful_bytes_per_request[i]), data->display_bandwidth[i]), data->min_dmif_size_in_time)) {
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
945
data->min_dmif_size_in_time = bw_div(bw_div(bw_mul(data->data_buffer_size[i], data->bytes_per_request[i]), data->useful_bytes_per_request[i]), data->display_bandwidth[i]);
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
949
if (bw_ltn(bw_div(bw_div(bw_mul(data->data_buffer_size[i], data->bytes_per_request[i]), data->useful_bytes_per_request[i]), data->display_bandwidth[i]), data->min_mcifwr_size_in_time)) {
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
950
data->min_mcifwr_size_in_time = bw_div(bw_div(bw_mul(data->data_buffer_size[i], data->bytes_per_request[i]), data->useful_bytes_per_request[i]), data->display_bandwidth[i]);
sys/dev/pci/drm/amd/display/dc/basics/dce_calcs.c
964
data->adjusted_data_buffer_size[i] = bw_min2(data->data_buffer_size[i], bw_ceil2(bw_mul(data->min_dmif_size_in_time, data->display_bandwidth[i]), data->memory_chunk_size_in_bytes[i]));
sys/dev/pci/drm/amd/display/dc/inc/bw_fixed.h
122
struct bw_fixed bw_mul(const struct bw_fixed arg1, const struct bw_fixed arg2);