sys/arch/sparc64/dev/pci_machdep.c

261

int bus_frequency, lt, cl, cacheline;

sys/arch/sparc64/dev/pci_machdep.c

275

cacheline = max(cacheinfo.ec_linesize, 64);

sys/arch/sparc64/dev/pci_machdep.c

328

cl = cacheline;

sys/dev/fdt/qcsmem.c

260

part->cacheline = pte->cacheline;

sys/dev/fdt/qcsmem.c

418

roundup(sizeof(*entry), part->cacheline);

sys/dev/fdt/qcsmem.c

443

roundup(sizeof(*entry), part->cacheline);

sys/dev/fdt/qcsmem.c

69

uint32_t cacheline;

sys/dev/fdt/qcsmem.c

95

size_t cacheline;

sys/dev/ic/ti.c

1123

u_int32_t cacheline;

sys/dev/ic/ti.c

1136

cacheline = CSR_READ_4(sc, TI_PCI_BIST) & 0xFF;

sys/dev/ic/ti.c

1145

switch(cacheline) {

sys/dev/pci/drm/i915/gt/intel_ring.h

111

GEM_BUG_ON(cacheline(tail) == cacheline(head) && tail < head);

sys/dev/pci/drm/i915/gt/selftest_timeline.c

110

cacheline = hwsp_cacheline(tl);

sys/dev/pci/drm/i915/gt/selftest_timeline.c

111

err = radix_tree_insert(&state->cachelines, cacheline, tl);

sys/dev/pci/drm/i915/gt/selftest_timeline.c

115

cacheline);

sys/dev/pci/drm/i915/gt/selftest_timeline.c

97

unsigned long cacheline;