CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X2
CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X2 |
CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X2 |
CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X2 |
CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X2 |
CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X2 |
adev->pm.pcie_mlw_mask |= (CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X2 |
pcie_width_mask & CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X2 ? 2 : 1;
| CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X2 \