CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X12
CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X12 |
CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X12 |
adev->pm.pcie_mlw_mask |= (CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X12 |
pcie_width_mask & CAIL_ASIC_PCIE_LINK_WIDTH_SUPPORT_X12 ? 12 :