bitmap_zero
bitmap_zero(b);
bitmap_zero(b);
bitmap_zero(adev->gfx.pipe_reserve_bitmap, AMDGPU_MAX_COMPUTE_QUEUES);
{ if (c) bitmap_zero(c->bmap, NAME##_BITMAP_BITS); } \
bitmap_zero(adev->gfx.me.queue_bitmap, AMDGPU_MAX_GFX_QUEUES);
bitmap_zero(adev->gfx.mec_bitmap[0].queue_bitmap, AMDGPU_MAX_COMPUTE_QUEUES);
bitmap_zero(adev->gfx.me.queue_bitmap, AMDGPU_MAX_GFX_QUEUES);
bitmap_zero(adev->gfx.mec_bitmap[0].queue_bitmap, AMDGPU_MAX_COMPUTE_QUEUES);
bitmap_zero(adev->gfx.me.queue_bitmap, AMDGPU_MAX_GFX_QUEUES);
bitmap_zero(adev->gfx.mec_bitmap[0].queue_bitmap, AMDGPU_MAX_COMPUTE_QUEUES);
bitmap_zero(adev->gfx.mec_bitmap[0].queue_bitmap, AMDGPU_MAX_COMPUTE_QUEUES);
bitmap_zero(adev->gfx.mec_bitmap[0].queue_bitmap, AMDGPU_MAX_COMPUTE_QUEUES);
bitmap_zero(adev->gfx.mec_bitmap[0].queue_bitmap, AMDGPU_MAX_COMPUTE_QUEUES);
bitmap_zero(adev->gfx.mec_bitmap[i].queue_bitmap,
bitmap_zero(kfd->device_info.reserved_sdma_queues_bitmap, KFD_MAX_SDMA_QUEUES);
bitmap_zero(dqm->sdma_bitmap, KFD_MAX_SDMA_QUEUES);
bitmap_zero(dqm->xgmi_sdma_bitmap, KFD_MAX_SDMA_QUEUES);
bitmap_zero(ctx->bitmap, MAX_GPU_INSTANCE);
bitmap_zero(bitmap_access, MAX_GPU_INSTANCE);
bitmap_zero(bitmap_aip, MAX_GPU_INSTANCE);
bitmap_zero(fea_cap->cap_map, SMU_FEATURE_CAP_ID__COUNT);
bitmap_zero(smu->smu_feature.supported, SMU_FEATURE_MAX);
bitmap_zero(smu->smu_feature.allowed, SMU_FEATURE_MAX);
bitmap_zero(feature->allowed, SMU_FEATURE_MAX);
bitmap_zero(dcp->memdesc_map, DCP_MAX_MAPPINGS);
bitmap_zero(mask->bits, POWER_DOMAIN_NUM);
bitmap_zero(power_domains->async_put_domains[1].bits,
bitmap_zero(s->shadow_ctx_desc_updated, I915_NUM_ENGINES);
bitmap_zero(s->tlb_handle_pending, I915_NUM_ENGINES);
bitmap_zero(b);
bitmap_zero(b);
void bitmap_zero(struct bitmap *b);