async
struct asr_query *async;
if (asr_run(eva->async, &ar)) {
event_asr_run(struct asr_query *async, void (*cb)(struct asr_result *, void *),
eva->async = async;
asr_abort(eva->async);
q->async = (cb != NULL || cb_event != NULL);
if(q->async)
q->async = 1;
log_assert(q->async);
int async;
log_assert(q->async);
if(!q || !q->async) {
log_assert(q->async);
int async)
sc, cmd, iecmdbuf, mask, IE_STAT_BITS, async?"a":"");
if (async) {
goto async;
async:
bool async;
adev->mode_info.funcs->page_flip(adev, work->crtc_id, work->base, work->async);
work->async = (page_flip_flags & DRM_MODE_PAGE_FLIP_ASYNC) != 0;
#define amdgpu_display_page_flip(adev, crtc, base, async) (adev)->mode_info.funcs->page_flip((adev), (crtc), (base), (async))
int crtc_id, u64 crtc_base, bool async);
int crtc_id, u64 crtc_base, bool async)
GRPH_SURFACE_UPDATE_H_RETRACE_EN, async ? 1 : 0);
int crtc_id, u64 crtc_base, bool async)
WREG32(mmGRPH_FLIP_CONTROL + amdgpu_crtc->crtc_offset, async ?
int crtc_id, u64 crtc_base, bool async)
WREG32(mmGRPH_FLIP_CONTROL + amdgpu_crtc->crtc_offset, async ?
struct dma_fence *__i915_vma_evict(struct i915_vma *vma, bool async)
GEM_WARN_ON(async && !vma->resource->bi.pages_rsgt);
if (async)
if (!async) {
struct dma_fence *__i915_vma_evict(struct i915_vma *vma, bool async);
bool async)
async ? EVERGREEN_GRPH_SURFACE_UPDATE_H_RETRACE_EN : 0);
void r100_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base, bool async)
void (*page_flip)(struct radeon_device *rdev, int crtc, u64 crtc_base, bool async);
#define radeon_page_flip(rdev, crtc, base, async) (rdev)->asic->pflip.page_flip((rdev), (crtc), (base), (async))
bool async;
u64 crtc_base, bool async);
u64 crtc_base, bool async);
bool async);
u64 crtc_base, bool async);
radeon_page_flip(rdev, radeon_crtc->crtc_id, work->base, work->async);
work->async = (page_flip_flags & DRM_MODE_PAGE_FLIP_ASYNC) != 0;
void rs600_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base, bool async)
async ? AVIVO_D1GRPH_SURFACE_UPDATE_H_RETRACE_EN : 0);
void rv770_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base, bool async)
async ? AVIVO_D1GRPH_SURFACE_UPDATE_H_RETRACE_EN : 0);
iwi_cmd(struct iwi_softc *sc, uint8_t type, void *data, uint8_t len, int async)
return async ? 0 : tsleep_nsec(sc, PCATCH, "iwicmd", SEC_TO_NSEC(1));
int idx, code, async, group_id;
async = hcmd->flags & IWM_CMD_ASYNC;
KASSERT(!async);
if (!async) {
int err, async = bgscan;
(async ? M_NOWAIT : M_WAIT) | M_CANFAIL | M_ZERO);
hcmd.flags |= async ? IWM_CMD_ASYNC : 0;
int err, async = bgscan;
(async ? M_NOWAIT : M_WAIT) | M_CANFAIL | M_ZERO);
hcmd.flags |= async ? IWM_CMD_ASYNC : 0;
iwm_setrates(struct iwm_node *in, int async)
cmd.flags = async ? IWM_CMD_ASYNC : 0;
iwn_cmd(struct iwn_softc *sc, int code, const void *buf, int size, int async)
return async ? 0 : tsleep_nsec(desc, PCATCH, "iwncmd", SEC_TO_NSEC(1));
iwn4965_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async)
return iwn_cmd(sc, IWN_CMD_ADD_NODE, &hnode, sizeof hnode, async);
iwn5000_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async)
return iwn_cmd(sc, IWN_CMD_ADD_NODE, node, sizeof (*node), async);
iwn_add_broadcast_node(struct iwn_softc *sc, int async, int ridx)
if ((error = ops->add_node(sc, &node, async)) != 0)
return iwn_cmd(sc, IWN_CMD_LINK_QUALITY, &linkq, sizeof linkq, async);
iwn4965_set_txpower(struct iwn_softc *sc, int async)
return iwn_cmd(sc, IWN_CMD_TXPOWER, &cmd, sizeof cmd, async);
iwn5000_set_txpower(struct iwn_softc *sc, int async)
return iwn_cmd(sc, IWN_CMD_TXPOWER_DBM, &cmd, sizeof cmd, async);
iwn_set_pslevel(struct iwn_softc *sc, int dtim, int level, int async)
return iwn_cmd(sc, IWN_CMD_SET_POWER_MODE, &cmd, sizeof cmd, async);
int idx, code, async, group_id;
async = hcmd->flags & IWX_CMD_ASYNC;
KASSERT(!async);
if (!async) {
iwx_set_pslevel(struct iwx_softc *sc, int dtim, int level, int async)
cmd_flags = async ? IWX_CMD_ASYNC : 0;
int err, async = bgscan, n_ssid = 0;
(async ? M_NOWAIT : M_WAIT) | M_CANFAIL | M_ZERO);
hcmd.flags |= async ? IWX_CMD_ASYNC : 0;
int err, async = bgscan, n_ssid = 0;
(async ? M_NOWAIT : M_WAIT) | M_CANFAIL | M_ZERO);
hcmd.flags |= async ? IWX_CMD_ASYNC : 0;
wpi_cmd(struct wpi_softc *sc, int code, const void *buf, int size, int async)
return async ? 0 : tsleep_nsec(cmd, PCATCH, "wpicmd", SEC_TO_NSEC(1));
wpi_set_txpower(struct wpi_softc *sc, int async)
return wpi_cmd(sc, WPI_CMD_TXPOWER, &cmd, sizeof cmd, async);
wpi_set_pslevel(struct wpi_softc *sc, int dtim, int level, int async)
return wpi_cmd(sc, WPI_CMD_SET_POWER_MODE, &cmd, sizeof cmd, async);
int pchan = 0, rchan = 0, async = 0;
async = 1;
async = 1;
async ? "async" : "sync",
bio_doread(struct vnode *vp, daddr_t blkno, int size, int async)
SET(bp->b_flags, B_READ | async);
} else if (async) {
if (async == 0)
int rv, async, wasdelayed, s;
async = ISSET(bp->b_flags, B_ASYNC);
if (!async && mp && ISSET(mp->mnt_flag, MNT_ASYNC)) {
if (async)
if (async)
boolean_t write, async;
async = (flags & B_ASYNC) != 0;
if (!async)
if (!async)
pflag = (async || curproc == uvm.pagedaemon_proc) ? PR_NOWAIT :
async = 0;
if (async) {
if (async)
external_exec(struct ifsd_external *external, int async)
if (!async) {
if (async)
if (async)
if (async)
if (async)
q->async = (cb != NULL || cb_event != NULL);
if(q->async)
q->async = 1;
log_assert(q->async);
int async;
log_assert(q->async);
if(!q || !q->async) {
log_assert(q->async);