sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

316

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5));

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

317

amdgpu_ring_write(kiq_ring,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

327

amdgpu_ring_write(kiq_ring,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

329

amdgpu_ring_write(kiq_ring, m->cp_mqd_base_addr_lo);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

330

amdgpu_ring_write(kiq_ring, m->cp_mqd_base_addr_hi);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

331

amdgpu_ring_write(kiq_ring, m->cp_hqd_pq_wptr_poll_addr_lo);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

332

amdgpu_ring_write(kiq_ring, m->cp_hqd_pq_wptr_poll_addr_hi);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

302

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5));

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

303

amdgpu_ring_write(kiq_ring,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

313

amdgpu_ring_write(kiq_ring,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

315

amdgpu_ring_write(kiq_ring, m->cp_mqd_base_addr_lo);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

316

amdgpu_ring_write(kiq_ring, m->cp_mqd_base_addr_hi);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

317

amdgpu_ring_write(kiq_ring, m->cp_hqd_pq_wptr_poll_addr_lo);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

318

amdgpu_ring_write(kiq_ring, m->cp_hqd_pq_wptr_poll_addr_hi);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

287

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5));

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

288

amdgpu_ring_write(kiq_ring,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

298

amdgpu_ring_write(kiq_ring,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

300

amdgpu_ring_write(kiq_ring, m->cp_mqd_base_addr_lo);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

301

amdgpu_ring_write(kiq_ring, m->cp_mqd_base_addr_hi);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

302

amdgpu_ring_write(kiq_ring, m->cp_hqd_pq_wptr_poll_addr_lo);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

303

amdgpu_ring_write(kiq_ring, m->cp_hqd_pq_wptr_poll_addr_hi);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

327

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5));

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

328

amdgpu_ring_write(kiq_ring,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

338

amdgpu_ring_write(kiq_ring,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

340

amdgpu_ring_write(kiq_ring, m->cp_mqd_base_addr_lo);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

341

amdgpu_ring_write(kiq_ring, m->cp_mqd_base_addr_hi);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

342

amdgpu_ring_write(kiq_ring, m->cp_hqd_pq_wptr_poll_addr_lo);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

343

amdgpu_ring_write(kiq_ring, m->cp_hqd_pq_wptr_poll_addr_hi);

sys/dev/pci/drm/amd/amdgpu/amdgpu_jpeg.c

171

amdgpu_ring_write(ring, PACKET0(adev->jpeg.internal.jpeg_pitch[ring->pipe], 0));

sys/dev/pci/drm/amd/amdgpu/amdgpu_jpeg.c

172

amdgpu_ring_write(ring, 0xABADCAFE);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ring.c

818

amdgpu_ring_write(ring, ring->ring_backup[i]);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vce.c

1073

amdgpu_ring_write(ring, VCE_CMD_IB);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vce.c

1074

amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/amdgpu_vce.c

1075

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/amdgpu_vce.c

1076

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vce.c

1093

amdgpu_ring_write(ring, VCE_CMD_FENCE);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vce.c

1094

amdgpu_ring_write(ring, addr);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vce.c

1095

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/amdgpu_vce.c

1096

amdgpu_ring_write(ring, seq);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vce.c

1097

amdgpu_ring_write(ring, VCE_CMD_TRAP);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vce.c

1098

amdgpu_ring_write(ring, VCE_CMD_END);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vce.c

1124

amdgpu_ring_write(ring, VCE_CMD_END);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vcn.c

569

amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.scratch9, 0));

sys/dev/pci/drm/amd/amdgpu/amdgpu_vcn.c

570

amdgpu_ring_write(ring, 0xDEADBEEF);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vcn.c

601

amdgpu_ring_write(ring, VCN_DEC_SW_CMD_END);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vcn.c

906

amdgpu_ring_write(ring, VCN_ENC_CMD_END);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.c

491

amdgpu_ring_write(ring, ring->funcs->nop |

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.c

494

amdgpu_ring_write(ring, ring->funcs->nop);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.c

519

amdgpu_ring_write(ring, VPE_CMD_HEADER(VPE_CMD_OPCODE_PRED_EXE, 0) |

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.c

521

amdgpu_ring_write(ring, exec_count & 0x1fff);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.c

532

amdgpu_ring_write(ring, VPE_CMD_HEADER(VPE_CMD_OPCODE_INDIRECT, 0) |

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.c

536

amdgpu_ring_write(ring, ib->gpu_addr & 0xffffffe0);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.c

537

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.c

538

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.c

539

amdgpu_ring_write(ring, lower_32_bits(csa_mc_addr));

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.c

540

amdgpu_ring_write(ring, upper_32_bits(csa_mc_addr));

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.c

550

amdgpu_ring_write(ring, VPE_CMD_HEADER(VPE_CMD_OPCODE_FENCE, 0));

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.c

553

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.c

554

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.c

555

amdgpu_ring_write(ring, i == 0 ? lower_32_bits(seq) : upper_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.c

561

amdgpu_ring_write(ring, VPE_CMD_HEADER(VPE_CMD_OPCODE_TRAP, 0));

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.c

562

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.c

575

amdgpu_ring_write(ring, VPE_CMD_HEADER(VPE_CMD_OPCODE_POLL_REGMEM,

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.c

579

amdgpu_ring_write(ring, addr & 0xfffffffc);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.c

580

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.c

581

amdgpu_ring_write(ring, seq); /* reference */

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.c

582

amdgpu_ring_write(ring, 0xffffffff); /* mask */

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.c

583

amdgpu_ring_write(ring, VPE_CMD_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) |

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.c

591

amdgpu_ring_write(ring, VPE_CMD_HEADER(VPE_CMD_OPCODE_REG_WRITE, 0));

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.c

592

amdgpu_ring_write(ring, reg << 2);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.c

593

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.c

601

amdgpu_ring_write(ring, VPE_CMD_HEADER(VPE_CMD_OPCODE_POLL_REGMEM,

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.c

605

amdgpu_ring_write(ring, reg << 2);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.c

606

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.c

607

amdgpu_ring_write(ring, val); /* reference */

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.c

608

amdgpu_ring_write(ring, mask); /* mask */

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.c

609

amdgpu_ring_write(ring, VPE_CMD_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) |

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.c

624

amdgpu_ring_write(ring, VPE_CMD_HEADER(VPE_CMD_OPCODE_COND_EXE, 0));

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.c

625

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.c

626

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.c

627

amdgpu_ring_write(ring, 1);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.c

629

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.c

797

amdgpu_ring_write(ring, VPE_CMD_HEADER(VPE_CMD_OPCODE_FENCE, 0));

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.c

798

amdgpu_ring_write(ring, lower_32_bits(wb_addr));

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.c

799

amdgpu_ring_write(ring, upper_32_bits(wb_addr));

sys/dev/pci/drm/amd/amdgpu/amdgpu_vpe.c

800

amdgpu_ring_write(ring, test_pattern);

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

206

amdgpu_ring_write(ring, ring->funcs->nop |

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

209

amdgpu_ring_write(ring, ring->funcs->nop);

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

233

amdgpu_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_INDIRECT_BUFFER, 0, extra_bits));

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

234

amdgpu_ring_write(ring, ib->gpu_addr & 0xffffffe0); /* base must be 32 byte aligned */

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

235

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr) & 0xffffffff);

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

236

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

258

amdgpu_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_POLL_REG_MEM, 0, extra_bits));

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

259

amdgpu_ring_write(ring, mmGPU_HDP_FLUSH_DONE << 2);

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

260

amdgpu_ring_write(ring, mmGPU_HDP_FLUSH_REQ << 2);

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

261

amdgpu_ring_write(ring, ref_and_mask); /* reference */

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

262

amdgpu_ring_write(ring, ref_and_mask); /* mask */

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

263

amdgpu_ring_write(ring, (0xfff << 16) | 10); /* retry count, poll interval */

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

283

amdgpu_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_FENCE, 0, 0));

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

284

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

285

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

286

amdgpu_ring_write(ring, lower_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

291

amdgpu_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_FENCE, 0, 0));

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

292

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

293

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

294

amdgpu_ring_write(ring, upper_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

298

amdgpu_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_TRAP, 0, 0));

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

621

amdgpu_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_WRITE, SDMA_WRITE_SUB_OPCODE_LINEAR, 0));

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

622

amdgpu_ring_write(ring, lower_32_bits(gpu_addr));

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

623

amdgpu_ring_write(ring, upper_32_bits(gpu_addr));

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

624

amdgpu_ring_write(ring, 1); /* number of DWs to follow */

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

625

amdgpu_ring_write(ring, 0xDEADBEEF);

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

828

amdgpu_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_POLL_REG_MEM, 0,

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

832

amdgpu_ring_write(ring, addr & 0xfffffffc);

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

833

amdgpu_ring_write(ring, upper_32_bits(addr) & 0xffffffff);

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

834

amdgpu_ring_write(ring, seq); /* reference */

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

835

amdgpu_ring_write(ring, 0xffffffff); /* mask */

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

836

amdgpu_ring_write(ring, (0xfff << 16) | 4); /* retry count, poll interval */

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

857

amdgpu_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_POLL_REG_MEM, 0, extra_bits));

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

858

amdgpu_ring_write(ring, mmVM_INVALIDATE_REQUEST << 2);

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

859

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

860

amdgpu_ring_write(ring, 0); /* reference */

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

861

amdgpu_ring_write(ring, 0); /* mask */

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

862

amdgpu_ring_write(ring, (0xfff << 16) | 10); /* retry count, poll interval */

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

868

amdgpu_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_SRBM_WRITE, 0, 0xf000));

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

869

amdgpu_ring_write(ring, reg);

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

870

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3715

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_RESOURCES, 6));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3716

amdgpu_ring_write(kiq_ring, PACKET3_SET_RESOURCES_VMID_MASK(0) |

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3718

amdgpu_ring_write(kiq_ring, lower_32_bits(queue_mask)); /* queue mask lo */

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3719

amdgpu_ring_write(kiq_ring, upper_32_bits(queue_mask)); /* queue mask hi */

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3720

amdgpu_ring_write(kiq_ring, lower_32_bits(shader_mc_addr)); /* cleaner shader addr lo */

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3721

amdgpu_ring_write(kiq_ring, upper_32_bits(shader_mc_addr)); /* cleaner shader addr hi */

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3722

amdgpu_ring_write(kiq_ring, 0); /* oac mask */

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3723

amdgpu_ring_write(kiq_ring, 0); /* gds heap base:0, gds heap size:0 */

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3747

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3749

amdgpu_ring_write(kiq_ring, /* Q_sel: 0, vmid: 0, engine: 0, num_Q: 1 */

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3759

amdgpu_ring_write(kiq_ring, PACKET3_MAP_QUEUES_DOORBELL_OFFSET(ring->doorbell_index));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3760

amdgpu_ring_write(kiq_ring, lower_32_bits(mqd_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3761

amdgpu_ring_write(kiq_ring, upper_32_bits(mqd_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3762

amdgpu_ring_write(kiq_ring, lower_32_bits(wptr_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3763

amdgpu_ring_write(kiq_ring, upper_32_bits(wptr_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3773

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_UNMAP_QUEUES, 4));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3774

amdgpu_ring_write(kiq_ring, /* Q_sel: 0, vmid: 0, engine: 0, num_Q: 1 */

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3779

amdgpu_ring_write(kiq_ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3783

amdgpu_ring_write(kiq_ring, lower_32_bits(gpu_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3784

amdgpu_ring_write(kiq_ring, upper_32_bits(gpu_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3785

amdgpu_ring_write(kiq_ring, seq);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3787

amdgpu_ring_write(kiq_ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3788

amdgpu_ring_write(kiq_ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3789

amdgpu_ring_write(kiq_ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3800

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_QUERY_STATUS, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3801

amdgpu_ring_write(kiq_ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3805

amdgpu_ring_write(kiq_ring, /* Q_sel: 0, vmid: 0, engine: 0, num_Q: 1 */

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3808

amdgpu_ring_write(kiq_ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3809

amdgpu_ring_write(kiq_ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3810

amdgpu_ring_write(kiq_ring, lower_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

3811

amdgpu_ring_write(kiq_ring, upper_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4003

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4004

amdgpu_ring_write(ring, WRITE_DATA_ENGINE_SEL(eng_sel) |

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4006

amdgpu_ring_write(ring, reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4007

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4008

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4016

amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4017

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4026

amdgpu_ring_write(ring, addr0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4027

amdgpu_ring_write(ring, addr1);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4028

amdgpu_ring_write(ring, ref);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4029

amdgpu_ring_write(ring, mask);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4030

amdgpu_ring_write(ring, inv); /* poll interval */

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4049

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4050

amdgpu_ring_write(ring, scratch -

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

4052

amdgpu_ring_write(ring, 0xDEADBEEF);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6385

amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6386

amdgpu_ring_write(ring, PACKET3_PREAMBLE_BEGIN_CLEAR_STATE);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6388

amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6389

amdgpu_ring_write(ring, 0x80000000);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6390

amdgpu_ring_write(ring, 0x80000000);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6395

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6398

amdgpu_ring_write(ring, ext->reg_index -

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6401

amdgpu_ring_write(ring, ext->extent[i]);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6408

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6409

amdgpu_ring_write(ring, ctx_reg_offset);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6410

amdgpu_ring_write(ring, adev->gfx.config.pa_sc_tile_steering_override);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6412

amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6413

amdgpu_ring_write(ring, PACKET3_PREAMBLE_END_CLEAR_STATE);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6415

amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6416

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6418

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6419

amdgpu_ring_write(ring, PACKET3_BASE_INDEX(CE_PARTITION_BASE));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6420

amdgpu_ring_write(ring, 0x8000);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6421

amdgpu_ring_write(ring, 0x8000);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6435

amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

6436

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8667

amdgpu_ring_write(ring, header);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8669

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8674

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8675

amdgpu_ring_write(ring, control);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8697

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8698

amdgpu_ring_write(ring, mmGDS_COMPUTE_MAX_WAVE_ID);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8699

amdgpu_ring_write(ring, ring->adev->gds.gds_compute_max_wave_id);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8702

amdgpu_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8704

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8709

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8710

amdgpu_ring_write(ring, control);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8720

amdgpu_ring_write(ring, PACKET3(PACKET3_RELEASE_MEM, 6));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8721

amdgpu_ring_write(ring, (PACKET3_RELEASE_MEM_GCR_SEQ |

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8728

amdgpu_ring_write(ring, (PACKET3_RELEASE_MEM_DATA_SEL(write64bit ? 2 : 1) |

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8739

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8740

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8741

amdgpu_ring_write(ring, lower_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8742

amdgpu_ring_write(ring, upper_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8743

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8760

amdgpu_ring_write(ring, PACKET3(PACKET3_INVALIDATE_TLBS, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8761

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8776

amdgpu_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8777

amdgpu_ring_write(ring, 0x0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8790

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8791

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8793

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8794

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8795

amdgpu_ring_write(ring, lower_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8799

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8800

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8802

amdgpu_ring_write(ring, SOC15_REG_OFFSET(GC, 0, mmCPC_INT_STATUS));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8803

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8804

amdgpu_ring_write(ring, 0x20000000); /* src_id is 178 */

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8810

amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8811

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8843

amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8844

amdgpu_ring_write(ring, dw2);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8845

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8853

amdgpu_ring_write(ring, PACKET3(PACKET3_COND_EXEC, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8854

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8855

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8857

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8860

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8926

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8927

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(2) |

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8931

amdgpu_ring_write(ring, lower_32_bits(ce_payload_gpu_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8932

amdgpu_ring_write(ring, upper_32_bits(ce_payload_gpu_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8962

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8963

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(1) |

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8967

amdgpu_ring_write(ring, lower_32_bits(de_payload_gpu_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8968

amdgpu_ring_write(ring, upper_32_bits(de_payload_gpu_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8983

amdgpu_ring_write(ring, PACKET3(PACKET3_FRAME_CONTROL, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8984

amdgpu_ring_write(ring, v | FRAME_CMD(start ? 0 : 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8992

amdgpu_ring_write(ring, PACKET3(PACKET3_COPY_DATA, 4));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8993

amdgpu_ring_write(ring, 0 | /* src: register*/

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8996

amdgpu_ring_write(ring, reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8997

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8998

amdgpu_ring_write(ring, lower_32_bits(adev->wb.gpu_addr +

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9000

amdgpu_ring_write(ring, upper_32_bits(adev->wb.gpu_addr +

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9020

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9021

amdgpu_ring_write(ring, cmd);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9022

amdgpu_ring_write(ring, reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9023

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9024

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9487

amdgpu_ring_write(ring, PACKET3(PACKET3_ACQUIRE_MEM, 6));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9488

amdgpu_ring_write(ring, 0); /* CP_COHER_CNTL */

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9489

amdgpu_ring_write(ring, 0xffffffff); /* CP_COHER_SIZE */

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9490

amdgpu_ring_write(ring, 0xffffff); /* CP_COHER_SIZE_HI */

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9491

amdgpu_ring_write(ring, 0); /* CP_COHER_BASE */

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9492

amdgpu_ring_write(ring, 0); /* CP_COHER_BASE_HI */

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9493

amdgpu_ring_write(ring, 0x0000000A); /* POLL_INTERVAL */

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9494

amdgpu_ring_write(ring, gcr_cntl); /* GCR_CNTL */

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9501

amdgpu_ring_write(ring, ring->funcs->nop);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9506

amdgpu_ring_write(ring, PACKET3(PACKET3_NOP, min(num_nop - 2, 0x3ffe)));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9792

amdgpu_ring_write(ring, PACKET3(PACKET3_RUN_CLEANER_SHADER, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9793

amdgpu_ring_write(ring, 0); /* RESERVED field, programmed to zero */

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

355

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_RESOURCES, 6));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

356

amdgpu_ring_write(kiq_ring, PACKET3_SET_RESOURCES_VMID_MASK(0) |

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

359

amdgpu_ring_write(kiq_ring, lower_32_bits(queue_mask)); /* queue mask lo */

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

360

amdgpu_ring_write(kiq_ring, upper_32_bits(queue_mask)); /* queue mask hi */

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

361

amdgpu_ring_write(kiq_ring, lower_32_bits(shader_mc_addr)); /* cleaner shader addr lo */

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

362

amdgpu_ring_write(kiq_ring, upper_32_bits(shader_mc_addr)); /* cleaner shader addr hi */

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3624

amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3625

amdgpu_ring_write(ring, PACKET3_PREAMBLE_BEGIN_CLEAR_STATE);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3627

amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3628

amdgpu_ring_write(ring, 0x80000000);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3629

amdgpu_ring_write(ring, 0x80000000);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

363

amdgpu_ring_write(kiq_ring, 0); /* oac mask */

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3634

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3637

amdgpu_ring_write(ring, ext->reg_index -

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

364

amdgpu_ring_write(kiq_ring, 0); /* gds heap base:0, gds heap size:0 */

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3640

amdgpu_ring_write(ring, ext->extent[i]);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3647

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3648

amdgpu_ring_write(ring, ctx_reg_offset);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3649

amdgpu_ring_write(ring, adev->gfx.config.pa_sc_tile_steering_override);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3651

amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3652

amdgpu_ring_write(ring, PACKET3_PREAMBLE_END_CLEAR_STATE);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3654

amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3655

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3669

amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

3670

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

391

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

393

amdgpu_ring_write(kiq_ring, /* Q_sel: 0, vmid: 0, engine: 0, num_Q: 1 */

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

403

amdgpu_ring_write(kiq_ring, PACKET3_MAP_QUEUES_DOORBELL_OFFSET(ring->doorbell_index));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

404

amdgpu_ring_write(kiq_ring, lower_32_bits(mqd_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

405

amdgpu_ring_write(kiq_ring, upper_32_bits(mqd_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

406

amdgpu_ring_write(kiq_ring, lower_32_bits(wptr_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

407

amdgpu_ring_write(kiq_ring, upper_32_bits(wptr_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

423

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_UNMAP_QUEUES, 4));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

424

amdgpu_ring_write(kiq_ring, /* Q_sel: 0, vmid: 0, engine: 0, num_Q: 1 */

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

429

amdgpu_ring_write(kiq_ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

433

amdgpu_ring_write(kiq_ring, lower_32_bits(gpu_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

434

amdgpu_ring_write(kiq_ring, upper_32_bits(gpu_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

435

amdgpu_ring_write(kiq_ring, seq);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

437

amdgpu_ring_write(kiq_ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

438

amdgpu_ring_write(kiq_ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

439

amdgpu_ring_write(kiq_ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

450

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_QUERY_STATUS, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

451

amdgpu_ring_write(kiq_ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

455

amdgpu_ring_write(kiq_ring, /* Q_sel: 0, vmid: 0, engine: 0, num_Q: 1 */

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

458

amdgpu_ring_write(kiq_ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

459

amdgpu_ring_write(kiq_ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

460

amdgpu_ring_write(kiq_ring, lower_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

461

amdgpu_ring_write(kiq_ring, upper_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

513

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

514

amdgpu_ring_write(ring, WRITE_DATA_ENGINE_SEL(eng_sel) |

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

516

amdgpu_ring_write(ring, reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

517

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

518

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

526

amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

527

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

536

amdgpu_ring_write(ring, addr0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

537

amdgpu_ring_write(ring, addr1);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

538

amdgpu_ring_write(ring, ref);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

539

amdgpu_ring_write(ring, mask);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

540

amdgpu_ring_write(ring, inv); /* poll interval */

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

547

amdgpu_ring_write(ring, ring->funcs->nop);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

552

amdgpu_ring_write(ring, PACKET3(PACKET3_NOP, min(num_nop - 2, 0x3ffe)));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

577

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

578

amdgpu_ring_write(ring, scratch -

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

580

amdgpu_ring_write(ring, 0xDEADBEEF);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5882

amdgpu_ring_write(ring, header);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5884

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5889

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5890

amdgpu_ring_write(ring, control);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5912

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5913

amdgpu_ring_write(ring, regGDS_COMPUTE_MAX_WAVE_ID);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5914

amdgpu_ring_write(ring, ring->adev->gds.gds_compute_max_wave_id);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5917

amdgpu_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5919

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5924

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5925

amdgpu_ring_write(ring, control);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5935

amdgpu_ring_write(ring, PACKET3(PACKET3_RELEASE_MEM, 6));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5936

amdgpu_ring_write(ring, (PACKET3_RELEASE_MEM_GCR_SEQ |

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5943

amdgpu_ring_write(ring, (PACKET3_RELEASE_MEM_DATA_SEL(write64bit ? 2 : 1) |

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5954

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5955

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5956

amdgpu_ring_write(ring, lower_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5957

amdgpu_ring_write(ring, upper_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5958

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5975

amdgpu_ring_write(ring, PACKET3(PACKET3_INVALIDATE_TLBS, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5976

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5991

amdgpu_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5992

amdgpu_ring_write(ring, 0x0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6011

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6012

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6014

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6015

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6016

amdgpu_ring_write(ring, lower_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6020

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6021

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6023

amdgpu_ring_write(ring, SOC15_REG_OFFSET(GC, 0, regCPC_INT_STATUS));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6024

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6025

amdgpu_ring_write(ring, 0x20000000); /* src_id is 178 */

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6044

amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6045

amdgpu_ring_write(ring, dw2);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6046

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6054

amdgpu_ring_write(ring, PACKET3(PACKET3_COND_EXEC, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6055

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6056

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6058

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6061

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6089

amdgpu_ring_write(ring, PACKET3(PACKET3_NOP, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6097

amdgpu_ring_write(ring, shadow_va ? 1 : 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6098

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6117

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6118

amdgpu_ring_write(ring, WRITE_DATA_DST_SEL(5) | WR_CONFIRM);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6119

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6120

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6121

amdgpu_ring_write(ring, 0x1);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6124

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_Q_PREEMPTION_MODE, 7));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6125

amdgpu_ring_write(ring, lower_32_bits(shadow_va));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6126

amdgpu_ring_write(ring, upper_32_bits(shadow_va));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6127

amdgpu_ring_write(ring, lower_32_bits(gds_va));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6128

amdgpu_ring_write(ring, upper_32_bits(gds_va));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6129

amdgpu_ring_write(ring, lower_32_bits(csa_va));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6130

amdgpu_ring_write(ring, upper_32_bits(csa_va));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6131

amdgpu_ring_write(ring, shadow_va ?

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6133

amdgpu_ring_write(ring, init_shadow ?

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6227

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6228

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(1) |

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6232

amdgpu_ring_write(ring, lower_32_bits(de_payload_gpu_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6233

amdgpu_ring_write(ring, upper_32_bits(de_payload_gpu_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6248

amdgpu_ring_write(ring, PACKET3(PACKET3_FRAME_CONTROL, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6249

amdgpu_ring_write(ring, v | FRAME_CMD(start ? 0 : 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6257

amdgpu_ring_write(ring, PACKET3(PACKET3_COPY_DATA, 4));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6258

amdgpu_ring_write(ring, 0 | /* src: register*/

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6261

amdgpu_ring_write(ring, reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6262

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6263

amdgpu_ring_write(ring, lower_32_bits(adev->wb.gpu_addr +

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6265

amdgpu_ring_write(ring, upper_32_bits(adev->wb.gpu_addr +

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6285

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6286

amdgpu_ring_write(ring, cmd);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6287

amdgpu_ring_write(ring, reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6288

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6289

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6748

amdgpu_ring_write(ring, PACKET3(PACKET3_ACQUIRE_MEM, 6));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6749

amdgpu_ring_write(ring, 0); /* CP_COHER_CNTL */

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6750

amdgpu_ring_write(ring, 0xffffffff); /* CP_COHER_SIZE */

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6751

amdgpu_ring_write(ring, 0xffffff); /* CP_COHER_SIZE_HI */

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6752

amdgpu_ring_write(ring, 0); /* CP_COHER_BASE */

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6753

amdgpu_ring_write(ring, 0); /* CP_COHER_BASE_HI */

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6754

amdgpu_ring_write(ring, 0x0000000A); /* POLL_INTERVAL */

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6755

amdgpu_ring_write(ring, gcr_cntl); /* GCR_CNTL */

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

7163

amdgpu_ring_write(ring, PACKET3(PACKET3_RUN_CLEANER_SHADER, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

7164

amdgpu_ring_write(ring, 0); /* RESERVED field, programmed to zero */

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

295

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_RESOURCES, 6));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

296

amdgpu_ring_write(kiq_ring, PACKET3_SET_RESOURCES_VMID_MASK(0) |

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

298

amdgpu_ring_write(kiq_ring, lower_32_bits(queue_mask)); /* queue mask lo */

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

299

amdgpu_ring_write(kiq_ring, upper_32_bits(queue_mask)); /* queue mask hi */

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

300

amdgpu_ring_write(kiq_ring, 0); /* gws mask lo */

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

301

amdgpu_ring_write(kiq_ring, 0); /* gws mask hi */

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

302

amdgpu_ring_write(kiq_ring, 0); /* oac mask */

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

303

amdgpu_ring_write(kiq_ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

330

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

332

amdgpu_ring_write(kiq_ring, /* Q_sel: 0, vmid: 0, engine: 0, num_Q: 1 */

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

342

amdgpu_ring_write(kiq_ring, PACKET3_MAP_QUEUES_DOORBELL_OFFSET(ring->doorbell_index));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

343

amdgpu_ring_write(kiq_ring, lower_32_bits(mqd_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

344

amdgpu_ring_write(kiq_ring, upper_32_bits(mqd_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

345

amdgpu_ring_write(kiq_ring, lower_32_bits(wptr_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

346

amdgpu_ring_write(kiq_ring, upper_32_bits(wptr_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

362

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_UNMAP_QUEUES, 4));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

363

amdgpu_ring_write(kiq_ring, /* Q_sel: 0, vmid: 0, engine: 0, num_Q: 1 */

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

368

amdgpu_ring_write(kiq_ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

372

amdgpu_ring_write(kiq_ring, lower_32_bits(gpu_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

373

amdgpu_ring_write(kiq_ring, upper_32_bits(gpu_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

374

amdgpu_ring_write(kiq_ring, seq);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

376

amdgpu_ring_write(kiq_ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

377

amdgpu_ring_write(kiq_ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

378

amdgpu_ring_write(kiq_ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

388

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_QUERY_STATUS, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

389

amdgpu_ring_write(kiq_ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

393

amdgpu_ring_write(kiq_ring, /* Q_sel: 0, vmid: 0, engine: 0, num_Q: 1 */

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

396

amdgpu_ring_write(kiq_ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

397

amdgpu_ring_write(kiq_ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

398

amdgpu_ring_write(kiq_ring, lower_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

399

amdgpu_ring_write(kiq_ring, upper_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

433

amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

434

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4426

amdgpu_ring_write(ring, header);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4428

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

443

amdgpu_ring_write(ring, addr0);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4433

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4434

amdgpu_ring_write(ring, control);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

444

amdgpu_ring_write(ring, addr1);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4445

amdgpu_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4447

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

445

amdgpu_ring_write(ring, ref);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4452

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4453

amdgpu_ring_write(ring, control);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

446

amdgpu_ring_write(ring, mask);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4463

amdgpu_ring_write(ring, PACKET3(PACKET3_RELEASE_MEM, 6));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4464

amdgpu_ring_write(ring, (PACKET3_RELEASE_MEM_GCR_SEQ |

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4469

amdgpu_ring_write(ring, (PACKET3_RELEASE_MEM_DATA_SEL(write64bit ? 2 : 1) |

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

447

amdgpu_ring_write(ring, inv); /* poll interval */

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4480

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4481

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4482

amdgpu_ring_write(ring, lower_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4483

amdgpu_ring_write(ring, upper_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4484

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4501

amdgpu_ring_write(ring, PACKET3(PACKET3_INVALIDATE_TLBS, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4502

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4517

amdgpu_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4518

amdgpu_ring_write(ring, 0x0);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4531

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4532

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4534

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4535

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4536

amdgpu_ring_write(ring, lower_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4540

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4541

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4543

amdgpu_ring_write(ring, SOC15_REG_OFFSET(GC, 0, regCPC_INT_STATUS));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4544

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4545

amdgpu_ring_write(ring, 0x20000000); /* src_id is 178 */

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4564

amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4565

amdgpu_ring_write(ring, dw2);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4566

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4574

amdgpu_ring_write(ring, PACKET3(PACKET3_COND_EXEC, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4575

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4576

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4578

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4581

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4641

amdgpu_ring_write(ring, PACKET3(PACKET3_COPY_DATA, 4));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4642

amdgpu_ring_write(ring, 0 | /* src: register*/

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4645

amdgpu_ring_write(ring, reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4646

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4647

amdgpu_ring_write(ring, lower_32_bits(adev->wb.gpu_addr +

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4649

amdgpu_ring_write(ring, upper_32_bits(adev->wb.gpu_addr +

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4670

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4671

amdgpu_ring_write(ring, cmd);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4672

amdgpu_ring_write(ring, reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4673

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4674

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

470

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

471

amdgpu_ring_write(ring, scratch -

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

473

amdgpu_ring_write(ring, 0xDEADBEEF);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

5070

amdgpu_ring_write(ring, PACKET3(PACKET3_ACQUIRE_MEM, 6));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

5071

amdgpu_ring_write(ring, 0); /* CP_COHER_CNTL */

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

5072

amdgpu_ring_write(ring, 0xffffffff); /* CP_COHER_SIZE */

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

5073

amdgpu_ring_write(ring, 0xffffff); /* CP_COHER_SIZE_HI */

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

5074

amdgpu_ring_write(ring, 0); /* CP_COHER_BASE */

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

5075

amdgpu_ring_write(ring, 0); /* CP_COHER_BASE_HI */

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

5076

amdgpu_ring_write(ring, 0x0000000A); /* POLL_INTERVAL */

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

5077

amdgpu_ring_write(ring, gcr_cntl); /* GCR_CNTL */

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

5084

amdgpu_ring_write(ring, ring->funcs->nop);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

5089

amdgpu_ring_write(ring, PACKET3(PACKET3_NOP, min(num_nop - 2, 0x3ffe)));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

5098

amdgpu_ring_write(ring, PACKET3(PACKET3_RUN_CLEANER_SHADER, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

5099

amdgpu_ring_write(ring, 0); /* RESERVED field, programmed to zero */

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1801

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1802

amdgpu_ring_write(ring, mmSCRATCH_REG0 - PACKET3_SET_CONFIG_REG_START);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1803

amdgpu_ring_write(ring, 0xDEADBEEF);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1820

amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1821

amdgpu_ring_write(ring, EVENT_TYPE(VGT_FLUSH) |

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1831

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1832

amdgpu_ring_write(ring, (mmCP_COHER_CNTL2 - PACKET3_SET_CONFIG_REG_START));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1833

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1834

amdgpu_ring_write(ring, PACKET3(PACKET3_SURFACE_SYNC, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1835

amdgpu_ring_write(ring, PACKET3_TCL1_ACTION_ENA |

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1839

amdgpu_ring_write(ring, 0xFFFFFFFF);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1840

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1841

amdgpu_ring_write(ring, 10); /* poll interval */

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1843

amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1844

amdgpu_ring_write(ring, EVENT_TYPE(CACHE_FLUSH_AND_INV_TS_EVENT) | EVENT_INDEX(5));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1845

amdgpu_ring_write(ring, addr & 0xfffffffc);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1846

amdgpu_ring_write(ring, (upper_32_bits(addr) & 0xffff) |

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1849

amdgpu_ring_write(ring, lower_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1850

amdgpu_ring_write(ring, upper_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1863

amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1864

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1874

amdgpu_ring_write(ring, header);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1875

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1880

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr) & 0xFFFF);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1881

amdgpu_ring_write(ring, control);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2016

amdgpu_ring_write(ring, PACKET3(PACKET3_ME_INITIALIZE, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2017

amdgpu_ring_write(ring, 0x1);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2018

amdgpu_ring_write(ring, 0x0);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2019

amdgpu_ring_write(ring, adev->gfx.config.max_hw_contexts - 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2020

amdgpu_ring_write(ring, PACKET3_ME_INITIALIZE_DEVICE_ID(1));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2021

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2022

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2024

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2025

amdgpu_ring_write(ring, PACKET3_BASE_INDEX(CE_PARTITION_BASE));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2026

amdgpu_ring_write(ring, 0xc000);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2027

amdgpu_ring_write(ring, 0xe000);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2038

amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2039

amdgpu_ring_write(ring, PACKET3_PREAMBLE_BEGIN_CLEAR_STATE);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2044

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2046

amdgpu_ring_write(ring, ext->reg_index - PACKET3_SET_CONTEXT_REG_START);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2048

amdgpu_ring_write(ring, ext->extent[i]);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2053

amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2054

amdgpu_ring_write(ring, PACKET3_PREAMBLE_END_CLEAR_STATE);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2056

amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2057

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2059

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2060

amdgpu_ring_write(ring, 0x00000316);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2061

amdgpu_ring_write(ring, 0x0000000e);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2062

amdgpu_ring_write(ring, 0x00000010);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2292

amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2293

amdgpu_ring_write(ring, (WAIT_REG_MEM_MEM_SPACE(1) | /* memory */

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2296

amdgpu_ring_write(ring, addr & 0xfffffffc);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2297

amdgpu_ring_write(ring, upper_32_bits(addr) & 0xffffffff);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2298

amdgpu_ring_write(ring, seq);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2299

amdgpu_ring_write(ring, 0xffffffff);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2300

amdgpu_ring_write(ring, 4); /* poll interval */

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2304

amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2305

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2306

amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2307

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2319

amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2320

amdgpu_ring_write(ring, (WAIT_REG_MEM_FUNCTION(0) | /* always */

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2322

amdgpu_ring_write(ring, mmVM_INVALIDATE_REQUEST);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2323

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2324

amdgpu_ring_write(ring, 0); /* ref */

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2325

amdgpu_ring_write(ring, 0); /* mask */

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2326

amdgpu_ring_write(ring, 0x20); /* poll interval */

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2330

amdgpu_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2331

amdgpu_ring_write(ring, 0x0);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2334

amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2335

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2336

amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2337

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2346

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2347

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(usepfp) |

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2349

amdgpu_ring_write(ring, reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2350

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2351

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2937

amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2938

amdgpu_ring_write(ring, 0x80000000);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

2939

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

3428

amdgpu_ring_write(ring, PACKET3(PACKET3_SURFACE_SYNC, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

3429

amdgpu_ring_write(ring, PACKET3_TCL1_ACTION_ENA |

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

3433

amdgpu_ring_write(ring, 0xffffffff); /* CP_COHER_SIZE */

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

3434

amdgpu_ring_write(ring, 0); /* CP_COHER_BASE */

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

3435

amdgpu_ring_write(ring, 0x0000000A); /* poll interval */

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2045

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2046

amdgpu_ring_write(ring, mmSCRATCH_REG0 - PACKET3_SET_UCONFIG_REG_START);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2047

amdgpu_ring_write(ring, 0xDEADBEEF);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2088

amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2089

amdgpu_ring_write(ring, (WAIT_REG_MEM_OPERATION(1) | /* write, wait, write */

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2092

amdgpu_ring_write(ring, mmGPU_HDP_FLUSH_REQ);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2093

amdgpu_ring_write(ring, mmGPU_HDP_FLUSH_DONE);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2094

amdgpu_ring_write(ring, ref_and_mask);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2095

amdgpu_ring_write(ring, ref_and_mask);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2096

amdgpu_ring_write(ring, 0x20); /* poll interval */

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2101

amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2102

amdgpu_ring_write(ring, EVENT_TYPE(VS_PARTIAL_FLUSH) |

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2105

amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2106

amdgpu_ring_write(ring, EVENT_TYPE(VGT_FLUSH) |

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2131

amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2132

amdgpu_ring_write(ring, (EOP_TCL1_ACTION_EN |

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2136

amdgpu_ring_write(ring, addr & 0xfffffffc);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2137

amdgpu_ring_write(ring, (upper_32_bits(addr) & 0xffff) |

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2139

amdgpu_ring_write(ring, lower_32_bits(seq - 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2140

amdgpu_ring_write(ring, upper_32_bits(seq - 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2143

amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2144

amdgpu_ring_write(ring, (EOP_TCL1_ACTION_EN |

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2149

amdgpu_ring_write(ring, addr & 0xfffffffc);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2150

amdgpu_ring_write(ring, (upper_32_bits(addr) & 0xffff) |

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2152

amdgpu_ring_write(ring, lower_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2153

amdgpu_ring_write(ring, upper_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2175

amdgpu_ring_write(ring, PACKET3(PACKET3_RELEASE_MEM, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2176

amdgpu_ring_write(ring, (EOP_TCL1_ACTION_EN |

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2180

amdgpu_ring_write(ring, DATA_SEL(write64bit ? 2 : 1) | INT_SEL(int_sel ? 2 : 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2181

amdgpu_ring_write(ring, addr & 0xfffffffc);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2182

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2183

amdgpu_ring_write(ring, lower_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2184

amdgpu_ring_write(ring, upper_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2214

amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2215

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2225

amdgpu_ring_write(ring, header);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2226

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2231

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr) & 0xFFFF);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2232

amdgpu_ring_write(ring, control);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2254

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2255

amdgpu_ring_write(ring, mmGDS_COMPUTE_MAX_WAVE_ID - PACKET3_SET_CONFIG_REG_START);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2256

amdgpu_ring_write(ring, ring->adev->gds.gds_compute_max_wave_id);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2259

amdgpu_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2260

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2265

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr) & 0xFFFF);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2266

amdgpu_ring_write(ring, control);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2284

amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2285

amdgpu_ring_write(ring, dw2);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2286

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2481

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2482

amdgpu_ring_write(ring, PACKET3_BASE_INDEX(CE_PARTITION_BASE));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2483

amdgpu_ring_write(ring, 0x8000);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2484

amdgpu_ring_write(ring, 0x8000);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2487

amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2488

amdgpu_ring_write(ring, PACKET3_PREAMBLE_BEGIN_CLEAR_STATE);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2490

amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2491

amdgpu_ring_write(ring, 0x80000000);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2492

amdgpu_ring_write(ring, 0x80000000);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2497

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2499

amdgpu_ring_write(ring, ext->reg_index - PACKET3_SET_CONTEXT_REG_START);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2501

amdgpu_ring_write(ring, ext->extent[i]);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2506

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2507

amdgpu_ring_write(ring, mmPA_SC_RASTER_CONFIG - PACKET3_SET_CONTEXT_REG_START);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2508

amdgpu_ring_write(ring, adev->gfx.config.rb_config[0][0].raster_config);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2509

amdgpu_ring_write(ring, adev->gfx.config.rb_config[0][0].raster_config_1);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2511

amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2512

amdgpu_ring_write(ring, PACKET3_PREAMBLE_END_CLEAR_STATE);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2514

amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2515

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2517

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2518

amdgpu_ring_write(ring, 0x00000316);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2519

amdgpu_ring_write(ring, 0x0000000e); /* VGT_VERTEX_REUSE_BLOCK_CNTL */

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2520

amdgpu_ring_write(ring, 0x00000010); /* VGT_OUT_DEALLOC_CNTL */

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3112

amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3113

amdgpu_ring_write(ring, (WAIT_REG_MEM_MEM_SPACE(1) | /* memory */

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3116

amdgpu_ring_write(ring, addr & 0xfffffffc);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3117

amdgpu_ring_write(ring, upper_32_bits(addr) & 0xffffffff);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3118

amdgpu_ring_write(ring, seq);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3119

amdgpu_ring_write(ring, 0xffffffff);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3120

amdgpu_ring_write(ring, 4); /* poll interval */

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3124

amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3125

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3126

amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3127

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3155

amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3156

amdgpu_ring_write(ring, (WAIT_REG_MEM_OPERATION(0) | /* wait */

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3159

amdgpu_ring_write(ring, mmVM_INVALIDATE_REQUEST);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3160

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3161

amdgpu_ring_write(ring, 0); /* ref */

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3162

amdgpu_ring_write(ring, 0); /* mask */

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3163

amdgpu_ring_write(ring, 0x20); /* poll interval */

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3168

amdgpu_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3169

amdgpu_ring_write(ring, 0x0);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3172

amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3173

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3174

amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3175

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3184

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3185

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(usepfp) |

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3187

amdgpu_ring_write(ring, reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3188

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3189

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3968

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3969

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3971

amdgpu_ring_write(ring, amdgpu_gds_reg_offset[vmid].mem_base);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3972

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3973

amdgpu_ring_write(ring, gds_base);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3976

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3977

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3979

amdgpu_ring_write(ring, amdgpu_gds_reg_offset[vmid].mem_size);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3980

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3981

amdgpu_ring_write(ring, gds_size);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3984

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3985

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3987

amdgpu_ring_write(ring, amdgpu_gds_reg_offset[vmid].gws);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3988

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3989

amdgpu_ring_write(ring, gws_size << GDS_GWS_VMID0__SIZE__SHIFT | gws_base);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3992

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3993

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3995

amdgpu_ring_write(ring, amdgpu_gds_reg_offset[vmid].oa);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3996

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

3997

amdgpu_ring_write(ring, (1 << (oa_size + oa_base)) - (1 << oa_base));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4867

amdgpu_ring_write(ring, PACKET3(PACKET3_SURFACE_SYNC, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4868

amdgpu_ring_write(ring, PACKET3_TCL1_ACTION_ENA |

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4872

amdgpu_ring_write(ring, 0xffffffff); /* CP_COHER_SIZE */

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4873

amdgpu_ring_write(ring, 0); /* CP_COHER_BASE */

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4874

amdgpu_ring_write(ring, 0x0000000A); /* poll interval */

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4879

amdgpu_ring_write(ring, PACKET3(PACKET3_ACQUIRE_MEM, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4880

amdgpu_ring_write(ring, PACKET3_TCL1_ACTION_ENA |

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4884

amdgpu_ring_write(ring, 0xffffffff); /* CP_COHER_SIZE */

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4885

amdgpu_ring_write(ring, 0xff); /* CP_COHER_SIZE_HI */

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4886

amdgpu_ring_write(ring, 0); /* CP_COHER_BASE */

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4887

amdgpu_ring_write(ring, 0); /* CP_COHER_BASE_HI */

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4888

amdgpu_ring_write(ring, 0x0000000A); /* poll interval */

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4151

amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4152

amdgpu_ring_write(ring, PACKET3_PREAMBLE_BEGIN_CLEAR_STATE);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4154

amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4155

amdgpu_ring_write(ring, 0x80000000);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4156

amdgpu_ring_write(ring, 0x80000000);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4161

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4164

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4167

amdgpu_ring_write(ring, ext->extent[i]);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4172

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4173

amdgpu_ring_write(ring, mmPA_SC_RASTER_CONFIG - PACKET3_SET_CONTEXT_REG_START);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4174

amdgpu_ring_write(ring, adev->gfx.config.rb_config[0][0].raster_config);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4175

amdgpu_ring_write(ring, adev->gfx.config.rb_config[0][0].raster_config_1);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4177

amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4178

amdgpu_ring_write(ring, PACKET3_PREAMBLE_END_CLEAR_STATE);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4180

amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4181

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4184

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4185

amdgpu_ring_write(ring, PACKET3_BASE_INDEX(CE_PARTITION_BASE));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4186

amdgpu_ring_write(ring, 0x8000);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4187

amdgpu_ring_write(ring, 0x8000);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4331

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_RESOURCES, 6));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4332

amdgpu_ring_write(kiq_ring, 0); /* vmid_mask:0 queue_type:0 (KIQ) */

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4333

amdgpu_ring_write(kiq_ring, lower_32_bits(queue_mask)); /* queue mask lo */

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4334

amdgpu_ring_write(kiq_ring, upper_32_bits(queue_mask)); /* queue mask hi */

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4335

amdgpu_ring_write(kiq_ring, 0); /* gws mask lo */

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4336

amdgpu_ring_write(kiq_ring, 0); /* gws mask hi */

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4337

amdgpu_ring_write(kiq_ring, 0); /* oac mask */

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4338

amdgpu_ring_write(kiq_ring, 0); /* gds heap base:0, gds heap size:0 */

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4345

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4347

amdgpu_ring_write(kiq_ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4349

amdgpu_ring_write(kiq_ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4354

amdgpu_ring_write(kiq_ring, lower_32_bits(mqd_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4355

amdgpu_ring_write(kiq_ring, upper_32_bits(mqd_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4356

amdgpu_ring_write(kiq_ring, lower_32_bits(wptr_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4357

amdgpu_ring_write(kiq_ring, upper_32_bits(wptr_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4773

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_UNMAP_QUEUES, 4));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4774

amdgpu_ring_write(kiq_ring, /* Q_sel: 0, vmid: 0, engine: 0, num_Q: 1 */

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4779

amdgpu_ring_write(kiq_ring, PACKET3_UNMAP_QUEUES_DOORBELL_OFFSET0(ring->doorbell_index));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4780

amdgpu_ring_write(kiq_ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4781

amdgpu_ring_write(kiq_ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

4782

amdgpu_ring_write(kiq_ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5123

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5124

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5126

amdgpu_ring_write(ring, amdgpu_gds_reg_offset[vmid].mem_base);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5127

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5128

amdgpu_ring_write(ring, gds_base);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5131

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5132

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5134

amdgpu_ring_write(ring, amdgpu_gds_reg_offset[vmid].mem_size);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5135

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5136

amdgpu_ring_write(ring, gds_size);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5139

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5140

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5142

amdgpu_ring_write(ring, amdgpu_gds_reg_offset[vmid].gws);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5143

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5144

amdgpu_ring_write(ring, gws_size << GDS_GWS_VMID0__SIZE__SHIFT | gws_base);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5147

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5148

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5150

amdgpu_ring_write(ring, amdgpu_gds_reg_offset[vmid].oa);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5151

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5152

amdgpu_ring_write(ring, (1 << (oa_size + oa_base)) - (1 << oa_base));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6021

amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6022

amdgpu_ring_write(ring, (WAIT_REG_MEM_OPERATION(1) | /* write, wait, write */

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6025

amdgpu_ring_write(ring, mmGPU_HDP_FLUSH_REQ);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6026

amdgpu_ring_write(ring, mmGPU_HDP_FLUSH_DONE);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6027

amdgpu_ring_write(ring, ref_and_mask);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6028

amdgpu_ring_write(ring, ref_and_mask);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6029

amdgpu_ring_write(ring, 0x20); /* poll interval */

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6034

amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6035

amdgpu_ring_write(ring, EVENT_TYPE(VS_PARTIAL_FLUSH) |

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6038

amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6039

amdgpu_ring_write(ring, EVENT_TYPE(VGT_FLUSH) |

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6065

amdgpu_ring_write(ring, header);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6066

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6071

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr) & 0xFFFF);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6072

amdgpu_ring_write(ring, control);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6094

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6095

amdgpu_ring_write(ring, mmGDS_COMPUTE_MAX_WAVE_ID - PACKET3_SET_CONFIG_REG_START);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6096

amdgpu_ring_write(ring, ring->adev->gds.gds_compute_max_wave_id);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6099

amdgpu_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6100

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6105

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr) & 0xFFFF);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6106

amdgpu_ring_write(ring, control);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6119

amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6120

amdgpu_ring_write(ring, (EOP_TCL1_ACTION_EN |

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6125

amdgpu_ring_write(ring, addr & 0xfffffffc);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6126

amdgpu_ring_write(ring, (upper_32_bits(addr) & 0xffff) |

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6128

amdgpu_ring_write(ring, lower_32_bits(seq - 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6129

amdgpu_ring_write(ring, upper_32_bits(seq - 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6133

amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6134

amdgpu_ring_write(ring, (EOP_TCL1_ACTION_EN |

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6140

amdgpu_ring_write(ring, addr & 0xfffffffc);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6141

amdgpu_ring_write(ring, (upper_32_bits(addr) & 0xffff) |

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6143

amdgpu_ring_write(ring, lower_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6144

amdgpu_ring_write(ring, upper_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6154

amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6155

amdgpu_ring_write(ring, (WAIT_REG_MEM_MEM_SPACE(1) | /* memory */

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6158

amdgpu_ring_write(ring, addr & 0xfffffffc);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6159

amdgpu_ring_write(ring, upper_32_bits(addr) & 0xffffffff);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6160

amdgpu_ring_write(ring, seq);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6161

amdgpu_ring_write(ring, 0xffffffff);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6162

amdgpu_ring_write(ring, 4); /* poll interval */

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6173

amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6174

amdgpu_ring_write(ring, (WAIT_REG_MEM_OPERATION(0) | /* wait */

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6177

amdgpu_ring_write(ring, mmVM_INVALIDATE_REQUEST);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6178

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6179

amdgpu_ring_write(ring, 0); /* ref */

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6180

amdgpu_ring_write(ring, 0); /* mask */

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6181

amdgpu_ring_write(ring, 0x20); /* poll interval */

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6186

amdgpu_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6187

amdgpu_ring_write(ring, 0x0);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6213

amdgpu_ring_write(ring, PACKET3(PACKET3_RELEASE_MEM, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6214

amdgpu_ring_write(ring, (EOP_TCL1_ACTION_EN |

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6219

amdgpu_ring_write(ring, DATA_SEL(write64bit ? 2 : 1) | INT_SEL(int_sel ? 2 : 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6220

amdgpu_ring_write(ring, addr & 0xfffffffc);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6221

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6222

amdgpu_ring_write(ring, lower_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6223

amdgpu_ring_write(ring, upper_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6233

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6234

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6236

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6237

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6238

amdgpu_ring_write(ring, lower_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6242

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6243

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6245

amdgpu_ring_write(ring, mmCPC_INT_STATUS);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6246

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6247

amdgpu_ring_write(ring, 0x20000000); /* src_id is 178 */

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6253

amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6254

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6285

amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6286

amdgpu_ring_write(ring, dw2);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6287

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6295

amdgpu_ring_write(ring, PACKET3(PACKET3_COND_EXEC, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6296

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6297

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6299

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6302

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6311

amdgpu_ring_write(ring, PACKET3(PACKET3_COPY_DATA, 4));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6312

amdgpu_ring_write(ring, 0 | /* src: register*/

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6315

amdgpu_ring_write(ring, reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6316

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6317

amdgpu_ring_write(ring, lower_32_bits(adev->wb.gpu_addr +

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6319

amdgpu_ring_write(ring, upper_32_bits(adev->wb.gpu_addr +

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6340

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6341

amdgpu_ring_write(ring, cmd);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6342

amdgpu_ring_write(ring, reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6343

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6344

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6737

amdgpu_ring_write(ring, PACKET3(PACKET3_SURFACE_SYNC, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6738

amdgpu_ring_write(ring, PACKET3_TCL1_ACTION_ENA |

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6743

amdgpu_ring_write(ring, 0xffffffff); /* CP_COHER_SIZE */

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6744

amdgpu_ring_write(ring, 0); /* CP_COHER_BASE */

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6745

amdgpu_ring_write(ring, 0x0000000A); /* poll interval */

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6750

amdgpu_ring_write(ring, PACKET3(PACKET3_ACQUIRE_MEM, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6751

amdgpu_ring_write(ring, PACKET3_TCL1_ACTION_ENA |

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6756

amdgpu_ring_write(ring, 0xffffffff); /* CP_COHER_SIZE */

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6757

amdgpu_ring_write(ring, 0xff); /* CP_COHER_SIZE_HI */

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6758

amdgpu_ring_write(ring, 0); /* CP_COHER_BASE */

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6759

amdgpu_ring_write(ring, 0); /* CP_COHER_BASE_HI */

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6760

amdgpu_ring_write(ring, 0x0000000A); /* poll interval */

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

7138

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt_ce));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

7139

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(2) |

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

7143

amdgpu_ring_write(ring, lower_32_bits(ce_payload_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

7144

amdgpu_ring_write(ring, upper_32_bits(ce_payload_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

7171

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt_de));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

7172

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(1) |

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

7176

amdgpu_ring_write(ring, lower_32_bits(de_payload_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

7177

amdgpu_ring_write(ring, upper_32_bits(de_payload_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

850

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

851

amdgpu_ring_write(ring, mmSCRATCH_REG0 - PACKET3_SET_UCONFIG_REG_START);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

852

amdgpu_ring_write(ring, 0xDEADBEEF);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1000

amdgpu_ring_write(kiq_ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1003

amdgpu_ring_write(kiq_ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1004

amdgpu_ring_write(kiq_ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1005

amdgpu_ring_write(kiq_ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1016

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_QUERY_STATUS, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1017

amdgpu_ring_write(kiq_ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1022

amdgpu_ring_write(kiq_ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1025

amdgpu_ring_write(kiq_ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1026

amdgpu_ring_write(kiq_ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1027

amdgpu_ring_write(kiq_ring, lower_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1028

amdgpu_ring_write(kiq_ring, upper_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1035

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_INVALIDATE_TLBS, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1036

amdgpu_ring_write(kiq_ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1163

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1164

amdgpu_ring_write(ring, WRITE_DATA_ENGINE_SEL(eng_sel) |

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1167

amdgpu_ring_write(ring, reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1168

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1169

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1177

amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1178

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1187

amdgpu_ring_write(ring, addr0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1188

amdgpu_ring_write(ring, addr1);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1189

amdgpu_ring_write(ring, ref);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1190

amdgpu_ring_write(ring, mask);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1191

amdgpu_ring_write(ring, inv); /* poll interval */

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1207

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1208

amdgpu_ring_write(ring, scratch - PACKET3_SET_UCONFIG_REG_START);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

1209

amdgpu_ring_write(ring, 0xDEADBEEF);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3345

amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3346

amdgpu_ring_write(ring, PACKET3_PREAMBLE_BEGIN_CLEAR_STATE);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3348

amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3349

amdgpu_ring_write(ring, 0x80000000);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3350

amdgpu_ring_write(ring, 0x80000000);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3355

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3358

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3361

amdgpu_ring_write(ring, ext->extent[i]);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3366

amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3367

amdgpu_ring_write(ring, PACKET3_PREAMBLE_END_CLEAR_STATE);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3369

amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3370

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3372

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3373

amdgpu_ring_write(ring, PACKET3_BASE_INDEX(CE_PARTITION_BASE));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3374

amdgpu_ring_write(ring, 0x8000);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3375

amdgpu_ring_write(ring, 0x8000);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3377

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG,1));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3380

amdgpu_ring_write(ring, tmp);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

3381

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4212

amdgpu_ring_write(ring, PACKET3(PACKET3_COPY_DATA, 4));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4213

amdgpu_ring_write(ring, 9 | /* src: register*/

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4217

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4218

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4219

amdgpu_ring_write(ring, lower_32_bits(adev->wb.gpu_addr +

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4221

amdgpu_ring_write(ring, upper_32_bits(adev->wb.gpu_addr +

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4592

amdgpu_ring_write(ring, PACKET3(PACKET3_DMA_DATA, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4593

amdgpu_ring_write(ring, (PACKET3_DMA_DATA_CP_SYNC |

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4597

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4598

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4599

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4600

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4601

amdgpu_ring_write(ring, PACKET3_DMA_DATA_CMD_RAW_WAIT |

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5436

amdgpu_ring_write(ring, header);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5438

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5443

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5445

amdgpu_ring_write(ring, control);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5527

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5528

amdgpu_ring_write(ring, mmGDS_COMPUTE_MAX_WAVE_ID);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5529

amdgpu_ring_write(ring, ring->adev->gds.gds_compute_max_wave_id);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5532

amdgpu_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5534

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5539

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5540

amdgpu_ring_write(ring, control);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5553

amdgpu_ring_write(ring, PACKET3(PACKET3_RELEASE_MEM, 6));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5566

amdgpu_ring_write(ring, dw2);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5567

amdgpu_ring_write(ring, DATA_SEL(write64bit ? 2 : 1) | INT_SEL(int_sel ? 2 : 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5577

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5578

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5579

amdgpu_ring_write(ring, lower_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5580

amdgpu_ring_write(ring, upper_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5581

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5603

amdgpu_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5604

amdgpu_ring_write(ring, 0x0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5647

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5648

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5650

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5651

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5652

amdgpu_ring_write(ring, lower_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5656

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5657

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5659

amdgpu_ring_write(ring, SOC15_REG_OFFSET(GC, 0, mmCPC_INT_STATUS));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5660

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5661

amdgpu_ring_write(ring, 0x20000000); /* src_id is 178 */

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5667

amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5668

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5685

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5686

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(2) |

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5690

amdgpu_ring_write(ring, lower_32_bits(ce_payload_gpu_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5691

amdgpu_ring_write(ring, upper_32_bits(ce_payload_gpu_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5783

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5784

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(1) |

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5788

amdgpu_ring_write(ring, lower_32_bits(de_payload_gpu_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5789

amdgpu_ring_write(ring, upper_32_bits(de_payload_gpu_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5805

amdgpu_ring_write(ring, PACKET3(PACKET3_FRAME_CONTROL, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5806

amdgpu_ring_write(ring, v | FRAME_CMD(start ? 0 : 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5837

amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5838

amdgpu_ring_write(ring, dw2);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5839

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5846

amdgpu_ring_write(ring, PACKET3(PACKET3_COND_EXEC, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5847

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5848

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5850

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5853

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5862

amdgpu_ring_write(ring, PACKET3(PACKET3_COPY_DATA, 4));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5863

amdgpu_ring_write(ring, 0 | /* src: register*/

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5866

amdgpu_ring_write(ring, reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5867

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5868

amdgpu_ring_write(ring, lower_32_bits(adev->wb.gpu_addr +

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5870

amdgpu_ring_write(ring, upper_32_bits(adev->wb.gpu_addr +

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5890

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5891

amdgpu_ring_write(ring, cmd);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5892

amdgpu_ring_write(ring, reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5893

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5894

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7093

amdgpu_ring_write(ring, PACKET3(PACKET3_ACQUIRE_MEM, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7094

amdgpu_ring_write(ring, cp_coher_cntl); /* CP_COHER_CNTL */

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7095

amdgpu_ring_write(ring, 0xffffffff); /* CP_COHER_SIZE */

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7096

amdgpu_ring_write(ring, 0xffffff); /* CP_COHER_SIZE_HI */

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7097

amdgpu_ring_write(ring, 0); /* CP_COHER_BASE */

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7098

amdgpu_ring_write(ring, 0); /* CP_COHER_BASE_HI */

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7099

amdgpu_ring_write(ring, 0x0000000A); /* POLL_INTERVAL */

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7165

amdgpu_ring_write(ring, ring->funcs->nop);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7170

amdgpu_ring_write(ring, PACKET3(PACKET3_NOP, min(num_nop - 2, 0x3ffe)));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7346

amdgpu_ring_write(ring, PACKET3(PACKET3_RUN_CLEANER_SHADER, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7348

amdgpu_ring_write(ring, PACKET3(PACKET3_RUN_CLEANER_SHADER_9_0, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

7350

amdgpu_ring_write(ring, 0); /* RESERVED field, programmed to zero */

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

936

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_RESOURCES, 6));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

937

amdgpu_ring_write(kiq_ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

941

amdgpu_ring_write(kiq_ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

943

amdgpu_ring_write(kiq_ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

945

amdgpu_ring_write(kiq_ring, lower_32_bits(shader_mc_addr)); /* cleaner shader addr lo */

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

946

amdgpu_ring_write(kiq_ring, upper_32_bits(shader_mc_addr)); /* cleaner shader addr hi */

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

947

amdgpu_ring_write(kiq_ring, 0); /* oac mask */

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

948

amdgpu_ring_write(kiq_ring, 0); /* gds heap base:0, gds heap size:0 */

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

958

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

960

amdgpu_ring_write(kiq_ring, /* Q_sel: 0, vmid: 0, engine: 0, num_Q: 1 */

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

973

amdgpu_ring_write(kiq_ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

975

amdgpu_ring_write(kiq_ring, lower_32_bits(mqd_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

976

amdgpu_ring_write(kiq_ring, upper_32_bits(mqd_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

977

amdgpu_ring_write(kiq_ring, lower_32_bits(wptr_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

978

amdgpu_ring_write(kiq_ring, upper_32_bits(wptr_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

988

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_UNMAP_QUEUES, 4));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

989

amdgpu_ring_write(kiq_ring, /* Q_sel: 0, vmid: 0, engine: 0, num_Q: 1 */

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

994

amdgpu_ring_write(kiq_ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

998

amdgpu_ring_write(kiq_ring, lower_32_bits(ring->wptr & ring->buf_mask));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

999

amdgpu_ring_write(kiq_ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

184

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_RESOURCES, 6));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

185

amdgpu_ring_write(kiq_ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

189

amdgpu_ring_write(kiq_ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

191

amdgpu_ring_write(kiq_ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

193

amdgpu_ring_write(kiq_ring, lower_32_bits(shader_mc_addr)); /* cleaner shader addr lo */

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

194

amdgpu_ring_write(kiq_ring, upper_32_bits(shader_mc_addr)); /* cleaner shader addr hi */

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

195

amdgpu_ring_write(kiq_ring, 0); /* oac mask */

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

196

amdgpu_ring_write(kiq_ring, 0); /* gds heap base:0, gds heap size:0 */

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

207

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

209

amdgpu_ring_write(kiq_ring, /* Q_sel: 0, vmid: 0, engine: 0, num_Q: 1 */

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

222

amdgpu_ring_write(kiq_ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

224

amdgpu_ring_write(kiq_ring, lower_32_bits(mqd_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

225

amdgpu_ring_write(kiq_ring, upper_32_bits(mqd_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

226

amdgpu_ring_write(kiq_ring, lower_32_bits(wptr_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

227

amdgpu_ring_write(kiq_ring, upper_32_bits(wptr_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

237

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_UNMAP_QUEUES, 4));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

238

amdgpu_ring_write(kiq_ring, /* Q_sel: 0, vmid: 0, engine: 0, num_Q: 1 */

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

243

amdgpu_ring_write(kiq_ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

247

amdgpu_ring_write(kiq_ring, lower_32_bits(gpu_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

248

amdgpu_ring_write(kiq_ring, upper_32_bits(gpu_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

249

amdgpu_ring_write(kiq_ring, seq);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

251

amdgpu_ring_write(kiq_ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

252

amdgpu_ring_write(kiq_ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

253

amdgpu_ring_write(kiq_ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

264

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_QUERY_STATUS, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

265

amdgpu_ring_write(kiq_ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

270

amdgpu_ring_write(kiq_ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

273

amdgpu_ring_write(kiq_ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

274

amdgpu_ring_write(kiq_ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

275

amdgpu_ring_write(kiq_ring, lower_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

276

amdgpu_ring_write(kiq_ring, upper_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

283

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_INVALIDATE_TLBS, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

284

amdgpu_ring_write(kiq_ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2868

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2869

amdgpu_ring_write(ring, regGDS_COMPUTE_MAX_WAVE_ID);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2870

amdgpu_ring_write(ring, ring->adev->gds.gds_compute_max_wave_id);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2873

amdgpu_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2875

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2880

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2881

amdgpu_ring_write(ring, control);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2892

amdgpu_ring_write(ring, PACKET3(PACKET3_RELEASE_MEM, 6));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2893

amdgpu_ring_write(ring, ((writeback ? (EOP_TC_WB_ACTION_EN |

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2901

amdgpu_ring_write(ring, DATA_SEL(write64bit ? 2 : 1) | INT_SEL(int_sel ? 2 : 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2911

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2912

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2913

amdgpu_ring_write(ring, lower_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2914

amdgpu_ring_write(ring, upper_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2915

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2974

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2975

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2977

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2978

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2979

amdgpu_ring_write(ring, lower_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2983

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2984

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2986

amdgpu_ring_write(ring, SOC15_REG_OFFSET(GC, GET_INST(GC, 0), regCPC_INT_STATUS));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2987

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2988

amdgpu_ring_write(ring, 0x20000000); /* src_id is 178 */

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2999

amdgpu_ring_write(ring, PACKET3(PACKET3_COPY_DATA, 4));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3000

amdgpu_ring_write(ring, 0 | /* src: register*/

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3003

amdgpu_ring_write(ring, reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3004

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3005

amdgpu_ring_write(ring, lower_32_bits(adev->wb.gpu_addr +

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3007

amdgpu_ring_write(ring, upper_32_bits(adev->wb.gpu_addr +

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3029

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3030

amdgpu_ring_write(ring, cmd);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3031

amdgpu_ring_write(ring, reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3032

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3033

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3403

amdgpu_ring_write(ring, PACKET3(PACKET3_ACQUIRE_MEM, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3404

amdgpu_ring_write(ring, cp_coher_cntl); /* CP_COHER_CNTL */

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3405

amdgpu_ring_write(ring, 0xffffffff); /* CP_COHER_SIZE */

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3406

amdgpu_ring_write(ring, 0xffffff); /* CP_COHER_SIZE_HI */

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3407

amdgpu_ring_write(ring, 0); /* CP_COHER_BASE */

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3408

amdgpu_ring_write(ring, 0); /* CP_COHER_BASE_HI */

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3409

amdgpu_ring_write(ring, 0x0000000A); /* POLL_INTERVAL */

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

379

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

380

amdgpu_ring_write(ring, WRITE_DATA_ENGINE_SEL(eng_sel) |

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

383

amdgpu_ring_write(ring, reg);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

384

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

385

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

399

amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

400

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

409

amdgpu_ring_write(ring, addr0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

410

amdgpu_ring_write(ring, addr1);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

411

amdgpu_ring_write(ring, ref);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

412

amdgpu_ring_write(ring, mask);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

413

amdgpu_ring_write(ring, inv); /* poll interval */

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

434

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

435

amdgpu_ring_write(ring, xcc_offset - PACKET3_SET_UCONFIG_REG_START);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

436

amdgpu_ring_write(ring, 0xDEADBEEF);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4564

amdgpu_ring_write(ring, ring->funcs->nop);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4569

amdgpu_ring_write(ring, PACKET3(PACKET3_NOP, min(num_nop - 2, 0x3ffe)));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4711

amdgpu_ring_write(ring, PACKET3(PACKET3_RUN_CLEANER_SHADER, 0));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4712

amdgpu_ring_write(ring, 0); /* RESERVED field, programmed to zero */

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

186

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

188

amdgpu_ring_write(ring, 0x68e04);

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

190

amdgpu_ring_write(ring, PACKETJ(0, 0, 0, PACKETJ_TYPE0));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

191

amdgpu_ring_write(ring, 0x80010000);

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

205

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

207

amdgpu_ring_write(ring, 0x68e04);

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

209

amdgpu_ring_write(ring, PACKETJ(0, 0, 0, PACKETJ_TYPE0));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

210

amdgpu_ring_write(ring, 0x00010000);

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

230

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

232

amdgpu_ring_write(ring, seq);

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

234

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

236

amdgpu_ring_write(ring, seq);

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

238

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

240

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

242

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

244

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

246

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

248

amdgpu_ring_write(ring, 0x8);

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

250

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

252

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

254

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

256

amdgpu_ring_write(ring, 0x01400200);

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

258

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

260

amdgpu_ring_write(ring, seq);

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

262

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

264

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

266

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

268

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

270

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

272

amdgpu_ring_write(ring, 0xffffffff);

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

274

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

276

amdgpu_ring_write(ring, 0x3fbc);

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

278

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

280

amdgpu_ring_write(ring, 0x1);

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

283

amdgpu_ring_write(ring, PACKETJ(0, 0, 0, PACKETJ_TYPE7));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

284

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

305

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

308

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

310

amdgpu_ring_write(ring, (vmid | (vmid << 4)));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

312

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

314

amdgpu_ring_write(ring, (vmid | (vmid << 4)));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

316

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

318

amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

320

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

322

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

324

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

326

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

328

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

330

amdgpu_ring_write(ring, lower_32_bits(ring->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

332

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

334

amdgpu_ring_write(ring, upper_32_bits(ring->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

336

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

338

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

340

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

342

amdgpu_ring_write(ring, 0x01400200);

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

344

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

346

amdgpu_ring_write(ring, 0x2);

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

348

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

350

amdgpu_ring_write(ring, 0x2);

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

360

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

362

amdgpu_ring_write(ring, 0x01400200);

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

364

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

366

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

368

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

372

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

373

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

376

amdgpu_ring_write(ring, reg_offset);

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

377

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

380

amdgpu_ring_write(ring, mask);

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

404

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

408

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

409

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

412

amdgpu_ring_write(ring, reg_offset);

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

413

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

416

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

426

amdgpu_ring_write(ring, PACKETJ(0, 0, 0, PACKETJ_TYPE6));

sys/dev/pci/drm/amd/amdgpu/jpeg_v1_0.c

427

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

466

amdgpu_ring_write(ring, PACKETJ(mmUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

468

amdgpu_ring_write(ring, 0x68e04);

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

470

amdgpu_ring_write(ring, PACKETJ(JRBC_DEC_EXTERNAL_REG_WRITE_ADDR,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

472

amdgpu_ring_write(ring, 0x80010000);

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

484

amdgpu_ring_write(ring, PACKETJ(mmUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

486

amdgpu_ring_write(ring, 0x68e04);

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

488

amdgpu_ring_write(ring, PACKETJ(JRBC_DEC_EXTERNAL_REG_WRITE_ADDR,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

490

amdgpu_ring_write(ring, 0x00010000);

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

508

amdgpu_ring_write(ring, PACKETJ(mmUVD_JPEG_GPCOM_DATA0_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

510

amdgpu_ring_write(ring, seq);

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

512

amdgpu_ring_write(ring, PACKETJ(mmUVD_JPEG_GPCOM_DATA1_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

514

amdgpu_ring_write(ring, seq);

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

516

amdgpu_ring_write(ring, PACKETJ(mmUVD_LMI_JRBC_RB_MEM_WR_64BIT_BAR_LOW_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

518

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

520

amdgpu_ring_write(ring, PACKETJ(mmUVD_LMI_JRBC_RB_MEM_WR_64BIT_BAR_HIGH_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

522

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

524

amdgpu_ring_write(ring, PACKETJ(mmUVD_JPEG_GPCOM_CMD_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

526

amdgpu_ring_write(ring, 0x8);

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

528

amdgpu_ring_write(ring, PACKETJ(mmUVD_JPEG_GPCOM_CMD_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

530

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

532

amdgpu_ring_write(ring, PACKETJ(mmUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

534

amdgpu_ring_write(ring, 0x3fbc);

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

536

amdgpu_ring_write(ring, PACKETJ(JRBC_DEC_EXTERNAL_REG_WRITE_ADDR,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

538

amdgpu_ring_write(ring, 0x1);

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

540

amdgpu_ring_write(ring, PACKETJ(0, 0, 0, PACKETJ_TYPE7));

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

541

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

561

amdgpu_ring_write(ring, PACKETJ(mmUVD_JPEG_IH_CTRL_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

563

amdgpu_ring_write(ring, (vmid << JPEG_IH_CTRL__IH_VMID__SHIFT));

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

565

amdgpu_ring_write(ring, PACKETJ(mmUVD_LMI_JRBC_IB_VMID_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

569

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

571

amdgpu_ring_write(ring, (vmid | (vmid << 4) | (vmid << 8)));

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

573

amdgpu_ring_write(ring, PACKETJ(mmUVD_LMI_JPEG_VMID_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

575

amdgpu_ring_write(ring, (vmid | (vmid << 4) | (vmid << 8)));

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

577

amdgpu_ring_write(ring, PACKETJ(mmUVD_LMI_JRBC_IB_64BIT_BAR_LOW_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

579

amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

581

amdgpu_ring_write(ring, PACKETJ(mmUVD_LMI_JRBC_IB_64BIT_BAR_HIGH_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

583

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

585

amdgpu_ring_write(ring, PACKETJ(mmUVD_JRBC_IB_SIZE_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

587

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

589

amdgpu_ring_write(ring, PACKETJ(mmUVD_LMI_JRBC_RB_MEM_RD_64BIT_BAR_LOW_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

591

amdgpu_ring_write(ring, lower_32_bits(ring->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

593

amdgpu_ring_write(ring, PACKETJ(mmUVD_LMI_JRBC_RB_MEM_RD_64BIT_BAR_HIGH_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

595

amdgpu_ring_write(ring, upper_32_bits(ring->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

597

amdgpu_ring_write(ring, PACKETJ(0, 0, PACKETJ_CONDITION_CHECK0, PACKETJ_TYPE2));

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

598

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

600

amdgpu_ring_write(ring, PACKETJ(mmUVD_JRBC_RB_COND_RD_TIMER_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

602

amdgpu_ring_write(ring, 0x01400200);

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

604

amdgpu_ring_write(ring, PACKETJ(mmUVD_JRBC_RB_REF_DATA_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

606

amdgpu_ring_write(ring, 0x2);

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

608

amdgpu_ring_write(ring, PACKETJ(mmUVD_JRBC_STATUS_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

610

amdgpu_ring_write(ring, 0x2);

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

618

amdgpu_ring_write(ring, PACKETJ(mmUVD_JRBC_RB_COND_RD_TIMER_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

620

amdgpu_ring_write(ring, 0x01400200);

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

622

amdgpu_ring_write(ring, PACKETJ(mmUVD_JRBC_RB_REF_DATA_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

624

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

626

amdgpu_ring_write(ring, PACKETJ(mmUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

629

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

630

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

633

amdgpu_ring_write(ring, reg_offset);

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

634

amdgpu_ring_write(ring, PACKETJ(JRBC_DEC_EXTERNAL_REG_WRITE_ADDR,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

637

amdgpu_ring_write(ring, mask);

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

659

amdgpu_ring_write(ring, PACKETJ(mmUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

662

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

663

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

666

amdgpu_ring_write(ring, reg_offset);

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

667

amdgpu_ring_write(ring, PACKETJ(JRBC_DEC_EXTERNAL_REG_WRITE_ADDR,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

670

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

680

amdgpu_ring_write(ring, PACKETJ(0, 0, 0, PACKETJ_TYPE6));

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

681

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_5.c

494

amdgpu_ring_write(ring, PACKETJ(mmUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_5.c

496

amdgpu_ring_write(ring, 0x6aa04); /* PCTL0_MMHUB_DEEPSLEEP_IB */

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_5.c

498

amdgpu_ring_write(ring, PACKETJ(JRBC_DEC_EXTERNAL_REG_WRITE_ADDR,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_5.c

500

amdgpu_ring_write(ring, 0x80000000 | (1 << (ring->me * 2 + 14)));

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_5.c

512

amdgpu_ring_write(ring, PACKETJ(mmUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_5.c

514

amdgpu_ring_write(ring, 0x6aa04); /* PCTL0_MMHUB_DEEPSLEEP_IB */

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_5.c

516

amdgpu_ring_write(ring, PACKETJ(JRBC_DEC_EXTERNAL_REG_WRITE_ADDR,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_5.c

518

amdgpu_ring_write(ring, (1 << (ring->me * 2 + 14)));

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

740

amdgpu_ring_write(ring, PACKETJ(regUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

742

amdgpu_ring_write(ring, 0x62a04); /* PCTL0_MMHUB_DEEPSLEEP_IB */

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

744

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

747

amdgpu_ring_write(ring, 0x80004000);

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

761

amdgpu_ring_write(ring, PACKETJ(regUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

763

amdgpu_ring_write(ring, 0x62a04);

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

765

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

768

amdgpu_ring_write(ring, 0x00004000);

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

787

amdgpu_ring_write(ring, PACKETJ(regUVD_JPEG_GPCOM_DATA0_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

789

amdgpu_ring_write(ring, seq);

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

791

amdgpu_ring_write(ring, PACKETJ(regUVD_JPEG_GPCOM_DATA1_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

793

amdgpu_ring_write(ring, seq);

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

795

amdgpu_ring_write(ring, PACKETJ(regUVD_LMI_JRBC_RB_MEM_WR_64BIT_BAR_LOW_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

797

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

799

amdgpu_ring_write(ring, PACKETJ(regUVD_LMI_JRBC_RB_MEM_WR_64BIT_BAR_HIGH_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

801

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

803

amdgpu_ring_write(ring, PACKETJ(regUVD_JPEG_GPCOM_CMD_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

805

amdgpu_ring_write(ring, 0x8);

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

807

amdgpu_ring_write(ring, PACKETJ(regUVD_JPEG_GPCOM_CMD_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

809

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

811

amdgpu_ring_write(ring, PACKETJ(0, 0, 0, PACKETJ_TYPE6));

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

812

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

814

amdgpu_ring_write(ring, PACKETJ(0, 0, 0, PACKETJ_TYPE6));

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

815

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

817

amdgpu_ring_write(ring, PACKETJ(0, 0, 0, PACKETJ_TYPE7));

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

818

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

838

amdgpu_ring_write(ring, PACKETJ(regUVD_LMI_JRBC_IB_VMID_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

842

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

844

amdgpu_ring_write(ring, (vmid | (vmid << 4) | (vmid << 8)));

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

846

amdgpu_ring_write(ring, PACKETJ(regUVD_LMI_JPEG_VMID_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

848

amdgpu_ring_write(ring, (vmid | (vmid << 4) | (vmid << 8)));

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

850

amdgpu_ring_write(ring, PACKETJ(regUVD_LMI_JRBC_IB_64BIT_BAR_LOW_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

852

amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

854

amdgpu_ring_write(ring, PACKETJ(regUVD_LMI_JRBC_IB_64BIT_BAR_HIGH_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

856

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

858

amdgpu_ring_write(ring, PACKETJ(regUVD_JRBC_IB_SIZE_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

860

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

862

amdgpu_ring_write(ring, PACKETJ(regUVD_LMI_JRBC_RB_MEM_RD_64BIT_BAR_LOW_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

864

amdgpu_ring_write(ring, lower_32_bits(ring->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

866

amdgpu_ring_write(ring, PACKETJ(regUVD_LMI_JRBC_RB_MEM_RD_64BIT_BAR_HIGH_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

868

amdgpu_ring_write(ring, upper_32_bits(ring->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

870

amdgpu_ring_write(ring, PACKETJ(0, 0, PACKETJ_CONDITION_CHECK0, PACKETJ_TYPE2));

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

871

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

873

amdgpu_ring_write(ring, PACKETJ(regUVD_JRBC_RB_COND_RD_TIMER_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

875

amdgpu_ring_write(ring, 0x01400200);

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

877

amdgpu_ring_write(ring, PACKETJ(regUVD_JRBC_RB_REF_DATA_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

879

amdgpu_ring_write(ring, 0x2);

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

881

amdgpu_ring_write(ring, PACKETJ(regUVD_JRBC_STATUS_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

883

amdgpu_ring_write(ring, 0x2);

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

897

amdgpu_ring_write(ring, PACKETJ(regUVD_JRBC_RB_COND_RD_TIMER_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

899

amdgpu_ring_write(ring, 0x01400200);

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

901

amdgpu_ring_write(ring, PACKETJ(regUVD_JRBC_RB_REF_DATA_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

903

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

905

amdgpu_ring_write(ring, PACKETJ(regUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

908

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

909

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

912

amdgpu_ring_write(ring, reg_offset);

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

913

amdgpu_ring_write(ring, PACKETJ(JRBC_DEC_EXTERNAL_REG_WRITE_ADDR,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

916

amdgpu_ring_write(ring, mask);

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

944

amdgpu_ring_write(ring, PACKETJ(regUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

947

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

948

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

951

amdgpu_ring_write(ring, reg_offset);

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

952

amdgpu_ring_write(ring, PACKETJ(JRBC_DEC_EXTERNAL_REG_WRITE_ADDR,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

955

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

965

amdgpu_ring_write(ring, PACKETJ(0, 0, 0, PACKETJ_TYPE6));

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

966

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

231

amdgpu_ring_write(ring, ring->funcs->nop |

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

234

amdgpu_ring_write(ring, ring->funcs->nop);

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

257

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_INDIRECT) |

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

260

amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0);

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

261

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

262

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

263

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

264

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

284

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_POLL_REGMEM) |

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

287

amdgpu_ring_write(ring, mmGPU_HDP_FLUSH_DONE << 2);

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

288

amdgpu_ring_write(ring, mmGPU_HDP_FLUSH_REQ << 2);

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

289

amdgpu_ring_write(ring, ref_and_mask); /* reference */

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

290

amdgpu_ring_write(ring, ref_and_mask); /* mask */

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

291

amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) |

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

312

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE));

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

313

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

314

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

315

amdgpu_ring_write(ring, lower_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

320

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE));

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

321

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

322

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

323

amdgpu_ring_write(ring, upper_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

327

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_TRAP));

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

328

amdgpu_ring_write(ring, SDMA_PKT_TRAP_INT_CONTEXT_INT_CONTEXT(0));

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

552

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) |

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

554

amdgpu_ring_write(ring, lower_32_bits(gpu_addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

555

amdgpu_ring_write(ring, upper_32_bits(gpu_addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

556

amdgpu_ring_write(ring, SDMA_PKT_WRITE_UNTILED_DW_3_COUNT(1));

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

557

amdgpu_ring_write(ring, 0xDEADBEEF);

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

764

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_POLL_REGMEM) |

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

768

amdgpu_ring_write(ring, addr & 0xfffffffc);

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

769

amdgpu_ring_write(ring, upper_32_bits(addr) & 0xffffffff);

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

770

amdgpu_ring_write(ring, seq); /* reference */

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

771

amdgpu_ring_write(ring, 0xffffffff); /* mask */

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

772

amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) |

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

792

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_POLL_REGMEM) |

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

795

amdgpu_ring_write(ring, mmVM_INVALIDATE_REQUEST << 2);

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

796

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

797

amdgpu_ring_write(ring, 0); /* reference */

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

798

amdgpu_ring_write(ring, 0); /* mask */

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

799

amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) |

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

806

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_SRBM_WRITE) |

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

808

amdgpu_ring_write(ring, reg);

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

809

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

1037

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_POLL_REGMEM) |

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

1041

amdgpu_ring_write(ring, addr & 0xfffffffc);

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

1042

amdgpu_ring_write(ring, upper_32_bits(addr) & 0xffffffff);

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

1043

amdgpu_ring_write(ring, seq); /* reference */

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

1044

amdgpu_ring_write(ring, 0xffffffff); /* mask */

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

1045

amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) |

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

1065

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_POLL_REGMEM) |

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

1068

amdgpu_ring_write(ring, mmVM_INVALIDATE_REQUEST << 2);

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

1069

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

1070

amdgpu_ring_write(ring, 0); /* reference */

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

1071

amdgpu_ring_write(ring, 0); /* mask */

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

1072

amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) |

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

1079

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_SRBM_WRITE) |

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

1081

amdgpu_ring_write(ring, reg);

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

1082

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

407

amdgpu_ring_write(ring, ring->funcs->nop |

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

410

amdgpu_ring_write(ring, ring->funcs->nop);

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

433

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_INDIRECT) |

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

436

amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0);

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

437

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

438

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

439

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

440

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

460

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_POLL_REGMEM) |

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

463

amdgpu_ring_write(ring, mmGPU_HDP_FLUSH_DONE << 2);

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

464

amdgpu_ring_write(ring, mmGPU_HDP_FLUSH_REQ << 2);

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

465

amdgpu_ring_write(ring, ref_and_mask); /* reference */

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

466

amdgpu_ring_write(ring, ref_and_mask); /* mask */

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

467

amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) |

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

488

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE));

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

489

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

490

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

491

amdgpu_ring_write(ring, lower_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

496

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE));

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

497

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

498

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

499

amdgpu_ring_write(ring, upper_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

503

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_TRAP));

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

504

amdgpu_ring_write(ring, SDMA_PKT_TRAP_INT_CONTEXT_INT_CONTEXT(0));

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

826

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) |

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

828

amdgpu_ring_write(ring, lower_32_bits(gpu_addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

829

amdgpu_ring_write(ring, upper_32_bits(gpu_addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

830

amdgpu_ring_write(ring, SDMA_PKT_WRITE_UNTILED_DW_3_COUNT(1));

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

831

amdgpu_ring_write(ring, 0xDEADBEEF);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

1484

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) |

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

1486

amdgpu_ring_write(ring, lower_32_bits(gpu_addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

1487

amdgpu_ring_write(ring, upper_32_bits(gpu_addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

1488

amdgpu_ring_write(ring, SDMA_PKT_WRITE_UNTILED_DW_3_COUNT(0));

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

1489

amdgpu_ring_write(ring, 0xDEADBEEF);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

1725

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_SRBM_WRITE) |

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

1727

amdgpu_ring_write(ring, reg);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

1728

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

791

amdgpu_ring_write(ring, ring->funcs->nop |

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

794

amdgpu_ring_write(ring, ring->funcs->nop);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

817

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_INDIRECT) |

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

820

amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

821

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

822

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

823

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

824

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

834

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_POLL_REGMEM) |

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

840

amdgpu_ring_write(ring, addr0);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

841

amdgpu_ring_write(ring, addr1);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

844

amdgpu_ring_write(ring, addr0 << 2);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

845

amdgpu_ring_write(ring, addr1 << 2);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

847

amdgpu_ring_write(ring, ref); /* reference */

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

848

amdgpu_ring_write(ring, mask); /* mask */

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

849

amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) |

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

891

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE));

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

894

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

895

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

896

amdgpu_ring_write(ring, lower_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

901

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE));

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

904

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

905

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

906

amdgpu_ring_write(ring, upper_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

910

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_TRAP));

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

911

amdgpu_ring_write(ring, SDMA_PKT_TRAP_INT_CONTEXT_INT_CONTEXT(0));

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

1080

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) |

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

1082

amdgpu_ring_write(ring, lower_32_bits(gpu_addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

1083

amdgpu_ring_write(ring, upper_32_bits(gpu_addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

1084

amdgpu_ring_write(ring, SDMA_PKT_WRITE_UNTILED_DW_3_COUNT(0));

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

1085

amdgpu_ring_write(ring, 0xDEADBEEF);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

1321

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_SRBM_WRITE) |

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

1323

amdgpu_ring_write(ring, reg);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

1324

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

358

amdgpu_ring_write(ring, ring->funcs->nop |

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

361

amdgpu_ring_write(ring, ring->funcs->nop);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

384

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_INDIRECT) |

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

387

amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

388

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

389

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

390

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

391

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

401

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_POLL_REGMEM) |

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

407

amdgpu_ring_write(ring, addr0);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

408

amdgpu_ring_write(ring, addr1);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

411

amdgpu_ring_write(ring, addr0 << 2);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

412

amdgpu_ring_write(ring, addr1 << 2);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

414

amdgpu_ring_write(ring, ref); /* reference */

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

415

amdgpu_ring_write(ring, mask); /* mask */

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

416

amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) |

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

459

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE));

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

462

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

463

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

464

amdgpu_ring_write(ring, lower_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

469

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE));

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

472

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

473

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

474

amdgpu_ring_write(ring, upper_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

478

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_TRAP));

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

479

amdgpu_ring_write(ring, SDMA_PKT_TRAP_INT_CONTEXT_INT_CONTEXT(0));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

1039

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) |

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

1041

amdgpu_ring_write(ring, lower_32_bits(gpu_addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

1042

amdgpu_ring_write(ring, upper_32_bits(gpu_addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

1043

amdgpu_ring_write(ring, SDMA_PKT_WRITE_UNTILED_DW_3_COUNT(0));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

1044

amdgpu_ring_write(ring, 0xDEADBEEF);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

1268

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_POLL_REGMEM) |

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

1272

amdgpu_ring_write(ring, addr & 0xfffffffc);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

1273

amdgpu_ring_write(ring, upper_32_bits(addr) & 0xffffffff);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

1274

amdgpu_ring_write(ring, seq); /* reference */

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

1275

amdgpu_ring_write(ring, 0xffffffff); /* mask */

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

1276

amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) |

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

1300

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_SRBM_WRITE) |

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

1302

amdgpu_ring_write(ring, reg);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

1303

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

1309

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_POLL_REGMEM) |

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

1312

amdgpu_ring_write(ring, reg << 2);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

1313

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

1314

amdgpu_ring_write(ring, val); /* reference */

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

1315

amdgpu_ring_write(ring, mask); /* mask */

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

1316

amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) |

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

308

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_COND_EXE));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

309

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

310

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

311

amdgpu_ring_write(ring, 1);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

315

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

414

amdgpu_ring_write(ring, ring->funcs->nop |

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

417

amdgpu_ring_write(ring, ring->funcs->nop);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

448

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_INDIRECT) |

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

451

amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

452

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

453

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

454

amdgpu_ring_write(ring, lower_32_bits(csa_mc_addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

455

amdgpu_ring_write(ring, upper_32_bits(csa_mc_addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

472

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_GCR_REQ));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

473

amdgpu_ring_write(ring, SDMA_PKT_GCR_REQ_PAYLOAD1_BASE_VA_31_7(0));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

474

amdgpu_ring_write(ring, SDMA_PKT_GCR_REQ_PAYLOAD2_GCR_CONTROL_15_0(gcr_cntl) |

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

476

amdgpu_ring_write(ring, SDMA_PKT_GCR_REQ_PAYLOAD3_LIMIT_VA_31_7(0) |

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

478

amdgpu_ring_write(ring, SDMA_PKT_GCR_REQ_PAYLOAD4_LIMIT_VA_47_32(0) |

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

500

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_POLL_REGMEM) |

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

503

amdgpu_ring_write(ring, (adev->nbio.funcs->get_hdp_flush_done_offset(adev)) << 2);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

504

amdgpu_ring_write(ring, (adev->nbio.funcs->get_hdp_flush_req_offset(adev)) << 2);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

505

amdgpu_ring_write(ring, ref_and_mask); /* reference */

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

506

amdgpu_ring_write(ring, ref_and_mask); /* mask */

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

507

amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) |

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

528

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE) |

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

532

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

533

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

534

amdgpu_ring_write(ring, lower_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

539

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE) |

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

543

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

544

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

545

amdgpu_ring_write(ring, upper_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

550

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_TRAP));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

551

amdgpu_ring_write(ring, SDMA_PKT_TRAP_INT_CONTEXT_INT_CONTEXT(0));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

1168

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_POLL_REGMEM) |

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

1172

amdgpu_ring_write(ring, addr & 0xfffffffc);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

1173

amdgpu_ring_write(ring, upper_32_bits(addr) & 0xffffffff);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

1174

amdgpu_ring_write(ring, seq); /* reference */

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

1175

amdgpu_ring_write(ring, 0xffffffff); /* mask */

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

1176

amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) |

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

1206

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

1211

amdgpu_ring_write(ring, req);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

1212

amdgpu_ring_write(ring, 0xFFFFFFFF);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

1213

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

1221

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_SRBM_WRITE) |

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

1223

amdgpu_ring_write(ring, reg);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

1224

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

1230

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_POLL_REGMEM) |

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

1233

amdgpu_ring_write(ring, reg << 2);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

1234

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

1235

amdgpu_ring_write(ring, val); /* reference */

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

1236

amdgpu_ring_write(ring, mask); /* mask */

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

1237

amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) |

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

148

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_COND_EXE));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

149

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

150

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

151

amdgpu_ring_write(ring, 1);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

155

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

262

amdgpu_ring_write(ring, ring->funcs->nop |

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

265

amdgpu_ring_write(ring, ring->funcs->nop);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

296

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_INDIRECT) |

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

299

amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

300

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

301

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

302

amdgpu_ring_write(ring, lower_32_bits(csa_mc_addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

303

amdgpu_ring_write(ring, upper_32_bits(csa_mc_addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

321

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_GCR_REQ));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

322

amdgpu_ring_write(ring, SDMA_PKT_GCR_REQ_PAYLOAD1_BASE_VA_31_7(0));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

323

amdgpu_ring_write(ring, SDMA_PKT_GCR_REQ_PAYLOAD2_GCR_CONTROL_15_0(gcr_cntl) |

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

325

amdgpu_ring_write(ring, SDMA_PKT_GCR_REQ_PAYLOAD3_LIMIT_VA_31_7(0) |

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

327

amdgpu_ring_write(ring, SDMA_PKT_GCR_REQ_PAYLOAD4_LIMIT_VA_47_32(0) |

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

349

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_POLL_REGMEM) |

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

352

amdgpu_ring_write(ring, (adev->nbio.funcs->get_hdp_flush_done_offset(adev)) << 2);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

353

amdgpu_ring_write(ring, (adev->nbio.funcs->get_hdp_flush_req_offset(adev)) << 2);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

354

amdgpu_ring_write(ring, ref_and_mask); /* reference */

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

355

amdgpu_ring_write(ring, ref_and_mask); /* mask */

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

356

amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) |

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

378

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE) |

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

382

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

383

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

384

amdgpu_ring_write(ring, lower_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

389

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE) |

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

393

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

394

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

395

amdgpu_ring_write(ring, upper_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

400

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_TRAP));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

401

amdgpu_ring_write(ring, SDMA_PKT_TRAP_INT_CONTEXT_INT_CONTEXT(0));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

939

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) |

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

941

amdgpu_ring_write(ring, lower_32_bits(gpu_addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

942

amdgpu_ring_write(ring, upper_32_bits(gpu_addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

943

amdgpu_ring_write(ring, SDMA_PKT_WRITE_UNTILED_DW_3_COUNT(0));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

944

amdgpu_ring_write(ring, 0xDEADBEEF);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

1172

amdgpu_ring_write(ring, SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_POLL_REGMEM) |

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

1176

amdgpu_ring_write(ring, addr & 0xfffffffc);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

1177

amdgpu_ring_write(ring, upper_32_bits(addr) & 0xffffffff);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

1178

amdgpu_ring_write(ring, seq); /* reference */

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

1179

amdgpu_ring_write(ring, 0xffffffff); /* mask */

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

1180

amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) |

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

1209

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

1214

amdgpu_ring_write(ring, req);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

1215

amdgpu_ring_write(ring, 0xFFFFFFFF);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

1216

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

1224

amdgpu_ring_write(ring, SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_SRBM_WRITE) |

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

1226

amdgpu_ring_write(ring, reg);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

1227

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

1233

amdgpu_ring_write(ring, SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_POLL_REGMEM) |

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

1236

amdgpu_ring_write(ring, reg << 2);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

1237

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

1238

amdgpu_ring_write(ring, val); /* reference */

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

1239

amdgpu_ring_write(ring, mask); /* mask */

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

1240

amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) |

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

149

amdgpu_ring_write(ring, SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_COND_EXE));

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

150

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

151

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

152

amdgpu_ring_write(ring, 1);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

156

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

248

amdgpu_ring_write(ring, ring->funcs->nop |

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

251

amdgpu_ring_write(ring, ring->funcs->nop);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

282

amdgpu_ring_write(ring, SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_INDIRECT) |

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

285

amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

286

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

287

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

288

amdgpu_ring_write(ring, lower_32_bits(csa_mc_addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

289

amdgpu_ring_write(ring, upper_32_bits(csa_mc_addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

306

amdgpu_ring_write(ring, SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_GCR_REQ));

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

307

amdgpu_ring_write(ring, SDMA_PKT_GCR_REQ_PAYLOAD1_BASE_VA_31_7(0));

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

308

amdgpu_ring_write(ring, SDMA_PKT_GCR_REQ_PAYLOAD2_GCR_CONTROL_15_0(gcr_cntl) |

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

310

amdgpu_ring_write(ring, SDMA_PKT_GCR_REQ_PAYLOAD3_LIMIT_VA_31_7(0) |

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

312

amdgpu_ring_write(ring, SDMA_PKT_GCR_REQ_PAYLOAD4_LIMIT_VA_47_32(0) |

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

332

amdgpu_ring_write(ring, SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_POLL_REGMEM) |

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

335

amdgpu_ring_write(ring, (adev->nbio.funcs->get_hdp_flush_done_offset(adev)) << 2);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

336

amdgpu_ring_write(ring, (adev->nbio.funcs->get_hdp_flush_req_offset(adev)) << 2);

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

337

amdgpu_ring_write(ring, ref_and_mask); /* reference */

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

338

amdgpu_ring_write(ring, ref_and_mask); /* mask */

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

339

amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) |

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

360

amdgpu_ring_write(ring, SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_FENCE) |

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

364

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

365

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

366

amdgpu_ring_write(ring, lower_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

371

amdgpu_ring_write(ring, SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_FENCE) |

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

375

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

376

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

377

amdgpu_ring_write(ring, upper_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

382

amdgpu_ring_write(ring, SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_TRAP));

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

383

amdgpu_ring_write(ring, SDMA_PKT_TRAP_INT_CONTEXT_INT_CONTEXT(0));

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

945

amdgpu_ring_write(ring, SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_WRITE) |

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

947

amdgpu_ring_write(ring, lower_32_bits(gpu_addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

948

amdgpu_ring_write(ring, upper_32_bits(gpu_addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

949

amdgpu_ring_write(ring, SDMA_PKT_WRITE_UNTILED_DW_3_COUNT(0));

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

950

amdgpu_ring_write(ring, 0xDEADBEEF);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

1193

amdgpu_ring_write(ring, SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_POLL_REGMEM) |

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

1197

amdgpu_ring_write(ring, addr & 0xfffffffc);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

1198

amdgpu_ring_write(ring, upper_32_bits(addr) & 0xffffffff);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

1199

amdgpu_ring_write(ring, seq); /* reference */

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

1200

amdgpu_ring_write(ring, 0xffffffff); /* mask */

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

1201

amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) |

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

1227

amdgpu_ring_write(ring, SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_SRBM_WRITE));

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

1228

amdgpu_ring_write(ring, reg << 2);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

1229

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

1235

amdgpu_ring_write(ring, SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_POLL_REGMEM) |

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

1238

amdgpu_ring_write(ring, reg << 2);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

1239

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

1240

amdgpu_ring_write(ring, val); /* reference */

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

1241

amdgpu_ring_write(ring, mask); /* mask */

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

1242

amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) |

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

149

amdgpu_ring_write(ring, SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_COND_EXE));

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

150

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

151

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

152

amdgpu_ring_write(ring, 1);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

156

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

252

amdgpu_ring_write(ring, ring->funcs->nop |

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

255

amdgpu_ring_write(ring, ring->funcs->nop);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

286

amdgpu_ring_write(ring, SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_INDIRECT) |

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

289

amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

290

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

291

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

292

amdgpu_ring_write(ring, lower_32_bits(csa_mc_addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

293

amdgpu_ring_write(ring, upper_32_bits(csa_mc_addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

310

amdgpu_ring_write(ring, SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_GCR_REQ));

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

311

amdgpu_ring_write(ring, SDMA_PKT_GCR_REQ_PAYLOAD1_BASE_VA_31_7(0));

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

312

amdgpu_ring_write(ring, SDMA_PKT_GCR_REQ_PAYLOAD2_GCR_CONTROL_15_0(gcr_cntl) |

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

314

amdgpu_ring_write(ring, SDMA_PKT_GCR_REQ_PAYLOAD3_LIMIT_VA_31_7(0) |

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

316

amdgpu_ring_write(ring, SDMA_PKT_GCR_REQ_PAYLOAD4_LIMIT_VA_47_32(0) |

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

336

amdgpu_ring_write(ring, SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_POLL_REGMEM) |

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

339

amdgpu_ring_write(ring, (adev->nbio.funcs->get_hdp_flush_done_offset(adev)) << 2);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

340

amdgpu_ring_write(ring, (adev->nbio.funcs->get_hdp_flush_req_offset(adev)) << 2);

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

341

amdgpu_ring_write(ring, ref_and_mask); /* reference */

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

342

amdgpu_ring_write(ring, ref_and_mask); /* mask */

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

343

amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) |

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

364

amdgpu_ring_write(ring, SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_FENCE) |

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

368

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

369

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

370

amdgpu_ring_write(ring, lower_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

375

amdgpu_ring_write(ring, SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_FENCE) |

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

379

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

380

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

381

amdgpu_ring_write(ring, upper_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

386

amdgpu_ring_write(ring, SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_TRAP));

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

387

amdgpu_ring_write(ring, SDMA_PKT_TRAP_INT_CONTEXT_INT_CONTEXT(0));

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

962

amdgpu_ring_write(ring, SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_WRITE) |

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

964

amdgpu_ring_write(ring, lower_32_bits(gpu_addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

965

amdgpu_ring_write(ring, upper_32_bits(gpu_addr));

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

966

amdgpu_ring_write(ring, SDMA_PKT_WRITE_UNTILED_DW_3_COUNT(0));

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

967

amdgpu_ring_write(ring, 0xDEADBEEF);

sys/dev/pci/drm/amd/amdgpu/si_dma.c

113

amdgpu_ring_write(ring, DMA_PACKET(DMA_PACKET_FENCE, 0, 0, 0, 0));

sys/dev/pci/drm/amd/amdgpu/si_dma.c

114

amdgpu_ring_write(ring, addr & 0xfffffffc);

sys/dev/pci/drm/amd/amdgpu/si_dma.c

115

amdgpu_ring_write(ring, (upper_32_bits(addr) & 0xff));

sys/dev/pci/drm/amd/amdgpu/si_dma.c

116

amdgpu_ring_write(ring, seq);

sys/dev/pci/drm/amd/amdgpu/si_dma.c

120

amdgpu_ring_write(ring, DMA_PACKET(DMA_PACKET_FENCE, 0, 0, 0, 0));

sys/dev/pci/drm/amd/amdgpu/si_dma.c

121

amdgpu_ring_write(ring, addr & 0xfffffffc);

sys/dev/pci/drm/amd/amdgpu/si_dma.c

122

amdgpu_ring_write(ring, (upper_32_bits(addr) & 0xff));

sys/dev/pci/drm/amd/amdgpu/si_dma.c

123

amdgpu_ring_write(ring, upper_32_bits(seq));

sys/dev/pci/drm/amd/amdgpu/si_dma.c

126

amdgpu_ring_write(ring, DMA_PACKET(DMA_PACKET_TRAP, 0, 0, 0, 0));

sys/dev/pci/drm/amd/amdgpu/si_dma.c

229

amdgpu_ring_write(ring, DMA_PACKET(DMA_PACKET_WRITE, 0, 0, 0, 1));

sys/dev/pci/drm/amd/amdgpu/si_dma.c

230

amdgpu_ring_write(ring, lower_32_bits(gpu_addr));

sys/dev/pci/drm/amd/amdgpu/si_dma.c

231

amdgpu_ring_write(ring, upper_32_bits(gpu_addr) & 0xff);

sys/dev/pci/drm/amd/amdgpu/si_dma.c

232

amdgpu_ring_write(ring, 0xDEADBEEF);

sys/dev/pci/drm/amd/amdgpu/si_dma.c

435

amdgpu_ring_write(ring, DMA_PACKET(DMA_PACKET_POLL_REG_MEM, 0, 0, 0, 0) |

sys/dev/pci/drm/amd/amdgpu/si_dma.c

437

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/si_dma.c

438

amdgpu_ring_write(ring, (0xff << 16) | upper_32_bits(addr)); /* retry, addr_hi */

sys/dev/pci/drm/amd/amdgpu/si_dma.c

439

amdgpu_ring_write(ring, 0xffffffff); /* mask */

sys/dev/pci/drm/amd/amdgpu/si_dma.c

440

amdgpu_ring_write(ring, seq); /* value */

sys/dev/pci/drm/amd/amdgpu/si_dma.c

441

amdgpu_ring_write(ring, (3 << 28) | 0x20); /* func(equal) | poll interval */

sys/dev/pci/drm/amd/amdgpu/si_dma.c

460

amdgpu_ring_write(ring, DMA_PACKET(DMA_PACKET_POLL_REG_MEM, 0, 0, 0, 0));

sys/dev/pci/drm/amd/amdgpu/si_dma.c

461

amdgpu_ring_write(ring, VM_INVALIDATE_REQUEST);

sys/dev/pci/drm/amd/amdgpu/si_dma.c

462

amdgpu_ring_write(ring, 0xff << 16); /* retry */

sys/dev/pci/drm/amd/amdgpu/si_dma.c

463

amdgpu_ring_write(ring, 1 << vmid); /* mask */

sys/dev/pci/drm/amd/amdgpu/si_dma.c

464

amdgpu_ring_write(ring, 0); /* value */

sys/dev/pci/drm/amd/amdgpu/si_dma.c

465

amdgpu_ring_write(ring, (0 << 28) | 0x20); /* func(always) | poll interval */

sys/dev/pci/drm/amd/amdgpu/si_dma.c

471

amdgpu_ring_write(ring, DMA_PACKET(DMA_PACKET_SRBM_WRITE, 0, 0, 0, 0));

sys/dev/pci/drm/amd/amdgpu/si_dma.c

472

amdgpu_ring_write(ring, (0xf << 16) | reg);

sys/dev/pci/drm/amd/amdgpu/si_dma.c

473

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/si_dma.c

88

amdgpu_ring_write(ring, DMA_PACKET(DMA_PACKET_NOP, 0, 0, 0, 0));

sys/dev/pci/drm/amd/amdgpu/si_dma.c

89

amdgpu_ring_write(ring, DMA_IB_PACKET(DMA_PACKET_INDIRECT_BUFFER, vmid, 0));

sys/dev/pci/drm/amd/amdgpu/si_dma.c

90

amdgpu_ring_write(ring, (ib->gpu_addr & 0xFFFFFFE0));

sys/dev/pci/drm/amd/amdgpu/si_dma.c

91

amdgpu_ring_write(ring, (ib->length_dw << 12) | (upper_32_bits(ib->gpu_addr) & 0xFF));

sys/dev/pci/drm/amd/amdgpu/uvd_v3_1.c

115

amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v3_1.c

116

amdgpu_ring_write(ring, seq);

sys/dev/pci/drm/amd/amdgpu/uvd_v3_1.c

117

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v3_1.c

118

amdgpu_ring_write(ring, addr & 0xffffffff);

sys/dev/pci/drm/amd/amdgpu/uvd_v3_1.c

119

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA1, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v3_1.c

120

amdgpu_ring_write(ring, upper_32_bits(addr) & 0xff);

sys/dev/pci/drm/amd/amdgpu/uvd_v3_1.c

121

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v3_1.c

122

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/uvd_v3_1.c

124

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v3_1.c

125

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/uvd_v3_1.c

126

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA1, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v3_1.c

127

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/uvd_v3_1.c

128

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v3_1.c

129

amdgpu_ring_write(ring, 2);

sys/dev/pci/drm/amd/amdgpu/uvd_v3_1.c

151

amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v3_1.c

152

amdgpu_ring_write(ring, 0xDEADBEEF);

sys/dev/pci/drm/amd/amdgpu/uvd_v3_1.c

174

amdgpu_ring_write(ring, PACKET0(mmUVD_NO_OP, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v3_1.c

175

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/uvd_v3_1.c

682

amdgpu_ring_write(ring, tmp);

sys/dev/pci/drm/amd/amdgpu/uvd_v3_1.c

683

amdgpu_ring_write(ring, 0xFFFFF);

sys/dev/pci/drm/amd/amdgpu/uvd_v3_1.c

686

amdgpu_ring_write(ring, tmp);

sys/dev/pci/drm/amd/amdgpu/uvd_v3_1.c

687

amdgpu_ring_write(ring, 0xFFFFF);

sys/dev/pci/drm/amd/amdgpu/uvd_v3_1.c

690

amdgpu_ring_write(ring, tmp);

sys/dev/pci/drm/amd/amdgpu/uvd_v3_1.c

691

amdgpu_ring_write(ring, 0xFFFFF);

sys/dev/pci/drm/amd/amdgpu/uvd_v3_1.c

694

amdgpu_ring_write(ring, PACKET0(mmUVD_SEMA_TIMEOUT_STATUS, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v3_1.c

695

amdgpu_ring_write(ring, 0x8);

sys/dev/pci/drm/amd/amdgpu/uvd_v3_1.c

697

amdgpu_ring_write(ring, PACKET0(mmUVD_SEMA_CNTL, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v3_1.c

698

amdgpu_ring_write(ring, 3);

sys/dev/pci/drm/amd/amdgpu/uvd_v3_1.c

94

amdgpu_ring_write(ring, PACKET0(mmUVD_RBC_IB_BASE, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v3_1.c

95

amdgpu_ring_write(ring, ib->gpu_addr);

sys/dev/pci/drm/amd/amdgpu/uvd_v3_1.c

96

amdgpu_ring_write(ring, PACKET0(mmUVD_RBC_IB_SIZE, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v3_1.c

97

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/pci/drm/amd/amdgpu/uvd_v4_2.c

175

amdgpu_ring_write(ring, tmp);

sys/dev/pci/drm/amd/amdgpu/uvd_v4_2.c

176

amdgpu_ring_write(ring, 0xFFFFF);

sys/dev/pci/drm/amd/amdgpu/uvd_v4_2.c

179

amdgpu_ring_write(ring, tmp);

sys/dev/pci/drm/amd/amdgpu/uvd_v4_2.c

180

amdgpu_ring_write(ring, 0xFFFFF);

sys/dev/pci/drm/amd/amdgpu/uvd_v4_2.c

183

amdgpu_ring_write(ring, tmp);

sys/dev/pci/drm/amd/amdgpu/uvd_v4_2.c

184

amdgpu_ring_write(ring, 0xFFFFF);

sys/dev/pci/drm/amd/amdgpu/uvd_v4_2.c

187

amdgpu_ring_write(ring, PACKET0(mmUVD_SEMA_TIMEOUT_STATUS, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v4_2.c

188

amdgpu_ring_write(ring, 0x8);

sys/dev/pci/drm/amd/amdgpu/uvd_v4_2.c

190

amdgpu_ring_write(ring, PACKET0(mmUVD_SEMA_CNTL, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v4_2.c

191

amdgpu_ring_write(ring, 3);

sys/dev/pci/drm/amd/amdgpu/uvd_v4_2.c

482

amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v4_2.c

483

amdgpu_ring_write(ring, seq);

sys/dev/pci/drm/amd/amdgpu/uvd_v4_2.c

484

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v4_2.c

485

amdgpu_ring_write(ring, addr & 0xffffffff);

sys/dev/pci/drm/amd/amdgpu/uvd_v4_2.c

486

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA1, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v4_2.c

487

amdgpu_ring_write(ring, upper_32_bits(addr) & 0xff);

sys/dev/pci/drm/amd/amdgpu/uvd_v4_2.c

488

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v4_2.c

489

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/uvd_v4_2.c

491

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v4_2.c

492

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/uvd_v4_2.c

493

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA1, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v4_2.c

494

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/uvd_v4_2.c

495

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v4_2.c

496

amdgpu_ring_write(ring, 2);

sys/dev/pci/drm/amd/amdgpu/uvd_v4_2.c

518

amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v4_2.c

519

amdgpu_ring_write(ring, 0xDEADBEEF);

sys/dev/pci/drm/amd/amdgpu/uvd_v4_2.c

549

amdgpu_ring_write(ring, PACKET0(mmUVD_RBC_IB_BASE, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v4_2.c

550

amdgpu_ring_write(ring, ib->gpu_addr);

sys/dev/pci/drm/amd/amdgpu/uvd_v4_2.c

551

amdgpu_ring_write(ring, PACKET0(mmUVD_RBC_IB_SIZE, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v4_2.c

552

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/pci/drm/amd/amdgpu/uvd_v4_2.c

562

amdgpu_ring_write(ring, PACKET0(mmUVD_NO_OP, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v4_2.c

563

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

172

amdgpu_ring_write(ring, tmp);

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

173

amdgpu_ring_write(ring, 0xFFFFF);

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

176

amdgpu_ring_write(ring, tmp);

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

177

amdgpu_ring_write(ring, 0xFFFFF);

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

180

amdgpu_ring_write(ring, tmp);

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

181

amdgpu_ring_write(ring, 0xFFFFF);

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

184

amdgpu_ring_write(ring, PACKET0(mmUVD_SEMA_TIMEOUT_STATUS, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

185

amdgpu_ring_write(ring, 0x8);

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

187

amdgpu_ring_write(ring, PACKET0(mmUVD_SEMA_CNTL, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

188

amdgpu_ring_write(ring, 3);

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

497

amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

498

amdgpu_ring_write(ring, seq);

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

499

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

500

amdgpu_ring_write(ring, addr & 0xffffffff);

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

501

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA1, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

502

amdgpu_ring_write(ring, upper_32_bits(addr) & 0xff);

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

503

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

504

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

506

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

507

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

508

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA1, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

509

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

510

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

511

amdgpu_ring_write(ring, 2);

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

532

amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

533

amdgpu_ring_write(ring, 0xDEADBEEF);

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

563

amdgpu_ring_write(ring, PACKET0(mmUVD_LMI_RBC_IB_64BIT_BAR_LOW, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

564

amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

565

amdgpu_ring_write(ring, PACKET0(mmUVD_LMI_RBC_IB_64BIT_BAR_HIGH, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

566

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

567

amdgpu_ring_write(ring, PACKET0(mmUVD_RBC_IB_SIZE, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

568

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

578

amdgpu_ring_write(ring, PACKET0(mmUVD_NO_OP, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

579

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1031

amdgpu_ring_write(ring, PACKET0(mmUVD_LMI_RBC_IB_VMID, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1032

amdgpu_ring_write(ring, vmid);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1034

amdgpu_ring_write(ring, PACKET0(mmUVD_LMI_RBC_IB_64BIT_BAR_LOW, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1035

amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1036

amdgpu_ring_write(ring, PACKET0(mmUVD_LMI_RBC_IB_64BIT_BAR_HIGH, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1037

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1038

amdgpu_ring_write(ring, PACKET0(mmUVD_RBC_IB_SIZE, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1039

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1059

amdgpu_ring_write(ring, HEVC_ENC_CMD_IB_VM);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1060

amdgpu_ring_write(ring, vmid);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1061

amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1062

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1063

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1069

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1070

amdgpu_ring_write(ring, reg << 2);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1071

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA1, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1072

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1073

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1074

amdgpu_ring_write(ring, 0x8);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1082

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1083

amdgpu_ring_write(ring, mmVM_INVALIDATE_REQUEST << 2);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1084

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA1, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1085

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1086

amdgpu_ring_write(ring, PACKET0(mmUVD_GP_SCRATCH8, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1087

amdgpu_ring_write(ring, 1 << vmid); /* mask */

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1088

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1089

amdgpu_ring_write(ring, 0xC);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1097

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1098

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1099

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA1, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1100

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1101

amdgpu_ring_write(ring, PACKET0(mmUVD_GP_SCRATCH8, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1102

amdgpu_ring_write(ring, 0xffffffff); /* mask */

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1103

amdgpu_ring_write(ring, PACKET0(mmUVD_GP_SCRATCH9, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1104

amdgpu_ring_write(ring, seq);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1105

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1106

amdgpu_ring_write(ring, 0xE);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1116

amdgpu_ring_write(ring, PACKET0(mmUVD_NO_OP, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1117

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1126

amdgpu_ring_write(ring, HEVC_ENC_CMD_WAIT_GE);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1127

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1128

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1129

amdgpu_ring_write(ring, seq);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1134

amdgpu_ring_write(ring, HEVC_ENC_CMD_END);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1140

amdgpu_ring_write(ring, HEVC_ENC_CMD_UPDATE_PTB);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1141

amdgpu_ring_write(ring, vmid);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1142

amdgpu_ring_write(ring, pd_addr >> 12);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1144

amdgpu_ring_write(ring, HEVC_ENC_CMD_FLUSH_TLB);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1145

amdgpu_ring_write(ring, vmid);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

183

amdgpu_ring_write(ring, HEVC_ENC_CMD_END);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

486

amdgpu_ring_write(ring, tmp);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

487

amdgpu_ring_write(ring, 0xFFFFF);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

490

amdgpu_ring_write(ring, tmp);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

491

amdgpu_ring_write(ring, 0xFFFFF);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

494

amdgpu_ring_write(ring, tmp);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

495

amdgpu_ring_write(ring, 0xFFFFF);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

498

amdgpu_ring_write(ring, PACKET0(mmUVD_SEMA_TIMEOUT_STATUS, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

499

amdgpu_ring_write(ring, 0x8);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

501

amdgpu_ring_write(ring, PACKET0(mmUVD_SEMA_CNTL, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

502

amdgpu_ring_write(ring, 3);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

930

amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

931

amdgpu_ring_write(ring, seq);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

932

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

933

amdgpu_ring_write(ring, addr & 0xffffffff);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

934

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA1, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

935

amdgpu_ring_write(ring, upper_32_bits(addr) & 0xff);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

936

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

937

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

939

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

940

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

941

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA1, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

942

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

943

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

944

amdgpu_ring_write(ring, 2);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

962

amdgpu_ring_write(ring, HEVC_ENC_CMD_FENCE);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

963

amdgpu_ring_write(ring, addr);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

964

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

965

amdgpu_ring_write(ring, seq);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

966

amdgpu_ring_write(ring, HEVC_ENC_CMD_TRAP);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

998

amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

999

amdgpu_ring_write(ring, 0xDEADBEEF);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1188

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1190

amdgpu_ring_write(ring, seq);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1191

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1193

amdgpu_ring_write(ring, addr & 0xffffffff);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1194

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1196

amdgpu_ring_write(ring, upper_32_bits(addr) & 0xff);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1197

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1199

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1201

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1203

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1204

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1206

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1207

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1209

amdgpu_ring_write(ring, 2);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1228

amdgpu_ring_write(ring, HEVC_ENC_CMD_FENCE);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1229

amdgpu_ring_write(ring, addr);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1230

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1231

amdgpu_ring_write(ring, seq);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1232

amdgpu_ring_write(ring, HEVC_ENC_CMD_TRAP);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1264

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1266

amdgpu_ring_write(ring, 0xDEADBEEF);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1329

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1331

amdgpu_ring_write(ring, vmid);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1333

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1335

amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1336

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1338

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1339

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1341

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1361

amdgpu_ring_write(ring, HEVC_ENC_CMD_IB_VM);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1362

amdgpu_ring_write(ring, vmid);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1363

amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1364

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1365

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1373

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1375

amdgpu_ring_write(ring, reg << 2);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1376

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1378

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1379

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1381

amdgpu_ring_write(ring, 8);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1389

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1391

amdgpu_ring_write(ring, reg << 2);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1392

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1394

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1395

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1397

amdgpu_ring_write(ring, mask);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1398

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1400

amdgpu_ring_write(ring, 12);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1426

amdgpu_ring_write(ring, PACKET0(SOC15_REG_OFFSET(UVD, ring->me, mmUVD_NO_OP), 0));

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1427

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1433

amdgpu_ring_write(ring, HEVC_ENC_CMD_END);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1440

amdgpu_ring_write(ring, HEVC_ENC_CMD_REG_WAIT);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1441

amdgpu_ring_write(ring, reg << 2);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1442

amdgpu_ring_write(ring, mask);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1443

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1462

amdgpu_ring_write(ring, HEVC_ENC_CMD_REG_WRITE);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1463

amdgpu_ring_write(ring, reg << 2);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

1464

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

191

amdgpu_ring_write(ring, HEVC_ENC_CMD_END);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

551

amdgpu_ring_write(ring, tmp);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

552

amdgpu_ring_write(ring, 0xFFFFF);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

556

amdgpu_ring_write(ring, tmp);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

557

amdgpu_ring_write(ring, 0xFFFFF);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

561

amdgpu_ring_write(ring, tmp);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

562

amdgpu_ring_write(ring, 0xFFFFF);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

565

amdgpu_ring_write(ring, PACKET0(SOC15_REG_OFFSET(UVD, j,

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

567

amdgpu_ring_write(ring, 0x8);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

569

amdgpu_ring_write(ring, PACKET0(SOC15_REG_OFFSET(UVD, j,

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

571

amdgpu_ring_write(ring, 3);

sys/dev/pci/drm/amd/amdgpu/vce_v3_0.c

866

amdgpu_ring_write(ring, VCE_CMD_IB_VM);

sys/dev/pci/drm/amd/amdgpu/vce_v3_0.c

867

amdgpu_ring_write(ring, vmid);

sys/dev/pci/drm/amd/amdgpu/vce_v3_0.c

868

amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/vce_v3_0.c

869

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/vce_v3_0.c

870

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/pci/drm/amd/amdgpu/vce_v3_0.c

876

amdgpu_ring_write(ring, VCE_CMD_UPDATE_PTB);

sys/dev/pci/drm/amd/amdgpu/vce_v3_0.c

877

amdgpu_ring_write(ring, vmid);

sys/dev/pci/drm/amd/amdgpu/vce_v3_0.c

878

amdgpu_ring_write(ring, pd_addr >> 12);

sys/dev/pci/drm/amd/amdgpu/vce_v3_0.c

880

amdgpu_ring_write(ring, VCE_CMD_FLUSH_TLB);

sys/dev/pci/drm/amd/amdgpu/vce_v3_0.c

881

amdgpu_ring_write(ring, vmid);

sys/dev/pci/drm/amd/amdgpu/vce_v3_0.c

882

amdgpu_ring_write(ring, VCE_CMD_END);

sys/dev/pci/drm/amd/amdgpu/vce_v3_0.c

890

amdgpu_ring_write(ring, VCE_CMD_WAIT_GE);

sys/dev/pci/drm/amd/amdgpu/vce_v3_0.c

891

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/vce_v3_0.c

892

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/vce_v3_0.c

893

amdgpu_ring_write(ring, seq);

sys/dev/pci/drm/amd/amdgpu/vce_v4_0.c

717

amdgpu_ring_write(ring, VCE_CMD_IB_VM);

sys/dev/pci/drm/amd/amdgpu/vce_v4_0.c

718

amdgpu_ring_write(ring, vmid);

sys/dev/pci/drm/amd/amdgpu/vce_v4_0.c

719

amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/vce_v4_0.c

720

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/vce_v4_0.c

721

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/pci/drm/amd/amdgpu/vce_v4_0.c

729

amdgpu_ring_write(ring, VCE_CMD_FENCE);

sys/dev/pci/drm/amd/amdgpu/vce_v4_0.c

730

amdgpu_ring_write(ring, addr);

sys/dev/pci/drm/amd/amdgpu/vce_v4_0.c

731

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/vce_v4_0.c

732

amdgpu_ring_write(ring, seq);

sys/dev/pci/drm/amd/amdgpu/vce_v4_0.c

733

amdgpu_ring_write(ring, VCE_CMD_TRAP);

sys/dev/pci/drm/amd/amdgpu/vce_v4_0.c

738

amdgpu_ring_write(ring, VCE_CMD_END);

sys/dev/pci/drm/amd/amdgpu/vce_v4_0.c

744

amdgpu_ring_write(ring, VCE_CMD_REG_WAIT);

sys/dev/pci/drm/amd/amdgpu/vce_v4_0.c

745

amdgpu_ring_write(ring, reg << 2);

sys/dev/pci/drm/amd/amdgpu/vce_v4_0.c

746

amdgpu_ring_write(ring, mask);

sys/dev/pci/drm/amd/amdgpu/vce_v4_0.c

747

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/vce_v4_0.c

766

amdgpu_ring_write(ring, VCE_CMD_REG_WRITE);

sys/dev/pci/drm/amd/amdgpu/vce_v4_0.c

767

amdgpu_ring_write(ring, reg << 2);

sys/dev/pci/drm/amd/amdgpu/vce_v4_0.c

768

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/vcn_sw_ring.c

32

amdgpu_ring_write(ring, VCN_DEC_SW_CMD_FENCE);

sys/dev/pci/drm/amd/amdgpu/vcn_sw_ring.c

33

amdgpu_ring_write(ring, addr);

sys/dev/pci/drm/amd/amdgpu/vcn_sw_ring.c

34

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/vcn_sw_ring.c

35

amdgpu_ring_write(ring, seq);

sys/dev/pci/drm/amd/amdgpu/vcn_sw_ring.c

36

amdgpu_ring_write(ring, VCN_DEC_SW_CMD_TRAP);

sys/dev/pci/drm/amd/amdgpu/vcn_sw_ring.c

41

amdgpu_ring_write(ring, VCN_DEC_SW_CMD_END);

sys/dev/pci/drm/amd/amdgpu/vcn_sw_ring.c

49

amdgpu_ring_write(ring, VCN_DEC_SW_CMD_IB);

sys/dev/pci/drm/amd/amdgpu/vcn_sw_ring.c

50

amdgpu_ring_write(ring, vmid);

sys/dev/pci/drm/amd/amdgpu/vcn_sw_ring.c

51

amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/vcn_sw_ring.c

52

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/vcn_sw_ring.c

53

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/pci/drm/amd/amdgpu/vcn_sw_ring.c

59

amdgpu_ring_write(ring, VCN_DEC_SW_CMD_REG_WAIT);

sys/dev/pci/drm/amd/amdgpu/vcn_sw_ring.c

60

amdgpu_ring_write(ring, reg << 2);

sys/dev/pci/drm/amd/amdgpu/vcn_sw_ring.c

61

amdgpu_ring_write(ring, mask);

sys/dev/pci/drm/amd/amdgpu/vcn_sw_ring.c

62

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/vcn_sw_ring.c

83

amdgpu_ring_write(ring, VCN_DEC_SW_CMD_REG_WRITE);

sys/dev/pci/drm/amd/amdgpu/vcn_sw_ring.c

84

amdgpu_ring_write(ring, reg << 2);

sys/dev/pci/drm/amd/amdgpu/vcn_sw_ring.c

85

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1518

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1520

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1521

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1523

amdgpu_ring_write(ring, VCN_DEC_CMD_PACKET_START << 1);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1537

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1539

amdgpu_ring_write(ring, VCN_DEC_CMD_PACKET_END << 1);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1559

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1561

amdgpu_ring_write(ring, seq);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1562

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1564

amdgpu_ring_write(ring, addr & 0xffffffff);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1565

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1567

amdgpu_ring_write(ring, upper_32_bits(addr) & 0xff);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1568

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1570

amdgpu_ring_write(ring, VCN_DEC_CMD_FENCE << 1);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1572

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1574

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1575

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1577

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1578

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1580

amdgpu_ring_write(ring, VCN_DEC_CMD_TRAP << 1);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1601

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1603

amdgpu_ring_write(ring, vmid);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1605

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1607

amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1608

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1610

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1611

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1613

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1622

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1624

amdgpu_ring_write(ring, reg << 2);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1625

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1627

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1628

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1630

amdgpu_ring_write(ring, mask);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1631

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1633

amdgpu_ring_write(ring, VCN_DEC_CMD_REG_READ_COND_WAIT << 1);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1656

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1658

amdgpu_ring_write(ring, reg << 2);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1659

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1661

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1662

amdgpu_ring_write(ring,

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1664

amdgpu_ring_write(ring, VCN_DEC_CMD_WRITE_REG << 1);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1735

amdgpu_ring_write(ring, VCN_ENC_CMD_FENCE);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1736

amdgpu_ring_write(ring, addr);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1737

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1738

amdgpu_ring_write(ring, seq);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1739

amdgpu_ring_write(ring, VCN_ENC_CMD_TRAP);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1744

amdgpu_ring_write(ring, VCN_ENC_CMD_END);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1764

amdgpu_ring_write(ring, VCN_ENC_CMD_IB);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1765

amdgpu_ring_write(ring, vmid);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1766

amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1767

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1768

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1775

amdgpu_ring_write(ring, VCN_ENC_CMD_REG_WAIT);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1776

amdgpu_ring_write(ring, reg << 2);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1777

amdgpu_ring_write(ring, mask);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1778

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1797

amdgpu_ring_write(ring, VCN_ENC_CMD_REG_WRITE);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1798

amdgpu_ring_write(ring, reg << 2);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1799

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1843

amdgpu_ring_write(ring, PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_NO_OP), 0));

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1844

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1483

amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.data0, 0));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1484

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1485

amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.cmd, 0));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1486

amdgpu_ring_write(ring, VCN_DEC_KMD_CMD | (VCN_DEC_CMD_PACKET_START << 1));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1500

amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[0].internal.cmd, 0));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1501

amdgpu_ring_write(ring, VCN_DEC_KMD_CMD | (VCN_DEC_CMD_PACKET_END << 1));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1520

amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.nop, 0));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1521

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1541

amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.context_id, 0));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1542

amdgpu_ring_write(ring, seq);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1544

amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.data0, 0));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1545

amdgpu_ring_write(ring, addr & 0xffffffff);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1547

amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.data1, 0));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1548

amdgpu_ring_write(ring, upper_32_bits(addr) & 0xff);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1550

amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.cmd, 0));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1551

amdgpu_ring_write(ring, VCN_DEC_KMD_CMD | (VCN_DEC_CMD_FENCE << 1));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1553

amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.data0, 0));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1554

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1556

amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.data1, 0));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1557

amdgpu_ring_write(ring, 0);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1559

amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.cmd, 0));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1561

amdgpu_ring_write(ring, VCN_DEC_KMD_CMD | (VCN_DEC_CMD_TRAP << 1));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1582

amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.ib_vmid, 0));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1583

amdgpu_ring_write(ring, vmid);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1585

amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.ib_bar_low, 0));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1586

amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1587

amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.ib_bar_high, 0));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1588

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1589

amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.ib_size, 0));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1590

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1598

amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.data0, 0));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1599

amdgpu_ring_write(ring, reg << 2);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1601

amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.data1, 0));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1602

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1604

amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.gp_scratch8, 0));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1605

amdgpu_ring_write(ring, mask);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1607

amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.cmd, 0));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1609

amdgpu_ring_write(ring, VCN_DEC_KMD_CMD | (VCN_DEC_CMD_REG_READ_COND_WAIT << 1));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1632

amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.data0, 0));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1633

amdgpu_ring_write(ring, reg << 2);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1635

amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.data1, 0));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1636

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1638

amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.cmd, 0));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1640

amdgpu_ring_write(ring, VCN_DEC_KMD_CMD | (VCN_DEC_CMD_WRITE_REG << 1));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1727

amdgpu_ring_write(ring, VCN_ENC_CMD_FENCE);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1728

amdgpu_ring_write(ring, addr);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1729

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1730

amdgpu_ring_write(ring, seq);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1731

amdgpu_ring_write(ring, VCN_ENC_CMD_TRAP);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1736

amdgpu_ring_write(ring, VCN_ENC_CMD_END);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1756

amdgpu_ring_write(ring, VCN_ENC_CMD_IB);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1757

amdgpu_ring_write(ring, vmid);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1758

amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1759

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1760

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1766

amdgpu_ring_write(ring, VCN_ENC_CMD_REG_WAIT);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1767

amdgpu_ring_write(ring, reg << 2);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1768

amdgpu_ring_write(ring, mask);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1769

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1787

amdgpu_ring_write(ring, VCN_ENC_CMD_REG_WRITE);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1788

amdgpu_ring_write(ring, reg << 2);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1789

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1839

amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.cmd, 0));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1840

amdgpu_ring_write(ring, VCN_DEC_KMD_CMD | (VCN_DEC_CMD_PACKET_START << 1));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1841

amdgpu_ring_write(ring, PACKET0(adev->vcn.inst[ring->me].internal.scratch9, 0));

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1842

amdgpu_ring_write(ring, 0xDEADBEEF);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

1538

amdgpu_ring_write(ring, VCN_ENC_CMD_REG_WAIT);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

1539

amdgpu_ring_write(ring, reg << 2);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

1540

amdgpu_ring_write(ring, mask);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

1541

amdgpu_ring_write(ring, val);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

1551

amdgpu_ring_write(ring, VCN_ENC_CMD_REG_WRITE);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

1552

amdgpu_ring_write(ring, reg << 2);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

1553

amdgpu_ring_write(ring, val);