amdgpu_ras_block
enum amdgpu_ras_block block, uint16_t pasid,
enum amdgpu_ras_block block, uint32_t reset)
enum amdgpu_ras_block block, uint32_t reset);
enum amdgpu_ras_block block, uint16_t pasid,
static int amdgpu_mca_smu_parse_mca_error_count(struct amdgpu_device *adev, enum amdgpu_ras_block blk,
static int amdgpu_mca_dispatch_mca_set(struct amdgpu_device *adev, enum amdgpu_ras_block blk, enum amdgpu_mca_error_type type,
int amdgpu_mca_smu_log_ras_error(struct amdgpu_device *adev, enum amdgpu_ras_block blk, enum amdgpu_mca_error_type type,
int (*mca_parse_mca_error_count)(struct amdgpu_device *adev, enum amdgpu_ras_block blk, enum amdgpu_mca_error_type type,
int amdgpu_mca_smu_get_mca_set_error_count(struct amdgpu_device *adev, enum amdgpu_ras_block blk,
int amdgpu_mca_smu_log_ras_error(struct amdgpu_device *adev, enum amdgpu_ras_block blk, enum amdgpu_mca_error_type type,
enum amdgpu_ras_block block)
enum amdgpu_ras_block block, uint32_t sub_block_index)
static struct ras_manager *get_ras_manager(struct amdgpu_device *adev, enum amdgpu_ras_block blk)
int amdgpu_ras_bind_aca(struct amdgpu_device *adev, enum amdgpu_ras_block blk,
int amdgpu_ras_unbind_aca(struct amdgpu_device *adev, enum amdgpu_ras_block blk)
static int amdgpu_aca_log_ras_error_data(struct amdgpu_device *adev, enum amdgpu_ras_block blk,
enum amdgpu_ras_block blk = info ? info->head.block : AMDGPU_RAS_BLOCK_COUNT;
enum amdgpu_ras_block block)
enum amdgpu_ras_block block)
enum amdgpu_ras_block block, uint16_t pasid,
enum amdgpu_ras_block block)
enum amdgpu_ras_block block, uint16_t pasid,
enum amdgpu_ras_block block;
enum amdgpu_ras_block block;
enum amdgpu_ras_block block, uint32_t sub_block_index);
amdgpu_ras_block_to_ta(enum amdgpu_ras_block block) {
enum amdgpu_ras_block block);
enum amdgpu_ras_block block);
int amdgpu_ras_bind_aca(struct amdgpu_device *adev, enum amdgpu_ras_block blk,
int amdgpu_ras_unbind_aca(struct amdgpu_device *adev, enum amdgpu_ras_block blk);
enum amdgpu_ras_block block);
enum amdgpu_ras_block block, uint16_t pasid,
enum amdgpu_ras_block block, uint32_t reset)
enum amdgpu_ras_block block, uint32_t reset);
enum amdgpu_ras_block block, uint16_t pasid,
amdgpu_ras_block_to_sriov(struct amdgpu_device *adev, enum amdgpu_ras_block block) {
int amdgpu_virt_req_ras_err_count(struct amdgpu_device *adev, enum amdgpu_ras_block block,
enum amdgpu_ras_block block)
int amdgpu_virt_req_ras_err_count(struct amdgpu_device *adev, enum amdgpu_ras_block block,
enum amdgpu_ras_block block);
enum amdgpu_ras_block block);
enum amdgpu_ras_block block, uint32_t sub_block_index)
enum amdgpu_ras_block block)
enum amdgpu_ras_block block)
enum amdgpu_ras_block block = 0;
enum amdgpu_ras_block block = 0;
enum amdgpu_ras_block blkid;
static const struct mca_ras_info *mca_get_mca_ras_info(struct amdgpu_device *adev, enum amdgpu_ras_block blkid)
static int mca_smu_parse_mca_error_count(struct amdgpu_device *adev, enum amdgpu_ras_block blk, enum amdgpu_mca_error_type type,