_reg_write_1
_reg_write_1(LANDISK_PWRSW_INTCLR, 1);
_reg_write_1(LANDISK_PWRMNG, PWRMNG_RTC_CE);
_reg_write_1(LANDISK_PWRMNG, 0);
_reg_write_1(LANDISK_INTEN, inten);
_reg_write_1(LANDISK_INTEN, INTEN_ALL_MASK);
_reg_write_1(LANDISK_INTEN, inten & ~bit);
_reg_write_1(LANDISK_PWRMNG, PWRMNG_POWEROFF);
_reg_write_1(BSC_SDMR2_VAL, 0);
_reg_write_1(BSC_SDMR3_VAL, 0);
_reg_write_1(LANDISK_LEDCTRL,
_reg_write_1(LANDISK_LEDCTRL, ledctrl);
_reg_write_1(0xb0000003, (1 << 1));
_reg_write_1(0xb0000003, (0 << 1));
_reg_write_1(SH_(RCR1), 0);
_reg_write_1(SH_(TSTR), 0);
_reg_write_1(SH_(TSTR), 0);
_reg_write_1(SH_(RCR2), SH_RCR2_ENABLE | SH_RCR2_START);
_reg_write_1(SH_(RCR1), r);
_reg_write_1(SH_(RCR2), r);
_reg_write_1(SH3_RYRCNT, TOBCD(dt->dt_year % 100));
#define RTCSET(x, y) _reg_write_1(SH_(R ## x ## CNT), TOBCD(dt->dt_ ## y))
_reg_write_1(SH_(RCR2), r | SH_RCR2_START);
_reg_write_1(SH_(BASRA), 0); /* break ASID */
_reg_write_1(SH_(BAMRA), 0x07); /* break always */
_reg_write_1(SH_(BASRB), pm_asid);
_reg_write_1(SH_(BAMRB), 0);