sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

670

for (i = 0; i < __DML2_WRAPPER_MAX_STREAMS_PLANES__; i++) {

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

692

for (i = 0; i < __DML2_WRAPPER_MAX_STREAMS_PLANES__; i++) {

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

753

ASSERT(disp_cfg_stream_location >= 0 && disp_cfg_stream_location < __DML2_WRAPPER_MAX_STREAMS_PLANES__);

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

777

ASSERT(disp_cfg_plane_location >= 0 && disp_cfg_plane_location < __DML2_WRAPPER_MAX_STREAMS_PLANES__);

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c

872

for (i = 0; i < __DML2_WRAPPER_MAX_STREAMS_PLANES__; i++) {

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.c

102

memset(dc_main_pipes, 0, sizeof(struct pipe_ctx *) * __DML2_WRAPPER_MAX_STREAMS_PLANES__);

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.c

103

memset(dc_phantom_pipes, 0, sizeof(struct pipe_ctx *) * __DML2_WRAPPER_MAX_STREAMS_PLANES__);

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.c

17

for (i = 0; i < __DML2_WRAPPER_MAX_STREAMS_PLANES__; i++) {

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.c

28

for (i = 0; i < __DML2_WRAPPER_MAX_STREAMS_PLANES__; i++) {

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.c

64

for (i = 0; i < __DML2_WRAPPER_MAX_STREAMS_PLANES__; i++) {

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.c

87

struct pipe_ctx *dc_main_pipes[__DML2_WRAPPER_MAX_STREAMS_PLANES__],

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.c

88

struct pipe_ctx *dc_phantom_pipes[__DML2_WRAPPER_MAX_STREAMS_PLANES__],

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.h

36

struct pipe_ctx *dc_main_pipes[__DML2_WRAPPER_MAX_STREAMS_PLANES__],

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_utils.h

37

struct pipe_ctx *dc_phantom_pipes[__DML2_WRAPPER_MAX_STREAMS_PLANES__],

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c

315

struct pipe_ctx *dc_main_pipes[__DML2_WRAPPER_MAX_STREAMS_PLANES__];

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c

316

struct pipe_ctx *dc_phantom_pipes[__DML2_WRAPPER_MAX_STREAMS_PLANES__] = {0};

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c

93

struct pipe_ctx *dc_main_pipes[__DML2_WRAPPER_MAX_STREAMS_PLANES__];

sys/dev/pci/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c

94

struct pipe_ctx *dc_phantom_pipes[__DML2_WRAPPER_MAX_STREAMS_PLANES__] = {0};

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

1047

unsigned int odm_mode_array[__DML2_WRAPPER_MAX_STREAMS_PLANES__] = {0}, dpp_per_surface_array[__DML2_WRAPPER_MAX_STREAMS_PLANES__] = {0};

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

105

return __DML2_WRAPPER_MAX_STREAMS_PLANES__;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

1061

for (i = 0; i < __DML2_WRAPPER_MAX_STREAMS_PLANES__; i++) {

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

1068

disp_cfg_index_max = __DML2_WRAPPER_MAX_STREAMS_PLANES__;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

86

for (i = 0; i < __DML2_WRAPPER_MAX_STREAMS_PLANES__; i++) {

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

92

return __DML2_WRAPPER_MAX_STREAMS_PLANES__;

sys/dev/pci/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c

99

for (i = 0; i < __DML2_WRAPPER_MAX_STREAMS_PLANES__; i++) {

sys/dev/pci/drm/amd/display/dc/dml2/dml2_internal_types.h

72

unsigned int disp_cfg_to_stream_id[__DML2_WRAPPER_MAX_STREAMS_PLANES__];

sys/dev/pci/drm/amd/display/dc/dml2/dml2_internal_types.h

73

bool disp_cfg_to_stream_id_valid[__DML2_WRAPPER_MAX_STREAMS_PLANES__];

sys/dev/pci/drm/amd/display/dc/dml2/dml2_internal_types.h

74

unsigned int disp_cfg_to_plane_id[__DML2_WRAPPER_MAX_STREAMS_PLANES__];

sys/dev/pci/drm/amd/display/dc/dml2/dml2_internal_types.h

75

bool disp_cfg_to_plane_id_valid[__DML2_WRAPPER_MAX_STREAMS_PLANES__];

sys/dev/pci/drm/amd/display/dc/dml2/dml2_internal_types.h

76

unsigned int dml_pipe_idx_to_stream_id[__DML2_WRAPPER_MAX_STREAMS_PLANES__];

sys/dev/pci/drm/amd/display/dc/dml2/dml2_internal_types.h

77

bool dml_pipe_idx_to_stream_id_valid[__DML2_WRAPPER_MAX_STREAMS_PLANES__];

sys/dev/pci/drm/amd/display/dc/dml2/dml2_internal_types.h

78

unsigned int dml_pipe_idx_to_plane_id[__DML2_WRAPPER_MAX_STREAMS_PLANES__];

sys/dev/pci/drm/amd/display/dc/dml2/dml2_internal_types.h

79

bool dml_pipe_idx_to_plane_id_valid[__DML2_WRAPPER_MAX_STREAMS_PLANES__];

sys/dev/pci/drm/amd/display/dc/dml2/dml2_internal_types.h

80

unsigned int dml_pipe_idx_to_plane_index[__DML2_WRAPPER_MAX_STREAMS_PLANES__];

sys/dev/pci/drm/amd/display/dc/dml2/dml2_internal_types.h

81

bool dml_pipe_idx_to_plane_index_valid[__DML2_WRAPPER_MAX_STREAMS_PLANES__];

sys/dev/pci/drm/amd/display/dc/dml2/dml2_translation_helper.c

1136

for (i = 0; i < __DML2_WRAPPER_MAX_STREAMS_PLANES__; i++) {

sys/dev/pci/drm/amd/display/dc/dml2/dml2_translation_helper.c

1182

for (i = 0; i < __DML2_WRAPPER_MAX_STREAMS_PLANES__; i++) {

sys/dev/pci/drm/amd/display/dc/dml2/dml2_translation_helper.c

1199

for (i = 0; i < __DML2_WRAPPER_MAX_STREAMS_PLANES__; i++) {

sys/dev/pci/drm/amd/display/dc/dml2/dml2_translation_helper.c

1204

for (i = 0; i < __DML2_WRAPPER_MAX_STREAMS_PLANES__; i++) {

sys/dev/pci/drm/amd/display/dc/dml2/dml2_translation_helper.c

1297

for (i = 0; i < __DML2_WRAPPER_MAX_STREAMS_PLANES__; i++) {

sys/dev/pci/drm/amd/display/dc/dml2/dml2_translation_helper.c

1331

ASSERT(disp_cfg_stream_location >= 0 && disp_cfg_stream_location < __DML2_WRAPPER_MAX_STREAMS_PLANES__);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_translation_helper.c

1371

ASSERT(disp_cfg_plane_location >= 0 && disp_cfg_plane_location < __DML2_WRAPPER_MAX_STREAMS_PLANES__);

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.c

197

for (i = 0; i < __DML2_WRAPPER_MAX_STREAMS_PLANES__; i++) {

sys/dev/pci/drm/amd/display/dc/dml2/dml2_utils.c

208

for (i = 0; i < __DML2_WRAPPER_MAX_STREAMS_PLANES__; i++) {

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.c

80

if (i >= __DML2_WRAPPER_MAX_STREAMS_PLANES__) {

sys/dev/pci/drm/amd/display/dc/dml2/dml2_wrapper.c

82

__func__, i, __DML2_WRAPPER_MAX_STREAMS_PLANES__);