sys/dev/pci/drm/amd/amdgpu/soc15_common.h

111

__WREG32_SOC15_RLC__(reg, value, AMDGPU_REGS_RLC, GC_HWIP, 0)

sys/dev/pci/drm/amd/amdgpu/soc15_common.h

139

__WREG32_SOC15_RLC__((adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg), value, AMDGPU_REGS_RLC, GC_HWIP, inst)

sys/dev/pci/drm/amd/amdgpu/soc15_common.h

146

__WREG32_SOC15_RLC__(reg, value, AMDGPU_REGS_NO_KIQ | AMDGPU_REGS_RLC, hwip, 0)

sys/dev/pci/drm/amd/amdgpu/soc15_common.h

175

__WREG32_SOC15_RLC__(target_reg, value, AMDGPU_REGS_RLC, ip##_HWIP, inst); \

sys/dev/pci/drm/amd/amdgpu/soc15_common.h

185

__WREG32_SOC15_RLC__((adev->reg_offset[ip##_HWIP][idx][mm##reg##_BASE_IDX] + mm##reg), \

sys/dev/pci/drm/amd/amdgpu/soc15_common.h

192

__WREG32_SOC15_RLC__((adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg) + offset, value, AMDGPU_REGS_RLC, ip##_HWIP, inst)

sys/dev/pci/drm/amd/amdgpu/soc15_common.h

51

__WREG32_SOC15_RLC__(adev->reg_offset[ip##_HWIP][idx][mm##reg##_BASE_IDX] + mm##reg, \

sys/dev/pci/drm/amd/amdgpu/soc15_common.h

59

__WREG32_SOC15_RLC__(adev->reg_offset[ip##_HWIP][idx][reg##reg_name##_BASE_IDX] + reg##reg_name, \

sys/dev/pci/drm/amd/amdgpu/soc15_common.h

83

__WREG32_SOC15_RLC__((adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg), \

sys/dev/pci/drm/amd/amdgpu/soc15_common.h

87

__WREG32_SOC15_RLC__(reg, value, 0, ip##_HWIP, 0)

sys/dev/pci/drm/amd/amdgpu/soc15_common.h

90

__WREG32_SOC15_RLC__(reg, value, AMDGPU_REGS_NO_KIQ, ip##_HWIP, inst)

sys/dev/pci/drm/amd/amdgpu/soc15_common.h

93

__WREG32_SOC15_RLC__(adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg, \

sys/dev/pci/drm/amd/amdgpu/soc15_common.h

97

__WREG32_SOC15_RLC__((adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg) + offset, \