sys/dev/pci/drm/amd/amdgpu/soc15_common.h

143

__RREG32_SOC15_RLC__(reg, AMDGPU_REGS_RLC, GC_HWIP, 0)

sys/dev/pci/drm/amd/amdgpu/soc15_common.h

149

__RREG32_SOC15_RLC__(reg, AMDGPU_REGS_NO_KIQ | AMDGPU_REGS_RLC, hwip, 0)

sys/dev/pci/drm/amd/amdgpu/soc15_common.h

170

__RREG32_SOC15_RLC__(adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg, AMDGPU_REGS_RLC, ip##_HWIP, inst)

sys/dev/pci/drm/amd/amdgpu/soc15_common.h

186

(__RREG32_SOC15_RLC__(adev->reg_offset[ip##_HWIP][idx][mm##reg##_BASE_IDX] + mm##reg, \

sys/dev/pci/drm/amd/amdgpu/soc15_common.h

195

__RREG32_SOC15_RLC__((adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg) + offset, AMDGPU_REGS_RLC, ip##_HWIP, inst)

sys/dev/pci/drm/amd/amdgpu/soc15_common.h

52

(__RREG32_SOC15_RLC__( \

sys/dev/pci/drm/amd/amdgpu/soc15_common.h

60

(__RREG32_SOC15_RLC__( \

sys/dev/pci/drm/amd/amdgpu/soc15_common.h

67

__RREG32_SOC15_RLC__(adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg, \

sys/dev/pci/drm/amd/amdgpu/soc15_common.h

70

#define RREG32_SOC15_IP(ip, reg) __RREG32_SOC15_RLC__(reg, 0, ip##_HWIP, 0)

sys/dev/pci/drm/amd/amdgpu/soc15_common.h

72

#define RREG32_SOC15_IP_NO_KIQ(ip, reg, inst) __RREG32_SOC15_RLC__(reg, AMDGPU_REGS_NO_KIQ, ip##_HWIP, inst)

sys/dev/pci/drm/amd/amdgpu/soc15_common.h

75

__RREG32_SOC15_RLC__(adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg, \

sys/dev/pci/drm/amd/amdgpu/soc15_common.h

79

__RREG32_SOC15_RLC__((adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + (reg)) + \