sys/dev/pci/drm/i915/display/i9xx_wm.c

185

_MASKED_BIT_DISABLE(FW_BLC_SELF_EN);

sys/dev/pci/drm/i915/display/i9xx_wm.c

196

_MASKED_BIT_DISABLE(INSTPM_SELF_EN);

sys/dev/pci/drm/i915/display/intel_display_irq.c

1565

_MASKED_BIT_DISABLE(CSTATE_RENDER_CLOCK_GATE_DISABLE));

sys/dev/pci/drm/i915/gt/intel_engine_cs.c

1701

ENGINE_WRITE_FW(engine, RING_MI_MODE, _MASKED_BIT_DISABLE(STOP_RING));

sys/dev/pci/drm/i915/gt/intel_engine_pm.c

27

_MASKED_BIT_DISABLE(IDLE_MSG_DISABLE));

sys/dev/pci/drm/i915/gt/intel_execlists_submission.c

2945

ENGINE_WRITE_FW(engine, RING_MI_MODE, _MASKED_BIT_DISABLE(STOP_RING));

sys/dev/pci/drm/i915/gt/intel_lrc.c

848

ctl |= _MASKED_BIT_DISABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT);

sys/dev/pci/drm/i915/gt/intel_lrc.c

852

ctl |= _MASKED_BIT_DISABLE(CTX_CTRL_ENGINE_CTX_SAVE_INHIBIT |

sys/dev/pci/drm/i915/gt/intel_rc6.c

767

_MASKED_BIT_DISABLE(VLV_COUNT_RANGE_HIGH));

sys/dev/pci/drm/i915/gt/intel_reset.c

605

_MASKED_BIT_DISABLE(RESET_CTL_REQUEST_RESET));

sys/dev/pci/drm/i915/gt/intel_ring_submission.c

1081

_MASKED_BIT_DISABLE(GEN6_PSMI_SLEEP_MSG_DISABLE));

sys/dev/pci/drm/i915/gt/intel_ring_submission.c

277

RING_MI_MODE, _MASKED_BIT_DISABLE(STOP_RING));

sys/dev/pci/drm/i915/gt/intel_ring_submission.c

827

*cs++ = _MASKED_BIT_DISABLE(

sys/dev/pci/drm/i915/gt/intel_workarounds.c

313

wa_add(wal, reg, 0, _MASKED_BIT_DISABLE(val), val, true);

sys/dev/pci/drm/i915/gt/intel_workarounds.c

319

wa_mcr_add(wal, reg, 0, _MASKED_BIT_DISABLE(val), val, true);

sys/dev/pci/drm/i915/gt/uc/intel_guc_submission.c

4421

ENGINE_WRITE_FW(engine, RING_MI_MODE, _MASKED_BIT_DISABLE(STOP_RING));

sys/dev/pci/drm/i915/gt/uc/intel_uc_fw.c

1130

intel_uncore_write_fw(uncore, DMA_CTRL, _MASKED_BIT_DISABLE(dma_flags));

sys/dev/pci/drm/i915/gvt/handlers.c

2136

else if (data & _MASKED_BIT_DISABLE(RESET_CTL_REQUEST_RESET))

sys/dev/pci/drm/i915/gvt/reg.h

96

((_val) & _MASKED_BIT_DISABLE(_b))

sys/dev/pci/drm/i915/i915_perf.c

2973

_MASKED_BIT_DISABLE(STALL_DOP_GATING_DISABLE));

sys/dev/pci/drm/i915/i915_perf.c

2975

_MASKED_BIT_DISABLE(GEN12_DISABLE_DOP_GATING));

sys/dev/pci/drm/i915/intel_clock_gating.c

668

_MASKED_BIT_DISABLE(ECO_FLIP_DONE));

sys/dev/pci/drm/i915/intel_clock_gating.c

687

_MASKED_BIT_DISABLE(MI_AGPBUSY_830_MODE));

sys/dev/pci/drm/i915/intel_uncore.c

134

#define fw_clear(d, val) writel(_MASKED_BIT_DISABLE((val)), (d)->reg_set)

sys/dev/pci/drm/i915/pxp/intel_pxp.c

68

_MASKED_BIT_DISABLE(KCR_INIT_ALLOW_DISPLAY_ME_WRITES);