WRITE_REG
WRITE_REG(sc, HARMONY_GAINCTL, GAINCTL_OUTPUT_LEFT_M |
WRITE_REG(sc, HARMONY_RESET, RESET_RST);
WRITE_REG(sc, HARMONY_RESET, 0);
WRITE_REG(sc, HARMONY_PNXTADD, nextaddr);
WRITE_REG(sc, HARMONY_OV, 0);
WRITE_REG(sc, HARMONY_DSTATUS, DSTATUS_IE);
WRITE_REG(sc, HARMONY_DSTATUS, 0);
WRITE_REG(sc, HARMONY_PNXTADD, nextaddr);
WRITE_REG(sc, HARMONY_RNXTADD,
WRITE_REG(sc, HARMONY_RNXTADD, nextaddr);
struct WRITE_REG write_reg;
struct WRITE_REG write_reg;
WRITE_REG(sc, TXP_H2A_2, sc->sc_boot_dma.dma_paddr >> 32);
WRITE_REG(sc, TXP_H2A_1, sc->sc_boot_dma.dma_paddr & 0xffffffff);
WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_REGISTER_BOOT_RECORD);
WRITE_REG(sc, TXP_H2A_1, TXP_BOOTCMD_NULL);
WRITE_REG(sc, TXP_H2A_2, TXP_BOOTCMD_NULL);
WRITE_REG(sc, TXP_H2A_3, TXP_BOOTCMD_NULL);
WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_NULL);
WRITE_REG(sc, TXP_IER, TXP_INT_RESERVED | TXP_INT_SELF |
WRITE_REG(sc, TXP_IMR, TXP_INT_A2H_3);
WRITE_REG(sc, r->r_reg, TXP_IDX2OFFSET(prod));
WRITE_REG(sc, TXP_H2A_2, sc->sc_cmdring.lastwrite);
WRITE_REG(sc, TXP_IER, 0);
WRITE_REG(sc, TXP_IMR,
WRITE_REG(sc, TXP_ISR, TXP_INT_RESERVED | TXP_INT_LATCH |
WRITE_REG(sc, TXP_IER, 0);
WRITE_REG(sc, TXP_IMR,
WRITE_REG(sc, TXP_ISR, TXP_INT_RESERVED | TXP_INT_LATCH |
WRITE_REG(sc, TXP_SRR, TXP_SRR_ALL);
WRITE_REG(sc, TXP_SRR, 0);
WRITE_REG(sc, TXP_IER, ier | TXP_INT_A2H_0);
WRITE_REG(sc, TXP_IMR, imr | TXP_INT_A2H_0);
WRITE_REG(sc, TXP_ISR, TXP_INT_A2H_0);
WRITE_REG(sc, TXP_H2A_1, letoh32(fileheader->addr));
WRITE_REG(sc, TXP_H2A_2, letoh32(fileheader->hmac[0]));
WRITE_REG(sc, TXP_H2A_3, letoh32(fileheader->hmac[1]));
WRITE_REG(sc, TXP_H2A_4, letoh32(fileheader->hmac[2]));
WRITE_REG(sc, TXP_H2A_5, letoh32(fileheader->hmac[3]));
WRITE_REG(sc, TXP_H2A_6, letoh32(fileheader->hmac[4]));
WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_RUNTIME_IMAGE);
WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_DOWNLOAD_COMPLETE);
WRITE_REG(sc, TXP_IER, ier);
WRITE_REG(sc, TXP_IMR, imr);
WRITE_REG(sc, TXP_ISR, TXP_INT_A2H_0);
WRITE_REG(sc, TXP_H2A_1, letoh32(sect->nbytes));
WRITE_REG(sc, TXP_H2A_2, letoh16(sect->cksum));
WRITE_REG(sc, TXP_H2A_3, letoh32(sect->addr));
WRITE_REG(sc, TXP_H2A_4, dma.dma_paddr >> 32);
WRITE_REG(sc, TXP_H2A_5, dma.dma_paddr & 0xffffffff);
WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_SEGMENT_AVAILABLE);
WRITE_REG(sc, TXP_IMR, TXP_INT_RESERVED | TXP_INT_SELF |
WRITE_REG(sc, TXP_ISR, isr);
WRITE_REG(sc, TXP_IMR, TXP_INT_A2H_3);